Observed 2Gi Modbus Symptom
Two 2Gi controllers communicate in a master/slave arrangement, with the affected controller operating as the slave and connected in debug mode. Modbus communication remains active: both controllers send and receive all reported variables, but one Modbus variable appears with an incorrect value at the input of the next FBD block.
| Check point | Evidence | Conclusion |
|---|---|---|
| Controller communication | Variables transfer in both directions | A total communication failure is not demonstrated |
| FBD signal path | Mismatch appears at the next block input | Inspect the transition from the Modbus variable to that input |
| Reproduction | Project testing reportedly operated normally | The fault was not reproduced, so no root cause was confirmed |
Confirmed Facts and Remaining Unknowns
The relevant FBD diagram is stored in Slave-A7.psl. A review of the submitted project did not reproduce the incorrect value. The evidence does not identify the variable type, Modbus address, function, register layout, update timing, firmware, or the values shown in the missing screenshots. Therefore, byte order, data conversion, FBD execution order, and communication timing remain hypotheses rather than confirmed causes.
Reproduce and Isolate the Value Mismatch
- Run the submitted project with the same two-controller master/slave arrangement and the affected controller in debug mode.
- Open
Slave-A7.psland observe the Modbus variable together with the immediately connected FBD block input during the same test. - Record both values at the instant they diverge. Also retain the operating state needed to reproduce the divergence.
- If the values do not diverge, compare the tested project and controller configuration with the installation where the fault occurs. Do not assign a product defect or protocol cause until the mismatch is repeatable.
- Verify the result by confirming that the Modbus variable and the next block input remain equal under the previously failing operating condition.
If escalation is required, provide the complete project and a repeatable test condition through an official manufacturer support channel. The available evidence shows that the project file alone was insufficient to reproduce the reported behavior.
FAQ
Why does a 2Gi Modbus value differ at the next FBD block?
No cause was confirmed because testing of the submitted project operated normally. Reproduce the mismatch while monitoring the Modbus variable and the immediately connected input in Slave-A7.psl.
Does successful two-way Modbus transfer rule out this fault?
No. It confirms that communication is not completely failed, but it does not explain a value mismatch within the observed FBD signal path.
What evidence is needed to troubleshoot the 2Gi mismatch?
Provide the complete project, the exact operating condition that triggers the fault, and simultaneous observations of the Modbus variable and the next block input. The current evidence omits the address, data type, firmware, timing, and displayed values.