Overview
The Siemens S7-1200 High Speed Counter (HSC) is designed primarily for 24 V DC incremental encoders with PNP (sourcing) outputs. When you must interface a low-voltage 5 V NPN (sinking) encoder such as the Fischer 9 V Encodermotor (catalog 153422), the input thresholds of the CPU or signal board (SB) are not met directly and the count direction (DIR) cannot be derived from a single-channel output. This article walks through the electrical adaptation, the TIA Portal hardware configuration, and the software blocks (CTRL_HSC, counting mode, and DIR handling) needed to make the S7-1200 count reliably from a 5 V NPN quadrature or single-phase encoder.
Encoder Signal Characteristics
The Fischer 153422 is a 9 V DC motor with an integrated incremental encoder. The relevant electrical data sheet values are:
| Parameter | Value | Notes |
|---|---|---|
| Supply voltage | 9 V DC (nominal) | Datasheet rating; can be operated from regulated 5 V with reduced margin |
| Output type | NPN open-collector (sinking) | Requires external pull-up to logic level |
| Output low level (V_OL) | ≤ 0.4 V @ 5 mA | Standard NPN saturation |
| Output high level (V_OH) | Depends on pull-up rail | Set pull-up to 5 V (TTL) or 24 V (PLC) as required |
| Resolution | Low (coarse) | Verify pulses-per-revolution (PPR) in the data sheet before sizing the HSC filter |
| Channels | A only (single phase) for the base motor | No channel B → no native direction discrimination |
S7-1200 Input Voltage Thresholds
Standard S7-1200 digital inputs (CPU and SB) are type 1 sinks per IEC 61131-2:
| Threshold | Voltage (24 V range) | Implication for 5 V encoder |
|---|---|---|
| V_IH (guaranteed ON) | ≥ 15 V DC | 5 V signal will not register as TRUE |
| V_IL (guaranteed OFF) | ≤ 5 V DC | 5 V signal sits at the OFF boundary |
| Hysteresis | ~ 1.5 V typical | Insufficient margin at 5 V |
| Input current | 2–4 mA @ 24 V | Pull-up sized for ≥ 4 mA drive |
Consequence: the 5 V NPN signal must be re-leveled to ≥ 15 V. Two practical methods are covered next.
Signal Conditioning Options
Option A — Pull-up to 24 V on the Same PLC Input
If the encoder's NPN transistor can sink the S7-1200 input current (~ 4 mA), you can wire a pull-up resistor from the input terminal to the 24 V sensor supply (L+). The resistor value is:
R_pullup = (V_supply - V_OL) / I_sink_required
For 24 V supply, 0.4 V V_OL, and 5 mA sink current:
R_pullup = (24 - 0.4) / 0.005 = 4.72 kΩ → use 4.7 kΩ, 0.25 W.
- V_OH ≈ 24 V (well above 15 V ON threshold).
- V_OL ≈ 0.4 V (well below 5 V OFF threshold).
- Edge speed is limited by R·C; add 100 nF across the input only if bounce is observed.
Option B — Opto-Coupler or Comparator Level Shifter (Recommended)
Provide full galvanic isolation and respect the encoder's voltage rating:
- Power the encoder from a regulated 5 V rail.
- Pull the NPN output to 5 V through 1 kΩ (R_LED) into the diode of a 24 V-output opto-coupler (e.g., Vishay VO617A, Broadcom HCPL-1810).
- On the PLC side, the opto-transistor pulls the S7-1200 input toward 0 V when the encoder is active; add a 4.7 kΩ pull-up to the PLC's 24 V L+ to reconstruct the logic level.
LED current through the opto:
I_LED = (V_supply - V_F - V_OL_encoder) / R_LED
For V_supply = 5 V, V_F = 1.2 V, V_OL = 0.4 V, R_LED = 1 kΩ → I_LED = 3.4 mA (within CTR spec of most optos).
Option C — SB 1221 5 V Differential Input
For genuine 5 V signals and high pulse rates, the SB 1221 DI 4x5 V DC signal board offers RS-422/5 V differential receivers on HSC-capable channels. This avoids analog level shifting and supports quadrature (A/B) up to 200 kHz per the S7-1200 system manual. Recommended where the encoder has complementary (A, /A, B, /B) outputs. The Fischer 153422 base unit does not provide complementary outputs, so this is for upgraded encoders only.
Direction (DIR) Handling for Single-Phase Encoders
The S7-1200 HSC supports four counting modes:
| Mode | Channels used | Direction source |
|---|---|---|
| Single-phase (count up/down) | 1 (A) | External DIR input or program-controlled |
| Two-phase (quadrature 1x) | 2 (A, B) | Phase relationship of A vs B |
| Two-phase (quadrature 2x) | 2 (A, B) | Phase relationship, 2 counts per pulse |
| Two-phase (quadrature 4x) | 2 (A, B) | Phase relationship, 4 counts per pulse |
| AB counter with Z (reset) | 3 (A, B, Z) | Phase relationship of A and B |
Because the Fischer 153422 ships with a single-channel output, quadrature decoding is impossible. Direction must be assigned in the user program:
- Use HSC counting mode "Single-phase, count up/down with DIR input".
- Assign the DIR input to a free 24 V digital input (e.g., I0.5) wired to a direction switch, limit sensor, or a logic bit from the program.
- Alternatively, drive the HSC count direction from a BOOL tag in the
CTRL_HSCinstruction (software-controlled direction).
CTRL_HSC writes the direction flag inside the HSC. The DIR hardware input (when configured) is a separate, faster path. For low-PPR encoders driven by hand or slow motors, the software direction is fine. For high-speed reversible drives, wire a real DIR input.Wiring Topology
The recommended wiring for a Fischer 9 V motor, opto-isolated into the S7-1200:
TIA Portal Hardware Configuration
- Open the project and select the S7-1200 CPU in the device view.
- In the Properties > Digital inputs tab, locate the input used for the encoder (e.g., I0.0). Confirm that the input is HSC-capable on the selected CPU; CPU 1211C/1212C have 6 HSC-capable inputs on the onboard block, CPU 1214C/1215C/1217C expand this further.
- Set the input filter to a value appropriate for the encoder's maximum pulse frequency. The filter values for 1211C/1212C/1214C/1215C are: 0.1 µs, 0.2 µs, 0.4 µs, 0.8 µs, 1.6 µs, 3.2 µs, 6.4 µs, 12.8 µs, 0.1 ms, 0.2 ms, 0.4 ms, 0.8 ms, 1.6 ms, 3.2 ms, 6.4 ms, 12.8 ms. For a 9 V Fischer motor with low PPR, use the 6.4 µs or 0.1 ms setting to suppress contact bounce while still capturing low-velocity rotation.
- Add a new HSC in the PLC tag table or use the system HSC instance DBs (e.g.,
HSC_1for HSC 1, which maps to input I0.0 by default). - In the device configuration High Speed Counter (HSC) group:
| Parameter | Recommended setting for 5 V NPN single-phase |
|---|---|
| Operating phase | Single-phase |
| Counting direction | User-program controlled (via CTRL_HSC NEW_DIR) |
| Initial count value | 0 (or application-specific home) |
| Initial reference value | 0 |
| Reset input | Disabled, or wired to a Z index channel if available |
| Interrupt events | CV = RV (compare match), direction change |
Programming the HSC in SCL / LAD
The standard S7-1200 instruction for HSC runtime control is CTRL_HSC. A minimal SCL example for HSC_1 in OB1:
// Direction controlled by a BOOL tag, e.g. from HMI or logic
IF "Motor_Run_Forward" THEN
"HSC_1".NEW_DIR := FALSE; // count up
ELSE
"HSC_1".NEW_DIR := TRUE; // count down
END_IF;
// Enable HSC
"HSC_1".HSC := 1;
"HSC_1".DIR := FALSE; // FALSE = count up; TRUE = count down
"HSC_1".CV := 0; // not used here, leave 0
"HSC_1".RV := 0; // not used here, leave 0
"HSC_1".PERIOD := FALSE; // no periodic reset
"HSC_1".EN := TRUE;
// Read current count
#CurrentCount := "HSC_1".CV; // use instance-DB symbol or CV tag
In LAD, drop the CTRL_HSC instruction from the instructions palette (Counters > High Speed Counter) onto a network and wire the same parameters.
Commissioning Procedure
- Power the encoder only (motor free-wheel). Verify the 5 V supply with a multimeter at the encoder terminals.
- Hand-rotate the motor shaft. Monitor the opto-coupler output with an oscilloscope or logic probe. Confirm clean 0–24 V transitions with no ringing above 24 V (which would violate the S7-1200 input clamp spec of -30 V/+30 V).
- Connect the 24 V signal to the S7-1200 input. In TIA Portal, go online and watch the input status (tag table). It must toggle 0 → 1 on each encoder pulse.
- Open the HSC's
CV(current value) tag. It must increment in the chosen direction for every pulse. - Re-apply motor power with a current-limited bench supply. Confirm the count is stable at the expected RPM × PPR / 60 Hz value.
Verification Checklist
| Check | Expected result | Tool |
|---|---|---|
| 5 V rail at encoder | 4.75–5.25 V DC | DMM |
| Pull-up voltage (no rotation) | 24 V at PLC input | DMM |
| Input current | 4–6 mA | DMM in series |
| Pulse waveform | Square wave, < 5 µs rise/fall, no overshoot > 26 V | Oscilloscope |
| HSC count | Matches mechanical rotation direction | TIA tag table |
| Direction toggle | Count reverses within 1 scan of NEW_DIR write | Trace / watch table |
| No false counts at standstill | CV holds steady | Watch table, 60 s observation |
Troubleshooting Matrix
| Symptom | Likely cause | Action |
|---|---|---|
| HSC never increments | 5 V signal not reaching 15 V | Verify pull-up, opto-isolator wiring, V_OH on PLC input |
| HSC counts only in one direction | DIR input not configured or wrong polarity | Re-check HSC properties; assign DIR to a real input or program the NEW_DIR bit |
| Erratic count, spurious counts | Bounce or noise on 5 V line | Increase input filter (e.g., 1.6 ms), add 100 nF across PLC input, shield encoder cable |
| Count is half or quarter expected | Wrong counting mode (1x/2x/4x) on quadrature, or filter dropping pulses | Verify mode, slow the motor and compare to mechanical tachometer |
| SF (System Fault) LED on CPU | Wiring error, encoder power short | Inspect SF diagnostic buffer in TIA, isolate the 5 V rail |
| CV resets unexpectedly | Reset input or CV=RV interrupt firing | Review HSC event configuration, RV value, and reset input assignment |
Field-Notes and Caveats
- Resolution. The Fischer 153422 is a low-resolution encoder. If your application requires precision, mount a separate encoder (e.g., 1024 PPR PNP 24 V) on the output shaft and reserve the integrated one only for commutation or a coarse reference.
- Single-phase = no hardware DIR. Do not try to derive direction from a single channel; you cannot, by definition, distinguish forward from reverse rotation with one edge train.
- HSC vs. standard counter. Standard IEC counters (CTU/CTD) are limited to OB1 cycle time and lose pulses above ~ 1 kHz. Use HSC for any encoder signal above ~ 100 Hz.
- Ground loop. With the opto-isolated interface the encoder ground and PLC ground are isolated. If you replace the opto with a direct pull-up, bond the two grounds at one point only.
- Cable length. 5 V NPN edges degrade rapidly beyond 2–3 m. Use shielded twisted pair and keep the opto-coupler within 0.5 m of the encoder if possible.
- EMI on long runs. For runs above 5 m, switch to RS-422 differential encoder (5 V) using the SB 1221 5 V board, not single-ended 24 V after level shifting.
Reference Documentation
- Fischer 153422 Encodermotor 9 V datasheet
- Siemens Support: S7-1200 High Speed Counter sample program
- Siemens S7-1200 Programmable Controller System Manual, chapter 6 "High-Speed Counters"
Why does my 5 V NPN encoder not trigger the S7-1200 digital input?
Because the S7-1200 standard inputs switch at 15 V ON / 5 V OFF per IEC 61131-2. A 5 V signal sits in the indeterminate band. Add a 4.7 kΩ pull-up to 24 V (if the encoder tolerates 24 V on the collector) or use an opto-isolator level shifter from 5 V to 24 V.
Can a single-phase encoder give me a direction (DIR) signal?
No. A single-channel output carries no phase information, so direction cannot be decoded from the signal itself. You must either upgrade to a quadrature (A/B) encoder or set the direction in the user program via the HSC's NEW_DIR bit on the CTRL_HSC instruction.
What pull-up resistor value should I use for an NPN encoder wired to a 24 V S7-1200 input?
For a 24 V supply and ~ 5 mA sink current, R = (24 - 0.4) / 0.005 = 4.72 kΩ. Use a 4.7 kΩ, 0.25 W resistor. If the encoder's collector rating is below 24 V, use an opto-isolator with a 5 V pull-up on the encoder side and a 24 V pull-up on the PLC side.
Which TIA Portal counting mode fits a single-channel 5 V NPN encoder?
Use "Single-phase, count up/down". Drive the count direction either by a hard-wired DIR digital input on the CPU/SB or by setting the NEW_DIR parameter of the CTRL_HSC instruction in OB1.
Do I need a Signal Board (SB) to use the HSC with a 5 V encoder?
Not necessarily. The onboard 24 V inputs of the CPU will count if the 5 V signal is level-shifted to 24 V (pull-up or opto). An SB 1221 5 V DC input is only required when the encoder is a true 5 V differential (RS-422) device that you want to wire directly without level shifting.