Configuring Siemens FB41 PID for DC Drive Speed Control

Overview: Bidirectional DC Drive Speed Control with FB41

The Siemens standard PID block FB41 "CONT_C" from the STEP 7 V5.x Standard Library (folder Standard Library > PID Control Blocks > FB41..FB43) is one of the most widely deployed continuous PID controllers for SIMATIC S7-300 and S7-400 CPUs. It is commonly used to close a speed loop on analog-driven machinery, including DC drives commanded through a +/-10 V speed reference, 4-quadrant armature converters, or analog interface modules such as the 6RA70 series.

When the engineering requirement is a normalized setpoint and actual value in the range -100.0 ... 0 ... +100.0 % of rated speed, with motor rotation direction defined by the sign of the speed demand, FB41's PV_IN, SP_INT, and LMN signals map directly to that range without further conversion inside the block. The integration work is done around the block:

• Scale the raw analog input (e.g., PIW 0..65535) to -100.0 ... +100.0 using FC105 "SCALE" or FC106 "UNSCALE" on the way out.
• Configure LMN_HLM and LMN_LLM to +100.0 and -100.0 so the manipulated variable cannot exceed the drive's bipolar speed reference.
• Decide whether LMN drives the analog output directly, or whether it must be re-scaled by FC106 to a different engineering range (e.g., 0..27648 for a unipolar 6RA70 reference).
• Tune GAIN, TI, and TD for the mechanical time constant of the DC drive / load combination.

The block is suitable for moderately fast processes, but the loop bandwidth of a DC drive speed loop is bounded by the drive's own current-loop bandwidth and the tachogenerator / encoder resolution. Typical commissioning practice is to start with the drive's current loop tuned first, then close the speed loop with FB41.

Prerequisites: Hardware, Firmware, and Software

Before opening the editor, confirm the CPU firmware version tolerates the cyclic OB1 call. FB41 is designed for use in OB35 (cyclic interrupt) when a deterministic sampling rate is required. Calling it in OB1 with a long cycle time will degrade tuning stability.

FB41 CONT_C Signal Flow and Block Architecture

The internal structure of FB41 is a parallel-form PID with anti-windup, setpoint ramp, dead-band, and output slew limiting. From a programming standpoint, the engineer sees the following input and output pins.

For a continuous DC drive speed loop, the recommended signal chain is:

1. SP_INT ← operator panel / recipe (REAL, -100..+100).
2. PV_IN ← output of FC105 scaling PIW to -100..+100 %.
3. LMN → either a direct bipolar analog output (SM 332 in bipolar range) or the input of FC106 if the drive is unipolar with a separate digital direction signal.

Input Signal Scaling: FC105 for -100% to +100% Engineering Units

FC105 ("SCALE") converts an integer analog input word (PIW) into a real engineering value across a defined bipolar range. For a speed feedback signal that should land on -100.0 % ... +100.0 %:

• Set HI_LIM = 100.0
• Set LO_LIM = -100.0
• Set BIPOLAR = TRUE (the input range is bipolar +/-27648)
• Wire IN = PIWxxx, OUT → FB41.PV_IN

A typical call looks like the following in STL or LAD/FBD. LAD/FBD form is shown for clarity.

// In OB35, called every 100 ms:
//    SCALE: PIW 288 (6ES7331-7KF02 bipolar) -> MD 200 (REAL, -100..+100)
//    FB41 instance: DB 30 (background)
//    SP_INT source: MD 204 (operator)
//    LMN target:    PQW 290 (6ES7332 bipolar) or FC106 to PQW 290

CALL  "SCALE"
      IN        := PIW 288
      HI_LIM    := 1.000000e+002
      LO_LIM    := -1.000000e+002
      BIPOLAR   := TRUE
      RET_VAL   := MW 210
      OUT       := MD 200      // -> FB41.PV_IN

CALL  "CONT_C" , DB30
      SP_INT    := MD 204
      PV_IN     := MD 200
      PV_FAC    := 1.0
      PV_OFF    := 0.0
      DEADB_W   := 0.5
      GAIN      := 1.2
      TI        := T#2s
      TD        := T#0s
      LMN_HLM   := 100.0
      LMN_LLM   := -100.0
      DISV      := 0.0
      MAN       := 0.0
      MAN_ON    := FALSE
      LMN       := MD 208      // bipolar -100..+100
      LMN_FAC   := 1.0
      LMN_OFF   := 0.0

The bipolar FC105 output and the bipolar LMN drive the analog module's bipolar mode. On SM 332, configure the channel as "Voltage +/-10 V" in STEP 7 HW Config, otherwise the output clamps to 0..10 V even though LMN is negative.

Step-by-Step: Building the FB41 Instance DB and Wiring

Step 1 — Open the Standard Library

In the SIMATIC Manager, navigate to Libraries > Standard Library > PID Control Blocks. Drag FB41 CONT_C into your S7 program blocks folder. If your project does not yet contain FB100..FB105 and the matching UDTs, copy them in.

Step 2 — Create the Instance DB

Right-click FB41, choose Insert in S7 Program as > Instance DB, accept the default DB number (e.g., DB 30). The instance DB now contains the full CONT_C static data, including SP_INT, PV_IN, GAIN, TI, TD, integrator I_ITVAL, and so on. Mark the DB as non-optimized (classic S7-300 DB; "non-optimized" is automatic).

Step 3 — Create the FB call in OB35

For deterministic execution, place the call in OB35 (cyclic interrupt). On a CPU 315-2 PN/DP, OB35 can be configured to 100 ms by default. The call-out above is the canonical wiring.

Step 4 — Configure the analog input scaling

Use FC105 as shown above, with BIPOLAR = TRUE and LO_LIM = -100.0, HI_LIM = 100.0. If your tachogenerator is unipolar but the drive is bipolar (e.g., the drive reverses internally from a digital direction signal), use BIPOLAR = FALSE and a separate polarity bit to add the sign to the scaled value.

Step 5 — Wire the LMN to the drive

For a bipolar drive, route LMN directly to PQW in HW Config bipolar mode. For a unipolar drive with digital direction, call FC106 ("UNSCALE") to remap -100..+100 → 0..27648 and combine with a Q-bit direction: Q_negative = LMN < 0.0, ABS(LMN) → PQW.

Step 6 — Set LMN_HLM / LMN_LLM

Set both limits so that the integrator cannot run away into the saturation region of the drive. For a 4-quadrant drive accepting +/-10 V with a rated top speed of 100 %, use LMN_HLM = 100.0 and LMN_LLM = -100.0. If the speed reference is intentionally limited to +/-80 % of rated, set LMN_HLM = 80.0, LMN_LLM = -80.0.

Step 7 — Add operator enable and fault handling

The integrator can only stop accumulating if the loop is closed. A common fault is the FB41 call being bypassed when the drive trips, leaving the integrator railed. Add the following safety logic before the FB41 call:

// Drive OK and run enable, otherwise force PV_IN = 0.0 to bleed the integrator
// and zero LMN to ramp the drive down.
A "Drive_Ready";        // OK bit from drive
A "Run_Enable";         // Operator enable
= #Loop_Active;

// If loop is inactive, replace PV_IN with SP_INT to avoid error accumulation
// and force LMN to 0.0 externally by switching to MAN mode.

Use MAN_ON = TRUE, MAN = 0.0 when the loop is inactive. The PID is then a pure track-and-hold with anti-windup behavior.

Tuning the PID Branch: GAIN, TI, TD for a DC Drive

For a separately excited DC drive (e.g., SIMOREG 6RA70) the speed loop is typically the outer loop of a cascade; the inner current loop is closed by the drive itself at a bandwidth of 100..200 Hz. The mechanical plant, expressed in normalized speed as a function of torque, is a first-order lag with a time constant equal to the mechanical time constant of the load, T_mech = J · ω_n / M_load.

A practical starting-point set is:

Use Ziegler-Nichols open-loop step response as a starting point:

1. With TI = T#100s (effectively integral off) and TD = T#0s, set GAIN = 1.0.
2. Apply a small SP_INT step (e.g., 0 → 20 %).
3. Record the open-loop speed response. Measure the apparent time constant T_p and the steady-state plant gain K_p = ΔPV/ΔLMN.
4. Set GAIN ≈ 0.5 / K_p, TI ≈ T_p, TD = 0.
5. Close the loop and fine-tune for a critically damped response with a settling time of 3..5 × T_mech.

Output Limiting, Anti-Windup, and 4-Quadrant Drive Hand-Off

The two most important practical features of FB41 for a DC drive application are the LMN limits and the internal anti-windup. Setting LMN_HLM = LMN_LLM to asymmetric values is a common way to clamp a drive that should never reach 100 % even in error conditions.

For a winder/unwinder, the limit is asymmetric: a winder that is fed web from a master roll should be able to go to 110 % of rated speed for a short period to keep tension, but not below 0 %; the controller operates only in the positive quadrant. The same FB41 instance with LMN_HLM = 110.0, LMN_LLM = 0.0 handles this, and the drive is unipolar.

Anti-windup inside FB41 freezes the integrator when LMN is saturated. This is critical when the loop is opened, e.g., during a tacho loss. Without anti-windup, the integrator keeps accumulating SP_INT - PV_IN until the controller is re-engaged, and the output then jumps to the limit for an extended time. With the default FB41 configuration, anti-windup is automatic — verify by stepping SP_INT to a value above LMN_HLM and observing that I_ITVAL stops changing while LMN is clamped.

Bumpless transfer

To switch from manual to automatic mode without bumping the drive, FB41 supports MAN and MAN_ON. When MAN_ON = TRUE, the LMN tracks MAN and the integrator is forced to follow SP_INT - PV_IN = (MAN - PV_IN)/GAIN. To make a hand-off:

1. Set MAN = LMN (read from the previous automatic output).
2. Set MAN_ON = TRUE.
3. Wait at least one OB35 cycle.
4. Set MAN_ON = FALSE. The integrator is already aligned, so the output is unchanged.

Without this procedure, the drive will "kick" on a manual-to-auto transition because the integrator starts at zero.

Bidirectional Setpoint Handling and Error Polarity

A DC drive running in 4-quadrant mode with a bipolar speed reference has a sign convention that the engineer must make consistent across the program:

• SP_INT > 0 → forward direction, positive speed demand.
• SP_INT < 0 → reverse direction, negative speed demand.
• PV_IN must follow the same sign convention: a positive PV_IN means actual forward rotation.

If the tachogenerator is wired in reverse (negative voltage on forward rotation), either swap the field leads in the drive or invert the sign in the program. The simplest place is in the FC105 call: LO_LIM = +100.0, HI_LIM = -100.0, with BIPOLAR = TRUE. FC105 then outputs the sign-inverted value.

An engineer will frequently see this problem manifest as a positive feedback (runaway) when the loop is first closed. The classic symptom is the drive accelerating to the limit immediately, the integrator racking up against LMN_HLM, and the speed never settling. The fix is to invert the sign of either the feedback (tachogenerator leads) or the output, not to lower the gain. Lowering GAIN in this condition will not stop the runaway — only the polarity fix will.

Verification: Loop Monitoring, Trend, and Acceptance Test

After the program is downloaded to the CPU, perform this sequence to confirm the loop is correct:

1. Open-loop verification: Force MAN_ON = TRUE, set MAN to 0, +20, +50, +100, +50, 0, -20, -50, -100, -50, 0 % in steps. Confirm with a hand tachometer or the drive's own display that the actual speed is linear with MAN and the sign is correct.
2. Closed-loop step test: Set MAN_ON = FALSE, SP_INT = 0, wait for the drive to settle. Then apply a step 0 → +20 %. Observe the rise time, overshoot, and settling. A well-tuned loop overshoots < 10 % and settles in 3..5 × T_mech.
3. Direction reversal: Apply a step 0 → -20 % and confirm the drive reverses without sustained oscillation. If oscillation is present, increase TI or reduce GAIN.
4. Disturbance rejection: Apply a load step (e.g., engage a brake) and confirm the speed returns to setpoint within 2..3 × T_mech.
5. Limit clamping: Set SP_INT = 150 % and confirm LMN clamps at LMN_HLM and I_ITVAL stops growing.
6. Anti-windup recovery: Drop SP_INT to 0 % and confirm the loop responds immediately, not after a long delay caused by a saturated integrator.

Use a curve recorder on FB41's monitor screen to plot SP_INT, PV_IN, and LMN simultaneously. The variables are visible in the instance DB.

Troubleshooting Matrix

Migration Notes: FB41 vs TIA Portal PID_Compact / CONT_C

On a TIA Portal S7-300/400 to S7-1500 migration path, the equivalent function block is PID_Compact (V1.x in TIA V13, V2.x in TIA V14/V15, V3.x in TIA V16..V18). Pin mapping for the speed loop:

For an S7-1500 controller with a 6RA70 drive, the migration of a STEP 7 V5.x FB41 program into a TIA Portal project is supported by the porting tool, but field engineers should expect to re-tune. The PID_Compact block includes an auto-tuning function that, after a single step, will compute a new starting GAIN, TI, TD. The result is usually a good baseline but not a final tuning.

Field-Commissioning Checklist

1. Confirm hardware configuration in HW Config: SM 331 bipolar, SM 332 bipolar, tacho on channel 0.
2. Confirm FB41 and FC105/FC106 are loaded from the Standard Library in the S7 program.
3. Place FB41 in OB35 with cycle time = 100 ms (default).
4. Set LMN_HLM = +100.0, LMN_LLM = -100.0.
5. Set DEADB_W = 0.5 %.
6. Set GAIN = 1.0, TI = T#2s, TD = T#0s.
7. Open-loop verification with MAN_ON = TRUE.
8. Polarity check: positive SP_INT → positive PV_IN at steady state.
9. Closed-loop step test 0 → +20 %.
10. Tune to spec.
11. Document the final GAIN, TI, TD, DEADB_W, and LMN limits in the drive's commissioning record.

Frequently Asked Questions