Configuring Siemens PLC Hardware and Diagnostics Guide

Complete each check before moving to the next subsystem; otherwise, a power, bus, or configuration fault can be mistaken for a program defect.

Rack and module inventory

The backplane carries power and bus communication between installed modules. The term CPU here means the central processing unit that executes the PLC program. Identify every physical module before building or correcting the STEP 7 hardware configuration.

A reserved position is part of the rack layout; it is not an active I/O module. Moving or omitting that position can misalign the physical assembly and project representation.

1. Check 1: Compare the module designations, rack order, and reserved DM370 positions with the STEP 7 configuration. Expect a one-for-one physical-to-project match before applying or diagnosing field signals.

Power supply and backup provisions

Connect the specified 24 V DC supply with the correct polarity. The external 24 V supply and the internal DC5V status are different diagnostic points: the first enters the assembly, while the second indicates the PLC electronics supply. An illuminated DC5V indicator confirms the internal 5 V DC condition represented by that LED; it does not prove that every field output has its required load supply.

The backup battery supports retained content associated with the installed hardware. A BATF indication means the battery condition requires attention. Treat program storage on the Memory Card separately from battery backup: the card stores the PLC program, while the battery serves the backup function. Replacing or testing a battery does not correct a missing or invalid program on the card.

1. Measure the supply at the PLC connection and confirm a stable reading within the installed module's stated 24 V DC input range.
2. Apply power and inspect DC5V. Expect the indicator to show that the internal 5 V DC supply is present.
3. Inspect BATF. Expect it to be inactive during normal service; if active, service the backup battery according to the installed CPU documentation before relying on retained data.

Check 2: Expect valid 24 V DC at the supply terminals, an active normal DC5V indication, and no BATF indication.

CPU operating mode and program storage

The main CPU selector determines whether the controller executes the user program and whether online changes are accepted. Use the selector deliberately:

Wrong practice is treating M RES as a routine fault-acknowledge position. A memory reset changes the controller's memory state and is not a substitute for reading diagnostics. The exact actuation sequence and resulting retained content depend on the installed CPU documentation, so identify the recovery source before initiating it.

Fit the specified Memory Card when the application requires the program to be stored there. Confirm that the project being loaded belongs to the physical CPU and module arrangement already inventoried.

1. Place the selector in STOP for the controlled loading phase.
2. Insert or verify the Memory Card and load the intended hardware configuration and program.
3. Move to RUN-P only when online changes are needed; otherwise select RUN for execution.

Check 3: Expect the STOP indication while execution is inhibited and the RUN indication after the accepted program starts. Investigate diagnostics if the selected mode and illuminated status do not agree.

Signal modules and front connectors

The SM category covers digital and analog I/O. Supported signal forms in the described module range include 24 V DC and 120–240 V AC digital inputs, 24 V DC and relay digital outputs, analog voltage, current, resistance, and thermocouple inputs, plus analog voltage and current outputs. These are category possibilities, not interchangeable ratings for every signal module. Read the installed module marking and its channel data before landing conductors.

The front connector terminates field wiring at the module. The module door provides access and normally carries or protects identification information. A correct software address cannot compensate for a conductor landed on the wrong front-connector terminal, and a relay output must not be diagnosed as though it were a 24 V DC electronic output.

1. Classify each point as digital input, digital output, analog input, or analog output.
2. Match its electrical form—DC, AC, relay, voltage, current, resistance, or thermocouple—to the installed SM.
3. Trace each conductor from the field device to the documented front-connector terminal.
4. Compare the physical channel with the STEP 7 address and configured signal type.

Check 4: Exercise one channel at a time. Expect the online input state or analog value to follow the applied field signal, and expect the selected output terminal to respond only when its commanded channel is active.

Expansion and communication paths

Use IM360/361 or IM365 where the configured assembly extends through multiple rack levels. The interface modules carry the bus relationship between those levels; the physical interface path and the configured rack structure must agree before remote modules can exchange data with the CPU.

PPIRead the CPU or communication-module front label and configure the interface that physically exists. Do not substituteMPI, DP, point-to-point, or Industrial Ethernet settings merely because a programming cable fits another device.

1. Verify the interface-module pair and cable path between rack levels.
2. Match every configured communication participant to a physical CPU, I/O station, or communication processor.
3. Connect through the intended interface and confirm that STEP 7 reaches the correct CPU.

Check 5: Expect the central and expanded racks to appear in the configured structure, the intended CPU to be reachable, and no unresolved network participant to remain.

Status indicators and end-to-end verification

Status LEDs separate controller state from fault location. SF denotes a system fault, FRCE denotes a value forced from the computer, RUN denotes execution, and STOP denotes stopped execution. SF DP identifies a DP-related fault indication, while BUSF identifies a network or bus fault. A running CPU can still have an I/O, force, or communications problem, so the RUN LED alone is not an acceptance test.

1. Check 6: With the CPU stopped, expect STOP active and outputs in the application's defined stopped condition.
2. Check 7: Start the accepted program. Expect RUN active and STOP inactive.
3. Check 8: Inspect fault LEDs. Expect SF, SF DP, and BUSF to be inactive.
4. Check 9: Review online force status. Expect FRCE inactive before handing control to the process.
5. Check 10: Operate each representative input and output through the field device. Expect the physical point, online channel, and program response to agree.
6. Check 11: Confirm communications with every required rack or network participant. Expect all configured participants to exchange data without fault indications.

Frequently asked questions