Configuring Siemens PP17-II Pushbutton Panel via PROFIBUS DP

David Krause16 min read
ProfibusSiemensTechnical Reference
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1. System Overview: PP17-II as a PROFIBUS DP Slave

The SIMATIC PP17-II is a standardized pushbutton and pilot lamp panel manufactured by Siemens for direct integration into SIMATIC automation systems. The panel provides a fixed set of keys, each with an integrated LED, and exposes both the key states and the LED control as cyclic process data on a fieldbus. Three bus variants exist (MPI, PROFIBUS DP, and PROFINET), but on PROFIBUS DP the PP17-II behaves as a passive DP-V0 slave. The master CPU performs all cyclic polling; the panel itself contains no application logic and no programmable controller.

According to the Siemens product documentation (SIMATIC PP7, PP17-I and PP17-II Pushbutton Panels, support entry ID 4293776), the panel reduces installation effort by up to 90% compared with conventional wired pushbutton stations because all I/O is carried over a single bus cable. The PROFIBUS DP variant is documented in the PDF manual Pp717_e.pdf, which describes connection via MPI to a SIMATIC S7-200 and operation of the panel inside a PROFIBUS-DP system attached to a SIMATIC S7 panel or S7 CPU. The PROFIBUS product finder entry confirms the panel supports PROFIBUS DP, PROFINET, or MPI depending on the ordered variant.

Variant identification. The PP17-II bus variant is fixed at order time and cannot be changed in the field. The PROFIBUS DP variant is identified by its bus connector and the GSD file used to integrate it. The MPI variant cannot be brought onto a PROFIBUS DP master system, and the PROFINET variant requires a GSDML, not a GSD.

2. Hardware Topology and Prerequisites

Before commissioning the PP17-II on PROFIBUS DP, verify the following items are present:

  • SIMATIC PP17-II in the PROFIBUS DP variant.
  • S7 master CPU with an integrated DP master port (CPU 315-2 DP, CPU 317-2 DP, CPU 319-3 PN/DP) or an external CP 342-5 / CP 443-5 communications processor.
  • PROFIBUS DP cable (Siemens 6XV1 830-0EH10 violet, or compatible), terminated at both ends with 220 Ω bus terminators. The PP17-II typically includes a terminating resistor that can be switched on if it sits at the physical end of the segment.
  • STEP 7 V5.5 / V5.6 with Service Pack, or TIA Portal V13 or later, with the PP17-II GSD file installed.
  • A free PROFIBUS address for the slave. Slave addresses 3 through 32 are recommended; address 0, 1, and 2 are reserved for masters, masters with diagnostic repeater, and class-2 masters respectively.
  • 24 V DC supply for the panel logic, wired separately from the bus cable through the panel's power terminals.

The PP17-II draws its 24 V from the same backplane connector that carries the bus signals, so cable routing and EMC practices for PROFIBUS DP apply unchanged.

3. Installing the PP17-II GSD File

The PP17-II PROFIBUS DP variant requires the Siemens GSD file for HW Config or TIA Portal to recognize the device. The GSD is delivered as part of the support package attached to entry ID 4293776. Install it as follows:

3.1 STEP 7 V5.x

  1. Open HW Config and select Options > Install GSD File.
  2. Browse to the directory containing the extracted GSD files (typically SIEM*.GSD).
  3. Confirm the import. STEP 7 copies the GSD into the standard catalog and refreshes the device tree.
  4. Close and reopen HW Config. The PP17-II appears under PROFIBUS DP > Additional Field Devices > Push Button Panels > Siemens AG.

3.2 TIA Portal

  1. Open the TIA Portal project and switch to the Devices & Networks view.
  2. Select Options > Manage general station description file (GSD).
  3. Browse to the GSD file, install, and close. The PP17-II then appears in the hardware catalog under Other field devices > PROFIBUS DP > Push Button Panels.
  4. Drag the device onto the DP master system. TIA Portal prompts for the PROFIBUS address.
If the GSD file is missing or the wrong revision is installed, the PP17-II will not appear in the catalog and cannot be added to the project. Verify the catalog revision matches the panel's firmware version before commissioning.

4. PROFIBUS DP Slave Configuration in HW Config

Drag the PP17-II from the device catalog onto the PROFIBUS DP master system. Open the slave's Properties dialog and configure the following tabs:

4.1 General / Address Tab

  • PROFIBUS address: any unused slave address in the network.
  • Diagnostic interrupts: typically enabled for slot 0.
  • Baudrate: must match the master's baudrate (auto-detect on PROFIBUS DP).

4.2 Slot Configuration

The PP17-II exposes one input slot (key status) and one output slot (LED control). The slot lengths are dictated by the panel variant. For the standard configuration with 32 keys and 32 LEDs, the slot is 6 bytes input / 12 bytes output. Confirm the slot length against the panel's rating plate; do not assume.

4.3 I/O Address Assignment

The I/O addresses are configured in the same Properties dialog under the I/O Addresses tab. The most commonly deployed assignment in field installations is:

  • Input range: I address 56 ... 61 (6 bytes, 48 input bits)
  • Output range: Q address 54 ... 65 (12 bytes, 96 output bits)

These addresses are written into the master's process-image input (PII) and process-image output (PIQ) tables. They are not arbitrary — they must fall inside the configured process-image size of the CPU. The default process-image size of 128 bytes on S7-300 and S7-400 easily covers the PP17-II's allocation, but in dense configurations with many DP slaves, confirm that the highest assigned address does not exceed the process-image limit.

5. Process Image Address Mapping: Direct I and Q Access

A common point of confusion when commissioning the PP17-II on PROFIBUS DP is whether the configured slot addresses correspond to inputs/outputs in the I/Q process image, or whether they only appear in the M/DB area as they would on MPI. The answer for PROFIBUS DP is unambiguous: the I/O addresses assigned to a DP slave slot are mapped byte-for-byte into the master's process image. Therefore, the user-defined ranges I56 ... I61 and Q54 ... Q65 can be accessed in the PLC program as ordinary I and Q operands:

  • I56.0 ... I61.7 — 48 bits of key input data
  • Q54.0 ... Q65.7 — 96 bits of LED output data

The mapping from physical key number to bit offset is identical for the MPI and PROFIBUS DP variants. Siemens support confirms explicitly that the chapter 2.3 table of the manual applies equally to PROFIBUS DP, and that the configured I/Q addresses can be used in the same way as with MPI. There is no need for an intermediate DB or M-area staging step.

Process image and OB1. Inputs and outputs are read and written once per OB1 cycle from the process image. If the panel needs sub-millisecond response, force update with "L PIB 56" / "T PQB 54" for direct peripheral access instead of using the cached process image.

6. Reading Key Status

Each key on the PP17-II returns one bit in the input area. The exact key-to-bit assignment is documented in chapter 2.3 (Configuring Keys/LEDS) of manual entry 4293776. The example below illustrates a typical layout for the standard PP17-II with 6-byte input mapping:

Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
I56 K8 K7 K6 K5 K4 K3 K2 K1
I57 K16 K15 K14 K13 K12 K11 K10 K9
I58 K24 K23 K22 K21 K20 K19 K18 K17
I59 K32 K31 K30 K29 K28 K27 K26 K25
I60 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
I61 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved

Always confirm the exact mapping in the device manual, since revisions of the PP17-II may differ and reserved bits must not be evaluated as keys.

6.1 Reading a Single Key in LAD

Network 1: Read key K1 into flag
A   I 56.0     // K1 (refer to manual ch. 2.3)
=   M 100.0    // result flag

6.2 Reading All Keys into a Data Block (STL)

// FC 100 - Read PP17-II keys into DB200
L   PIB 56
T   DB200.DBB 0
L   PIB 57
T   DB200.DBB 1
L   PIB 58
T   DB200.DBB 2
L   PIB 59
T   DB200.DBB 3
L   PIB 60
T   DB200.DBB 4
L   PIB 61
T   DB200.DBB 5
BE

6.3 Edge Detection on Key Press

// FC 102 - Rising-edge detection on K1
A   I 56.0
FP   M 110.0     // edge bit flag
=   M 110.1     // one-cycle pulse on press

7. Writing LED Control

The LED outputs occupy the Q54 ... Q65 range. Setting a bit lights the corresponding LED; clearing the bit extinguishes it. Some PP17-II variants reserve certain bits for blink or strobe control — refer to chapter 2.3 of the manual before repurposing them. A typical layout for the standard configuration is:

Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Q54 H8 H7 H6 H5 H4 H3 H2 H1
Q55 H16 H15 H14 H13 H12 H11 H10 H9
... Continue per manual ch. 2.3
Q65 Reserved Reserved Reserved Reserved Reserved H34 H33 H32

7.1 Driving a Single LED (LAD)

Network 1: Light H1 when flag is set
A   M 50.0
=   Q 54.0     // H1

7.2 Driving All LEDs from a Data Block (STL, SFC 81 BLKMOV)

// FC 101 - Copy DB300.DBB0..DBB11 to Q54..Q65
CALL "BLKMOV"
SRCBLK  := P#DB300.DBX0.0 BYTE 12
RET_VAL := MW 300
DSTBLK  := P#Q 54.0 BYTE 12

For longer LED patterns, SFC 81 / SFC 83 ("UBLKMOV" for uninterruptible copy) provide alternative block-move primitives. Avoid writing individual PQB bytes in OB1 if deterministic update timing is required; consolidate the writes into a single block move.

7.3 Mirroring Keys to LEDs (LAD)

Network 1: Mirror K1 → H1
A   I 56.0     // K1
=   Q 54.0     // H1
Network 2: Mirror K2 → H2
A   I 56.1     // K2
=   Q 54.1     // H2

8. Manual Reference: Chapter 2.3

Chapter 2.3 of the PP7/PP17-I/PP17-II manual is titled Configuring Keys/LEDS and contains the authoritative bit mapping table. Per the manual, the same table used to configure keys and LEDs on MPI is also used for PROFIBUS DP — no separate PROFIBUS-specific mapping exists. The PDF version of the manual is available from Pp717_e.pdf on the Siemens support portal. The table covers:

  • Assignment of keys K1 ... K32 to input bits.
  • Assignment of LEDs H1 ... H32 to output bits.
  • Reserved bits for special functions (blink control, group diagnostics).
  • Byte order and endianness (Motorola / big-endian on PROFIBUS, consistent with DP-V0).
Always work from the chapter 2.3 table issued for the panel's firmware revision. Older firmware may have reserved bits in different positions than newer firmware.

9. STEP 7 Programming Examples

9.1 Complete Cyclic Handler (FC 200, STL)

// Read PP17-II keys and write LEDs every cycle
L   PIB 56
T   DB 200.DBB 0
L   PIB 57
T   DB 200.DBB 1
L   PIB 58
T   DB 200.DBB 2
L   PIB 59
T   DB 200.DBB 3
L   PIB 60
T   DB 200.DBB 4
L   PIB 61
T   DB 200.DBB 5

// Compute LED pattern from application DB
CALL "BLKMOV"
SRCBLK  := P#DB 300.DBX0.0 BYTE 12
RET_VAL := MW 300
DSTBLK  := P#Q 54.0 BYTE 12
BE

9.2 Functional Block for Key Latching (FB 50)

// FB 50 - Latch K1 press into setpoint
A   I 56.0
S   M 50.0      // setpoint latched
A   I 56.1
R   M 50.0      // K2 clears setpoint

Combine FB 50 with a separate OB1 call so that the latching logic is independent of bus scan timing.

10. TIA Portal Configuration Notes

When integrating the PP17-II in TIA Portal (PROFIBUS DP variant only):

  1. Import the GSD as described in section 3.2.
  2. Add the device to the DP master system and assign the PROFIBUS address.
  3. Open the device view and confirm slot 0 is configured for 6 bytes input / 12 bytes output.
  4. In the PLC tags, define the input tag area as I56..I61 (or symbolic) and the output tag area as Q54..Q65.
  5. Compile and download. Verify the panel in the online diagnostics view.

TIA Portal maps DP slave slots into the S7-1200/1500 process image in the same way as STEP 7. Symbolic I/O tags can be aliased to the I/Q addresses to give the application a more readable name space.

11. Verification and Online Diagnostics

Once the project has been compiled and downloaded to the CPU, verify communication as follows:

  1. Open HW Config online (PLC > Monitor/Modify). The PP17-II slave should display "OK" in the diagnostic overview; the slave's status LED should be solid green.
  2. Open the S7 CPU's variable table (VAT) and monitor I56.0 ... I61.7 while pressing keys on the panel. Each key press should toggle the corresponding input bit within a single PROFIBUS cycle (typically 1-10 ms with the standard baudrate).
  3. Force Q54.0 ... Q65.7 from the VAT and confirm that the corresponding LED illuminates. If a single LED fails to light while neighboring LEDs work, suspect the LED itself or a connector issue, not the bus.
  4. Read the slave diagnostics via SFC 13 ("DPNRM_DG") to retrieve the standard PROFIBUS DP diagnostic frame. A healthy PP17-II returns diagnostic bytes 0-5 with no error bit set and the extended diagnostic block (if any) reporting "no error".
  5. Inspect the CPU diagnostic buffer with STEP 7's PLC > Diagnostic Buffer. Look for "DP slave failure" or "station failure" entries; these pinpoint address mismatch or bus errors.

PROFIBUS baudrate affects latency, not address mapping. At 1.5 Mbit/s, the cyclic update of 6 input bytes + 12 output bytes takes roughly 1 ms plus the master's bus cycle time.

12. Cyclic Update Time and Bus Performance

Calculate the approximate panel update time as:

T_update ≈ T_bus_cycle + T_transfer

where T_transfer for the PP17-II's 18-byte payload (6 input + 12 output) is approximately:

Baudrate Max Segment Length Transfer Time (18 bytes) Typical T_update
9.6 kbit/s 1200 m ~30 ms 30-50 ms
187.5 kbit/s 1000 m ~1.6 ms 2-5 ms
1.5 Mbit/s 200 m ~0.2 ms 1-2 ms
12 Mbit/s 100 m ~0.025 ms 0.5-1 ms

For most HMI-style pushbutton applications, 1.5 Mbit/s is the practical optimum: it allows segment lengths up to 200 m and gives a cycle time below 5 ms while remaining robust on standard PROFIBUS cable.

13. Diagnostic Functions (SFC 13, SFC 51)

Standard PROFIBUS DP diagnostics on the S7 master CPU are accessed via the system functions listed below.

SFC / SFB Name Purpose with PP17-II
SFC 11 DPSYNC_FR Synchronize / freeze group commands on a DP master
SFC 12 DPINIT_DP Re-initialize the DP master (use after bus topology change)
SFC 13 DPNRM_DG Read standard slave diagnostic frame (6 bytes minimum)
SFC 51 RDSYSST Read system state (SSL) — gives detailed slave status list
SFB 52 RDREC Read acyclic record from a DP-V1 slave (not used on PP17-II)
SFB 53 WRREC Write acyclic record to a DP-V1 slave (not used on PP17-II)

The PP17-II is a DP-V0 device, so it does not support acyclic record reads (SFB 52/53) or DP-V1 interrupts. Limit diagnostics to SFC 13 (DPNRM_DG) and SFC 51 (RDSYSST) for this device.

13.1 Reading Slave Diagnostics (STL)

// Read 16 bytes of standard PP17-II diagnostic data
CALL "DPNRM_DG"
REQ     := TRUE
LADDR   := W#16#3FF       // diagnostic address of slave (from HW Config)
RET_VAL := MW 400
RECORD  := P#DB 500.DBX0.0 BYTE 16
BUSY    := M 401.0

Bytes 0-5 of the returned record are the standard DP diagnostic header; bytes 6+ contain vendor-specific extended diagnostics if present. The PP17-II typically reports only the standard header.

14. Troubleshooting Matrix

Symptom Likely Root Cause Verification Corrective Action
Inputs always 0, no slave diagnostic error Slave not in cyclic data exchange Check CPU diagnostic buffer for "DP slave failure" Verify PROFIBUS address and baudrate match HW Config; check terminating resistors
Inputs always 0, slave shows "station failure" Bus short or address conflict Measure bus voltage A-B (should be > 4 V differential with termination) Replace cable or remove duplicate address
Inputs read correctly but LEDs do not light LED bits not updated by CPU Force Q54-Q65 and monitor bus with PROFIBUS tracer Confirm output range matches HW Config; check 24 V supply
Keys register but with wrong key number Mapping table confusion (MPI vs PROFIBUS) Compare actual bit positions to chapter 2.3 table Re-align key references in PLC code to the documented mapping
Intermittent bus errors EMI, missing terminator, or excessive length Check baudrate vs segment length; verify both ends terminated Add terminator, reduce baudrate, or shorten cable
Process image overflow warning I/Q address outside process image Cross-check I56-I61 and Q54-Q65 against CPU process image size Extend process image size in CPU properties or move addresses
Slave "not found" in HW Config GSD not installed or wrong revision Re-open device catalog; look under pushbutton panels Re-install GSD per section 3
Inputs flicker under load Slave power supply sagging Measure 24 V at panel terminals under load Use a separate 24 V supply for the panel, or increase cable gauge
CPU goes into SF after download Slot length mismatch Compare slot config in HW Config with panel variant Adjust slot length to match panel (e.g., 6 in / 12 out)
Diagnostic buffer "identifier byte does not match" Wrong GSD revision Compare GSD identifier with panel rating plate Install GSD matching panel revision

15. Replacement Parts and Migration Notes

The PP17-II family has been phased out for new installations in favor of PROFINET-based pushbutton panels. For field-service and spare-part scenarios, consider the following migration paths:

From To Bus Impact Application Code Impact
PP17-II PROFIBUS DP, I56-I61 / Q54-Q65 PROFINET pushbutton panel (e.g., successor series) Re-cable from PROFIBUS to PROFINET; install GSDML in TIA Portal Re-assign slot addresses; same bit mapping applies per ch. 2.3 table
PP17-I MPI to S7-200 PP17-II PROFIBUS DP Add DP master interface or migrate to S7-300/400 I/Q addresses re-assigned in HW Config; same key/LED mapping table
PP17-II PROFIBUS DP, custom address range Same panel, replacement unit No bus change Verify replacement has same firmware; download identical HW Config

When migrating from the MPI variant to PROFIBUS DP, the same key/LED mapping applies, but the addressing changes from a fixed mapping to a slot-configurable one — therefore the I/Q addresses used in the user program may differ from the MPI defaults. Always re-derive the bit positions from HW Config rather than copying them from an MPI project.

16. Frequently Asked Questions

Are the PP17-II PROFIBUS DP addresses mapped as I/Q in the PLC or only as DB/M?

Under PROFIBUS DP the configured slot addresses appear directly in the master's process image as I (input) and Q (output) bytes. With the assignment I56..I61 and Q54..Q65, you can read keys via I56.0..I61.7 and drive LEDs via Q54.0..Q65.7 directly — no DB or M indirection is required, and the same bit access pattern used with MPI applies.

Does the MPI key/LED mapping table also apply to the PROFIBUS DP variant of PP17-II?

Yes. Per Siemens manual entry 4293776 (chapter 2.3 — Configuring Keys/LEDS), the same mapping table is used for the MPI, PROFIBUS DP, and PROFINET variants. Only the I/O address placement is re-configured per project; the key-to-bit and LED-to-bit assignments are identical across bus variants.

How many bytes does the PP17-II occupy in cyclic PROFIBUS DP data?

The standard PP17-II variant occupies 6 bytes of input (key status) and 12 bytes of output (LED control) in the DP cyclic data exchange. Configure these slot lengths in HW Config to match the panel variant; do not assume the slot length is universal.

Can I use the PP17-II on PROFIBUS DP without a GSD file?

No. STEP 7 requires the Siemens GSD file for the PP17-II to recognize the slave in HW Config. The GSD is available from the Siemens support portal under entry ID 4293776 and should be installed via HW Config > Options > Install GSD File before adding the device to the master system. The PROFINET variant requires a GSDML, not a GSD.

What is the recommended baudrate for the PP17-II on PROFIBUS DP?

The PP17-II supports all standard PROFIBUS baudrates from 9.6 kbit/s up to 12 Mbit/s. In practice, 1.5 Mbit/s is the most common industrial setting: it allows segment lengths up to 200 m, gives a cyclic update of approximately 1-5 ms for the 18-byte payload, and is robust on standard PROFIBUS DP cable.

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