Overview of the ABB Procontic B to S7-300 Migration
The ABB Procontic B is a modular, compact PLC platform that dominated European machine and process automation through the 1980s and 1990s. The system uses a tabular instruction list where every network combines Boolean operators (&, +, !) with operand symbols (E, A, M, S, T, Z) and a byte/bit address such as M 03,06. Siemens S7-300 systems running STEP 7 (or TIA Portal) represent the same physical signals as bit memories, I/O tags, IEC timers, and IEC counters inside a program block. The conversion task is therefore not a line-by-line translator; it is an architectural mapping from a contact-plan / step-chain program to a structured S7 program of OB / FB / FC / DB with a defined I/O image and process image.
This reference reconstructs the meaning of the Procontic B mnemonics shown in the source snippet, then derives an S7-300 mapping for each operand class, then provides a step-by-step migration procedure suitable for hand-conversion or for driving an automated translator. The two anchor documents are the ABB Procontic b Programmable Control System manual (2CDC120096M0201) and the ABB Procontic CS 31 Intelligent Decentralized Automation System manual (FPTN440004R2001).
Procontic B Instruction Set Quick Reference
The Procontic B source format is read line-by-line. Each line is either a Boolean condition prefix, a coil action, or both combined in a rung. The mnemonics appearing in the source snippet are summarized below.
| Symbol | Type | Meaning | S7-300 Equivalent |
|---|---|---|---|
! |
Boolean operator | NOT / negation of the following operand |
--|NOT|-- contact in ladder, NOT in STL/FBD |
& |
Boolean operator | AND link (series contact) | Series contacts in ladder |
+ |
Boolean operator | OR link (parallel contact) | Parallel branches in ladder |
= |
Output | Assign the accumulated RLO to the operand | Coil --( )-- in ladder |
=S |
Set latch | Set operand to 1, sticky until reset |
--(S)-- set coil |
=R |
Reset latch | Reset operand to 0 |
--(R)-- reset coil |
=N |
Negated coil | Assign inverted RLO |
--( / )-- negated coil |
In the source snippet the patterns =S A 06,08 and =S M 07,15 are set-latch coils driving an output and a flag respectively. The pattern ! T 01,08 followed by = T 01,09 indicates that timer T01 is enabled by a negated condition and its running/done state is wired into output T01.9 (the elapsed-time bit).
Procontic B Operand Types and Address Format
Every operand uses the format <SYMBOL> <BYTE>,<BIT>. The byte is decimal and the bit is decimal. So A 06,08 is byte 6, bit 8 of the output area (an unusual bit index; Procontic B often allows bits 0–15 inside a word that maps to two physical outputs).
| Symbol | Operand Class | Address Format | S7-300 Mapping |
|---|---|---|---|
E |
Digital input (Eingang) | E b,b |
I b.b in process image (PII), or IW for word access |
A |
Digital output (Ausgang) | A b,b |
Q b.b in process image (PIQ) |
M |
Flag / internal bit (Merker) | M b,b |
M b.b in Merker area; for retentive range use MB0–MB15 default or configure in HW Config |
S |
Step indicator (Schritt) | S b,b |
Non-IEC. Map to M b.b or to DB booleans inside an FB |
T |
Timer (Zeit) |
T n + index word |
TON, TOF, TP IEC timers; or legacy T0…T127 S7 timers |
Z |
Counter (Zähler) | Z n |
CTU / CTD / CTUD IEC counters, or legacy Z0…Z63
|
D |
Data word | DW n |
DBW or MW
|
A 06,08 maps to Q 7.0, not to Q 6.8 (which is invalid in S7).Step Chain (S) Operation and S7-300 Equivalent
The S operand in Procontic B is a step indicator tied to a step-chain sequencer. Each step in the chain has its own step bit. The line ! S 03,00 is therefore a query of step 3 bit 0 in negated form, used as a condition for whatever follows (AND link, coil, timer enable). The =S on a step address would be the latch that activates the next step; =R would reset the previous step. Procontic B expects the application programmer to enforce the "one-step-active" rule manually.
On the S7 side, three acceptable mappings exist:
-
Direct Merker mapping. Treat each Procontic step bit
S b,bas a flagM b.b. UseSET/RESETcoils in ladder. This is the closest hand-conversion when the chain is short (≤8 steps). -
Instance-DB mapping. Declare a step DB with booleans
Step[1]…Step[n]. The instance DB lives inside a step FB. Transitions become networks inside the FB and read/write the local DB tags. This scales better and survives download/upload with version control. - S7-GRAPH / GRAPH7. If STEP 7 Professional is licensed, port the chain to GRAPH where each step is a step box with transitions, alternative branch, parallel branch, and reset semantics. This is the recommended long-term target for any chain that exceeds eight steps or that includes parallel/alternative branches.
Local Flag (M / Merker) Operation
The source snippet shows & M 03,06 — an AND contact referencing flag byte 3 bit 6 — and =S M 07,15 — a set coil on flag byte 7 bit 15. These are the same shape as any I/O contact / coil in Procontic B; only the operand symbol is different. Procontic flags are volatile unless the user explicitly assigns them to a retentive area, which is done in the system configuration rather than in the program.
On the S7-300, flags live in the Merker area. The default Merker range is M0.0–M255.7, and the default retentive range is MB0–MB15. To preserve the Procontic retentive behavior:
- Open the S7 project in SIMATIC Manager.
- Right-click the S7-300 station → Object Properties → Retentive Memory.
- Set Number of retentive Merker bytes to cover the highest-used Procontic byte (round up to the nearest byte boundary).
If the Procontic program used M 07,15, that bit lands in M 7.7 under the recompute rule for high-bit addressing, or it lands in M 8.7 depending on byte ordering. Resolve the ambiguity against the printed Procontic I/O list before locking the mapping into the new program.
Timer (T) Behavior: On-Delay vs Off-Delay
Procontic B provides a small set of IEC-style timer functions. The ! T 01,08 line in the source snippet is an enable condition for timer T01, and the following = T 01,09 assigns the timer's elapsed-time bit to a coil. The exact timing mode depends on which sub-mode of T is used:
| Procontic Mode | Behavior | S7-300 Equivalent | IEC Equivalent |
|---|---|---|---|
T as on-delay (Einschaltverzögerung) |
Output goes true after the preset time elapses with input continuously true | S7 timer S_ODT (SE), instance DB |
TON |
T as off-delay (Ausschaltverzögerung) |
Output stays true while input is true, then drops after the preset time once input becomes false | S7 timer S_OFFDT (SA), instance DB |
TOF |
T as pulse / retriggerable |
Output true for the preset time starting from a rising edge | S7 timer S_PULSE (SI) or S_PEXT (SV) |
TP |
Migration Strategy: Three Valid Paths
Path A: ABB-Supplied Source Re-Import
ABB historically provided the option to obtain a printed or electronic source of a Procontic B application, which can be re-imported into ABB's programming environment and cross-compiled to a Function Block (FB) or Function Call (FC) for the S7 environment via an ABB conversion utility. If a current ABB service channel can deliver the source file (PLB / STL / AWL equivalent), this is the lowest-risk path because ABB preserves the step-chain transitions and timer modes internally.
Steps:
- Open an ABB support case through the official ABB service channel and request the source archive of the application, citing the controller serial number and project number on the nameplate.
- Receive the source file in the ABB-native format.
- Import into the ABB programming tool that targets the original CPU family.
- Recompile to an FB/FC export.
- Insert the exported FB/FC into the STEP 7 project as a library element with associated instance DB.
Path B: Hand Conversion with Ladder Equivalents
When the source is only available as a printed listing (the common case for older Procontic B machines), hand-convert each network into a S7 ladder segment. Use a fresh S7 project with a single FB per machine function and a global DB for retentive state.
The conversion table for the four lines in the source snippet becomes:
| Procontic Source | Reading | S7-300 Ladder Equivalent |
|---|---|---|
! S 03,00 |
Use the inverse of step indicator S3.0 as a condition | Series contact --|/|-- M3.0
|
& M 03,06 |
AND link with flag M3.6 | Series contact --| |-- M3.6
|
=S A 06,08 |
Set output A6.8 (recomputed as Q7.0) | Coil --(S)-- Q7.0
|
=S M 07,15 |
Set flag M7.15 (recomputed as M8.7) | Coil --(S)-- M8.7
|
! T 01,08 |
Enable timer T01 with negated condition | S7 timer S_ODT input conditioned by the inverted RLO, or feed --|/|-- T01_running into a TON block enable |
= T 01,09 |
Assign timer T01 elapsed-time bit | Coil --( )-- Q0.x driven from T01.Q
|
Path C: S7-GRAPH Rebuild
For complex chains, rebuild the sequencer in S7-GRAPH. Each Procontic step becomes a GRAPH step. Transitions are written directly in the GRAPH editor using the same conditions. Compile to FB and let GRAPH generate the interlock, supervision, and step-management logic that would otherwise need to be hand-coded.
Step-by-Step Hand Conversion Procedure
-
Inventory the original project. Print the full Procontic listing. For each network, write down the byte/bit address and the implied timing/sequencing function. Note every
TandZreference and the timing diagram that drives it. - Resolve the bit-address ambiguity. Before touching STEP 7, decide whether bits 8–15 of a byte are "high byte of the same word" (most common) or "low byte of the next word". Document the choice on the printout in red ink.
- Create the S7 project. In SIMATIC Manager (or TIA Portal), insert a SIMATIC 300 station matching the target CPU (for example, CPU 315-2 PN/DP, order number 6ES7315-2EH14-0AB0, firmware ≥ V3.3 for current STEP 7 versions).
-
Configure HW. Slot the I/O modules so that the PII / PIQ addresses match the Procontic E / A addresses after your chosen byte-shift rule. Confirm that digital inputs land on
I0.0…and digital outputs onQ0.0…unless the application requires more. - Set retentive memory. In the CPU object properties, set the number of retentive Merker bytes to cover the maximum Procontic M byte plus one for safety.
-
Insert an FB per machine function. Name each FB after its physical function (e.g.,
FB100_Conveyor,FB110_Clamp). Insert a corresponding instance DB. - Translate networks one by one. Within each FB, place a network per Procontic network. Use ladder (LAD). For step chains, use either Merker bits inside a dedicated "Step_DB" or build the chain in S7-GRAPH.
-
Translate timers. Replace each Procontic
Twith the appropriate S7 timer function block (S_ODT,S_OFFDT,S_PULSE,S_PEXT,S_ODTS). Use the legacy timer areaT0…T127if you want byte-tight retro-compatibility, or use IEC timers in instance DBs for modern portability. -
Translate counters. Replace each
ZwithS_CU,S_CD, orS_CUD(legacy) or withCTU/CTD/CTUD(IEC). - Wire OB1. Call the FBs from OB1 in scan order. Pass the I/O image and any global flags through the FB inputs.
- Compile and download. Save, compile (with full symbol resolution), and download to the CPU. Use "Download to target device" rather than "Download to memory card" for the first commissioning to keep the card image fresh.
Verification and Acceptance Test
A hand-converted program is not finished until it has been exercised in three modes.
- Offline simulation. Open the STEP 7 PLCSIM instance, force the inputs to mimic the Procontic test vectors, and watch the outputs. Step through each network with the "Monitor / Modify" tool to confirm that the bit recompute rule was applied consistently.
- I/O loopback on the bench. With the S7-300 wired to a bench rig, energize each input by hand and read each output with a multimeter. Build a checklist of (input → output → timer → counter) pairs and tick them off against the original Procontic test sheet.
- Side-by-side cold start. If the original Procontic hardware can be kept on a maintenance basis, run both controllers in parallel on the same physical I/O for a defined soak period. Compare each output cycle-by-cycle using a data logger on the digital outputs.
Common Pitfalls and Field-Proven Caveats
| Pitfall | Symptom | Fix |
|---|---|---|
| Bit-address recompute ignored | Random outputs flicker in unexpected patterns | Re-map every Procontic S/A/M b,b with the byte-shift rule documented on the printout |
| On-delay treated as off-delay | Outputs drop too early on a stop command | Re-check each T reference against the original timing diagram and switch S_ODT ↔ S_OFFDT
|
| Retentive Merker area not configured | Counters reset on power dip | Increase retentive Merker bytes in CPU properties |
| Step chain has parallel branches that were flattened | Two outputs energize at the same time | Move the chain into S7-GRAPH with explicit alternative / parallel branch |
| Scan time changed by an order of magnitude | Mechanical timing drifts, the machine "feels" different | Either tighten the S7 OB1 cycle with priority class reordering, or accept and re-tune the timers |
| Process image partition mismatch | Outputs update only on the next OB1 cycle, breaking fast interlocks | Assign the affected I/O to PIP1 and use U P1 / partial process image update |
Reference Mapping Cheat Sheet
| Procontic B Element | Address Form | S7-300 Target | Notes |
|---|---|---|---|
| Digital input contact | E b,b |
I b.b |
Bit recompute for high bits |
| Digital output coil | A b,b |
Q b.b |
Bit recompute for high bits |
| Flag / Merker | M b,b |
M b.b |
Retentive only if configured |
| Step indicator | S b,b |
M b.b or DBx.DBXy.0
|
GRAPH for complex chains |
| Timer on-delay |
T n on-delay mode |
S_ODT / TON
|
Time base = 100 ms typical |
| Timer off-delay |
T n off-delay mode |
S_OFFDT / TOF
|
Most often misread |
| Timer pulse |
T n pulse mode |
S_PULSE / TP
|
Use S_PEXT for retriggerable |
| Counter | Z n |
S_CU / CTU
|
IEC for new code |
| Set / Reset |
=S / =R
|
--(S)-- / --(R)--
|
Use a single network per pair |
Cross-Document References for the Conversion Engineer
- Anchor the conversion against the official ABB Procontic b manual: ABB Procontic b — Programmable Control System (2CDC120096M0201).
- For the successor CS 31 bus, which is sometimes mixed in legacy cabinets: ABB Procontic CS 31 Intelligent Decentralized Automation System (FPTN440004R2001).
- Confirm timer / counter / Merker semantics in the STEP 7 System and Standard Functions reference for the S7-300 / S7-400 family, which is the authoritative source for
S_ODT,S_OFFDT,S_PULSE,S_CU, and the bit-memory address space. - For S7-GRAPH sequencer semantics (interlocks, supervisions, hand/auto modes), refer to the S7-GRAPH programming manual that ships with STEP 7 Professional.
FAQ
What does the "!" symbol mean in a Procontic B program line?
The leading "!" is a logical NOT applied to the following operand. The line ! S 03,00 therefore means "use the inverse of step indicator S3.0 as a condition." In S7-300 ladder it becomes a normally-closed contact --|/|-- referencing the mapped step bit.
How do I map a Procontic B step-chain to S7-300?
For short chains, map each S b,b bit to a Merker bit M b.b or to a boolean in an instance DB inside an FB. For chains longer than about eight steps, or any chain with parallel or alternative branches, rebuild the chain in S7-GRAPH where each step, transition, interlock, and supervision is a first-class language element.
Are the timers in Procontic B on-delay or off-delay?
Both exist, and the source snippet alone does not declare which mode is used. Inspect the original program printout for the timer-mode column. An on-delay maps to S7 S_ODT (legacy) or IEC TON; an off-delay maps to S_OFFDT (legacy) or IEC TOF. Misreading the mode is the most common functional bug in a conversion.
How is byte/bit addressing in Procontic B different from S7-300?
Procontic B uses decimal byte and decimal bit separated by a comma, so M 03,06 is byte 3 bit 6. S7-300 uses a period as the separator and the same numbering, so the natural map is M3.6. However, Procontic B allows bit indices 8 through 15 in a single byte; S7-300 reserves those as the high byte of the same word. Apply a documented byte-shift rule on the printout before translating, otherwise outputs and flags will end up on the wrong physical terminals.
Can I obtain the original Procontic B source from ABB?
ABB service channels can in some cases supply the archived source for a Procontic B application when the controller serial number and project identifier are known. The source can then be re-imported into the ABB programming tool, cross-compiled to an FB/FC export, and inserted into a STEP 7 project. This is the lowest-risk path when it is available because ABB preserves the step-chain transitions and timer modes internally.