Converting Logic Gates to Ladder Diagrams in TIA Portal

1. Overview: From Combinational Logic to Ladder

Ladder logic (LAD) and Function Block Diagram (FBD) are the two graphical IEC 61131-3 languages that Siemens TIA Portal exposes for the S7-1200, S7-1500, ET 200SP and S7-300/400 controller families. Engineers who learned digital design with AND, OR, NOT, NAND, NOR and XOR gates often try to draw a 1:1 ladder rung for every gate symbol they have on paper. The first hard lesson is that ladder is a rung/branch language, not a gate-netlist language: the only atomic Boolean operations that are guaranteed to exist on every PLC are AND, OR and NOT, and they are expressed as contact networks rather than gate shapes.

This reference shows how to translate any two-input combinational logic equation into a minimal TIA Portal ladder rung (LAD), how to recognize when the Function Block Diagram (FBD) view is the better tool, and how the S7 scan cycle changes the meaning of a "read" versus a "write" of the same bit. A canonical Start/Stop seal-in circuit is dissected step by step so the time-dependence is visible, and a fail-safe E-Stop wiring convention is included at the end so the same pattern can be reused in machines that must meet ISO 13849 PL d or better.

2. Boolean Logic: The Three Atomic Operations

Any combinational logic expression, no matter how many inputs or how deeply nested, can be reduced to three atomic Boolean operations:

Every other gate is a compound. The most common compounds and their ladder-native form are listed below; the third column shows the form that minimizes ladder rungs in TIA Portal.

The reason the "optimal" form matters is that ladder has no standalone inverter coil (the IEC ¬ operator exists in STL/SCL and in some FBD blocks, but it is rarely exposed as a single contact). To invert the result of compound logic you must push the NOT down to the individual contacts by applying DeMorgan's laws, and then use normally-closed (NC) contacts -|/|- on the inputs.

3. Ladder Primitives Available in TIA Portal

Open the project, double-click Program blocks > Main [OB1], set the language drop-down to LAD, and the right-hand Instructions pane shows the following elementary contacts and coils under Bit logic operations:

A few S7-specific points that catch first-time users:

• NO and NC contacts are examine instructions, not energize instructions. The contact looks at the value of its tag and ANDs it with the rung state flowing in from the left.
• A single NO contact is, by itself, an AND of (incoming rung state) with (value of its tag). This is why ladder is sometimes described as a language of implicit ANDs.
• The -(/)- negated coil writes the logical NOT of the incoming power to the tag. It is the only place where a single NOT is expressible in pure LAD without using an NC contact, but it must be used with care because the result is non-obvious in the rung picture.
• Tags of type BOOL may be placed directly on contacts. Tags of type BYTE, WORD or DWORD cannot; you must extract a single bit with the syntax "TagName".X (e.g. "DB1".MotorStatus.X0).

4. Implementing AND, OR, NOT in TIA Portal LAD

Use the following patterns as a one-to-one translation table. All examples assume input tags %I0.0, %I0.1 and output tag %Q0.0.

4.1 AND — two NO contacts in series

     %I0.0     %I0.1         %Q0.0
   --| |------| |----------( )--

The rung state starts True at the left power rail. The first contact ANDs the value of %I0.0 with True; the second ANDs the value of %I0.1 with that result. The coil writes True to %Q0.0 only when both inputs are 1.

4.2 OR — two NO contacts in parallel

     %I0.0                      %Q0.0
   --+------| |-----------------( )--
     |                          
     +------| |--+

The branch -+ on the left splits the rung. Each branch is evaluated left-to-right. The right-hand +- terminates the parallel section and ORs the branch results back into the main rung state.

4.3 NOT — a single NC contact

     %I0.0         %Q0.0
   --|/|----------( )--

The NC contact passes power when %I0.0 = 0 and blocks power when %I0.0 = 1, so the output is the logical NOT of the input.

4.4 Compound AND/OR — mixing series and parallel

     %I0.0   %I0.1              %Q0.0
   --| |-----+--|/|--------------( )--
              |                 
              +----| |--+

This rung reads as Q0.0 = (I0.0 AND NOT I0.1) OR I0.2. Place the OR sub-network inside the branch and the AND chain on the main rung to keep the picture legible.

5. Building NAND, NOR, XOR in Pure Ladder

Apply DeMorgan before you start drawing rungs; do not try to wire an "inverter" on a coil.

5.1 NAND of two inputs

Naive: Q = NOT (I0 AND I1)
DeMorgan: Q = (NOT I0) OR (NOT I1)

     %I0.0                  %Q0.0
   --+--|/|----------------( )--
     |                     
     +--|/|--+

5.2 NOR of two inputs

Naive: Q = NOT (I0 OR I1)
DeMorgan: Q = (NOT I0) AND (NOT I1)

     %I0.0   %I0.1         %Q0.0
   --|/|-----|/|----------( )--

5.3 XOR of two inputs

Definition: Q = (I0 AND NOT I1) OR (NOT I0 AND I1)

     %I0.0   %I0.1            %Q0.0
   --+--| |---|/|------------( )--
     |                       
     +--|/|--| |-------------+

The top branch passes power when I0 is 1 and I1 is 0; the bottom branch passes power when I0 is 0 and I1 is 1. The two branches OR at the right +-, so the output is 1 only when the inputs differ.

5.4 XNOR of two inputs

     %I0.0   %I0.1            %Q0.0
   --+--| |---| |------------( )--
     |                       
     +--|/|--|/|-------------+

This is the equality comparator, sometimes used as a "matches" bit for hand-off-as-you-go (HAYG) sequencing.

6. FBD vs LAD: When to Switch Languages

TIA Portal lets the same tag be edited in either LAD or FBD by right-clicking the block and choosing Switch programming language. The IEC FBD view in TIA Portal (and the IEC blocks library) uses a graphic close to a logic-gate schematic:

Other vendors use different glyphs: Mitsubishi GX Works labels the block literally AND and OR, while Allen-Bradley / Rockwell uses the IEC text symbols but places the gate in a separate Function Block AOI rather than inline. If you translate a project from one platform to another, search the controller's help for the IEC 61131-3 common element name rather than the vendor-specific shape.

FBD is generally the right choice when:

• You have more than four inputs per gate and the rung would be wider than the monitor.
• You need an explicit NOT bubble on a pin, which FBD exposes by clicking on the connection dot and ticking Negate. The negation is then propagated automatically when the block is expanded.
• The logic is pure combinational with no latches, in which case FBD is exactly the gate schematic you started with.

LAD is the right choice when:

• The output is a coil, latch, or set/reset that must be traced by maintenance technicians who only read ladder.
• The logic includes time-based patterns (seal-in, one-shots, edge detection) that are visually obvious in ladder and hidden in FBD.
• The program is part of a Safety Integrated (F-CPU) project; LAD-F and FBD-F are the only graphical languages supported for the F-runtime group.

To switch globally per block: right-click the block in the project tree > Properties > General > Language. The choice is per-block; mixing LAD in OB1 and FBD in FC1 is normal practice.

7. Scan Cycle: Why Time Dominates Ladder

Every S7-1200 and S7-1500 runs OB1 in a fixed cycle. The cycle is, in order:

1. Read the process image of the inputs (PII) from the I/O modules into a memory snapshot.
2. Execute OB1 (and any FCs/FBs it calls) top-to-bottom, rungs left-to-right, branches top-to-bottom within a rung. Every contact reads from the PII or from the M/DB memory snapshot, never directly from the physical input.
3. Write the process image of the outputs (PIQ) out to the physical modules.
4. Run any cyclic OBs (OB30–OB38) configured for interrupt periods, then return to step 1.

Two consequences follow from step 2 that are not true of a logic-gate netlist:

• A coil never feeds back to a contact on the same rung in the same scan. The contact reads the value left over from the previous scan, the coil writes a new value. This is the entire reason seal-in (latching) circuits are possible and why a coil and a contact of the same tag can disagree during a single cycle.
• Branch order matters. A rung is evaluated top-to-bottom, and within a parallel network the top branch is examined before the bottom. If both branches assign the same output, the bottom branch wins (last write wins), so put the more restrictive / safety condition on the bottom branch.

The S7-1500 cycle is bounded by the configured monitoring time (default 150 ms for OB1). If OB1 takes longer, the CPU goes to STOP with diagnostic buffer entry Cycle time exceeded. Detailed timing and the OB1 priority class are documented in the S7-1500 System Manual, section 4.9 "Process images and cycle times".

8. The Canonical Start/Stop Seal-In Circuit

The Start/Stop circuit is the smallest ladder network that exercises every property of the scan cycle: a parallel branch (OR), a series chain (AND), an NC contact (NOT) and a coil that feeds back through a contact. Trace the following rung with tags %I0.0 Start (N/O pushbutton), %I0.1 Stop (N/C pushbutton, see section 9), %Q0.0 Run output coil.

    %I0.0  Start    %I0.1  Stop       %Q0.0  Run
   ---+---| |--------+---|/|-----------( )----
      |                                  
      |    %Q0.0  Run (seal-in contact)   
      +----| |----+

8.1 Step-by-step evaluation of one scan

1. Rung state begins True at the left power rail.
2. Branch -+ opens. The top branch is evaluated first.
3. Top branch: contact -| |- Start examines %I0.0 from the PII, ANDs with incoming True, output rung state = value of Start.
4. Branch +- closes. The top-branch result is saved, evaluation transfers to the bottom branch, which started at the matching -+.
5. Bottom branch: contact -| |- Run examines the current value of %Q0.0 (read from M/PIQ memory, written during the previous scan), ANDs with True, output = value of Run from last cycle.
6. Branch +- closes again. The two saved branch states are ORed. Result = (Start) OR (Run from last scan).
7. Series contact -|/|- Stop examines %I0.1 from the PII. Because the contact is NC, it passes power only when Stop = 0 (button released, wire healthy).
8. Coil -( )- Run writes the final rung state to the PIQ for %Q0.0. Because the S7-1500 updates the PIQ in step 3 of the next cycle, the new value of Run does not appear at the bottom contact until the scan after this one.

8.2 Truth table

Key observation: when both Start and Stop are pressed simultaneously (rows 7 and 8), Stop wins. This is a hard-coded safety property that comes for free from the topology; you do not need an additional interlock rung for it.

9. E-Stop Wiring: Physical N/C, Program N/O

For any hard-wired emergency stop that is part of a safety circuit, the convention is:

• Physical button: Normally Closed (N/C) contact, wired such that the input terminal is held at 24 V when the button is released (healthy) and pulled to 0 V when pressed or when the wire breaks.
• Program contact: Examine as N/O -| |-. The contact then evaluates to True (passes power) when the wire is healthy, and to False when the operator presses the button or when the wire falls off.

The dual benefit is fail-safe detection: a wire that breaks on a normally-open button would leave the input stuck at 0 and the machine would not stop on demand. A wire that breaks on a normally-closed button also reads 0, but now 0 is the stop state, which is the only acceptable direction to fail in. This is the same rationale behind IEC 60204-1 section 9.2.5.8 (emergency stop) and ISO 13849-1 category 1 / PL c wiring practice for non-redundant stop circuits.

If the only operator interface is an HMI button, there is no physical wire to fail and the N/C convention cannot apply. In that case the Stop path must still be implemented in code, but it cannot be considered fail-safe: a dead HMI panel or a stuck touchscreen pixel may prevent the operator from stopping the machine. The conservative design is therefore a physical E-Stop mushroom button on the panel in parallel with the HMI button, and the rung evaluates the AND of (E-Stop N/C input) with (HMI Stop BOOL) so the HMI cannot mask a hard-wired stop.

10. Verification: Tracing and Monitoring in TIA Portal

Once the rung is built, the only way to be sure the Boolean translation is correct is to exercise it under the online monitor. The standard TIA Portal workflow is:

1. Compile the project (Project tree > PLC > Compile > Software (rebuild all)). Compilation errors that block the download are listed in the inspector pane under Info > Compile.
2. Download to the CPU (Online > Download to device). For an S7-1500 this is over TCP/IP; you may need to set the PG/PC interface to the right NIC in Online > Accessible devices.
3. Go online with the OB (right-click Main [OB1] > Monitor / Modify). The rung switches to green energy-flow highlighting: energized contacts and coils show a solid green line, de-energized show blue.
4. Use the Modify tab to force %I0.0 = 1 and observe that the bottom branch (seal-in contact) is still blue until the next scan, when it turns green and the output latches.
5. Force %I0.1 = 1 (simulating Stop pressed) and confirm the coil turns off within one scan and stays off even when Start is also forced on.
6. Open Online > Diagnostics > Cycle time to confirm OB1 is finishing well below the monitoring time (typical: <5 ms for a small program on an S7-1511, <1 ms for the Start/Stop rung alone).

A common mistake is to assume that the seal-in contact is energized on the same scan as the Start input. The monitor view disabuses you of this on the first test: on scan N, the coil turns on, and the bottom-branch contact does not turn green until scan N+1. This is the read-before-write property of the scan cycle in action.

11. Common Pitfalls and Field-Proven Caveats

12. Quick Reference: Gate-to-LAD Cheat Sheet

13. Related Standards and Further Reading

The grapheme-to-semantics mapping in TIA Portal is defined by the IEC 61131-3 standard, "Programmable controllers — Part 3: Programming languages". The S7-1500 LAD/FBD language reference is in chapter 5 of the S7-1500 System Manual. The cycle-time and process-image behavior is in chapter 4 of the same manual. For F-CPU (fail-safe) variants, the E-Stop wiring and F-runtime group rules are in the S7-1500F System Manual. The TIA Portal help itself (press F1 on any contact or coil) shows the truth table for that instruction inline, which is the fastest way to verify a translation on the spot.