Counting Flowmeter Pulses on S7-314C-2 PN/DP: Best Practices

Problem: Lost Pulses on a SIMATIC S7-300 Cycle-Based Read

A gas flowmeter that emits a pulse for each incremental volume (for example 0.1 lb/pulse, 1 m³/pulse, or 10 L/pulse) is the most common form of volume totalization transducer. The transmitter drives a 24 V solid-state open-collector or push-pull output that goes high for a defined pulse width. The PLC is expected to count every transition and integrate it against a K-factor to derive either instantaneous flow or totalized volume.

When a technician reports that "the PLC misses pulses," the root cause is almost never the flowmeter. The cause is the mismatch between the flowmeter's pulse event timing and the PLC's input acquisition timing. The standard reading model in SIMATIC S7-300 is the OB1 scan: the CPU reads the process image (PII) once at the start of OB1, executes the program, and writes the process image (PIQ) at the end. Any pulse that occurs between two PII updates and that returns to its idle state before the next read is invisible to the application code. This is the classic single-sample aliasing problem applied to digital inputs.

Three counter approaches exist on the CPU 314C-2 PN/DP (6ES7314-6EH04-0AB0):

1. Cycle-polled digital input (OB1 PII read) – the failing method.
2. Hardware interrupt OB (OB40) on a configured DI channel – event-driven but interrupt-rate limited.
3. Integrated high-speed counter (HSC) channel – hardware counting independent of OB1.

For any flowmeter that can produce pulses at rates approaching or exceeding 10 Hz, the integrated HSC is the only deterministic choice. The HSC channel latches every edge in silicon and exposes a 32-bit DINT count register that OB1 reads at its leisure. Nothing in user program execution time can lose a pulse.

S7-314C-2 PN/DP Counter Hardware Overview

The CPU 314C-2 PN/DP combines a standard S7-300 CPU with an integrated technology section. The integrated I/O occupies backplane slot 0 and provides 24 DI, 16 DO, 5 AI (4…20 mA / ±10 V) and 2 AO. The DI section is split into two functional groups:

DI Channel	Default Function	Max Frequency	Filter
DI 0.0 – DI 0.3	Standard process input	Cycle-limited (PII)	0.1 / 0.5 / 3 / 15 ms (configurable)
DI 0.4 – DI 0.7 (or HSC0/1/2 dedicated inputs)	HSC channel A, B, N	60 kHz count / 200 kHz with 4× evaluation	0.1 µs – 20 ms

Up to three independent HSC channels are available (channel 0, 1, 2). Each channel has track A, optional track B for direction or quadrature, and an optional hardware gate (DI) that opens and closes the counting window. The count value lives in the I/O area as a 32-bit value. The integrated counter also provides:

• Comparison values (CMP0, CMP1) with on/off compare output and HW interrupt.
• Zero-crossing detection and overflow/underflow HW interrupt.
• Software or hardware gate (latch and re-load).
• Frequency measurement mode and period measurement mode (favor these for diagnostic feedback of actual flow rate).

Reference: SIMATIC S7-300 CPU 31xC Technological Functions manual, chapter on "Counting, Frequency Measurement and Pulse Width Modulation" (entry ID 109751787 on the Siemens Industry Online Support portal).

Pulse Budget Analysis – Why Polling Always Loses

Before choosing a method, calculate the pulse budget for the application.

Worst-case pulse frequency:

f_max = Q_max × K / 3600

where Q_max is the maximum flow rate in the engineering unit per hour, and K is the K-factor in pulses per unit. A typical gas flowmeter that produces one pulse per 0.1 lb at 100 lb/h produces 1000/0.1 = 1000 pulses per hour, or 0.28 Hz. A larger line at 10 000 lb/h with the same K-factor produces 27.8 Hz. With a K-factor of 1 m³/pulse and 1000 m³/h, the rate is 277 Hz. With a K-factor of 0.01 m³/pulse and 3600 m³/h, the rate is 100 000 Hz – this exceeds the HSC limit of 60 kHz on the 314C-2 and requires a different platform or a divider prescaler on the flowmeter.

Pulse width duty constraint:

If the flowmeter datasheet specifies a pulse width T_pw of 150 ms (as is common for low-frequency mechanical flowmeters), the maximum event rate with 50% duty cycle is f_max = 1 / (2 × T_pw) = 1 / 0.30 = 3.33 Hz. With shorter off-time the theoretical ceiling is 1/T_pw = 6.67 Hz, but real flowmeters are usually 50% symmetric.

CPU scan time constraint:

An OB1 cycle of 10 ms can resolve, in the best case, transitions 10 ms apart, so a 50 Hz stream of 10 ms pulses will be aliased to whatever the input filter passes. The PII input filter of 3 ms (default) further limits resolution.

Decision table:

Pulse Rate	OB1 Polling	OB40 Interrupt	Integrated HSC
< 1 Hz	Often acceptable	OK	OK (overkill)
1 – 50 Hz	Risky	Marginal (depends on OB40 latency)	Recommended
50 Hz – 60 kHz	Fails	Fails	Only viable option
> 60 kHz	Fails	Fails	Replace platform (e.g. ET 200S counter module) or change flowmeter K-factor

Method 1: Integrated High-Speed Counter (Recommended)

The HSC channel is configured in the device view of TIA Portal, in the properties of the CPU under "Counter" → channel 0/1/2. The CPU writes the configuration to a data record (DS 0) and to the I/O addresses; the count register is then memory-mapped at the address shown in the I/O assignment list. The user program simply reads that address with a normal MOVE / L PED instruction; no special function block is required.

Configuration steps in TIA Portal (CPU 314C-2 PN/DP):

1. Open the project, double-click Devices & networks → CPU 314C-2 PN/DP.
2. In the device view, expand Integrated I/O and select Counter in the properties tree.
3. Enable Channel 0. Set Operating mode = Count, continuous.
4. Set Signal evaluation = Single (use Double or Quadruple only for incremental encoders with A/B phases).
5. Set Count direction = Up for volume accumulation (or User-defined if you wire track B for direction).
6. Set Upper count limit = 2 147 483 647 (DINT max) unless a custom rollover value is required by the flowmeter's K-factor scaling.
7. Set HW gate = Cancel count (count runs while gate is high; cancels on gate close). If you need continuous counting regardless of program state, leave the gate permanently wired high or set it to Counting always active in the DI configuration.
8. Set Input filter for the HSC inputs. The default 0.1 µs filter is correct for pulse counting; a 3 ms filter is intended for normal DI use and will alias any signal above 160 Hz.
9. Enable Hardware interrupt on comparison event and/or Hardware interrupt on zero crossing if the application needs to trigger an OB40 on count thresholds (for example, end-of-batch).
10. Compile and download hardware configuration.

Reference: SIMATIC S7-300 Automation System — System Manual, entry ID 109744821 for I/O addressing details and data record structure of the integrated counter.

Reading the Count in User Program

ST code snippet for OB1 cyclic read:

// OB1 - cyclic portion
// Latched count is at input address ID 1000 (default for HSC0)
// See "I/O addresses" tab in TIA Portal device configuration
#HSC0_Raw : DWORD; // Tag linked to the HSC count input
#HSC0_Latched : DWORD; // Optional: use L PEC to read latched value

#HSC0_Latched := "HSC0_Latch_Input"; // L PEC on configured address
"DB_Totalizer".PulseCount_DINT := "DB_Totalizer".PulseCount_DINT + DWORD_TO_DINT(#HSC0_Latched - #HSC0_Previous);
#HSC0_Previous := #HSC0_Latched;

The differential read (current - previous) protects against lost updates and lets you add into a 64-bit accumulator (two DINTs) to handle the 2^31 rollover.

Rollover Handling

At 2 147 483 647 counts the HSC wraps to −2 147 483 648 unless an upper count limit and interrupt were configured. The clean technique is to add the differential into a 64-bit accumulator and never rely on the raw count value:

// Totalizer DB (S7-300 / 400 compatible, no LWORD on 314C)
DATA_BLOCK "DB_Totalizer"
  STRUCT
    Pulses_Hi : DINT;   // upper 32 bits of 64-bit accumulator
    Pulses_Lo : DINT;   // lower 32 bits of 64-bit accumulator
    Volume_Real : REAL; // engineering unit display only
    FlowRate_Real : REAL; // engineering unit per hour, display only
    K_Factor : REAL;    // pulses per engineering unit
    SampleTime : TIME;  // 1 s typical for flow rate
  END_STRUCT
END_DATA_BLOCK

Addition of the 32-bit differential into a 64-bit accumulator uses the carry from DINT addition:

// Add #Delta (DINT) into 64-bit accumulator Pulses_Hi:Pulses_Lo
#TempSumLo : DINT;
#Carry : BOOL;
#TempSumLo := "DB_Totalizer".Pulses_Lo + #Delta;
IF #TempSumLo < "DB_Totalizer".Pulses_Lo THEN
  #Carry := TRUE; // overflow into high word
END_IF;
"DB_Totalizer".Pulses_Lo := #TempSumLo;
IF #Carry THEN
  "DB_Totalizer".Pulses_Hi := "DB_Totalizer".Pulses_Hi + 1;
END_IF;

To convert the 64-bit total into REAL for HMI display, use a scaling block or scale manually by reading the high DINT in REAL and adding the low DINT scaled by 2^32 only at the display boundary.

Method 2: OB40 Hardware Interrupt on a Standard DI

When the HSC channels are already used elsewhere, or when the pulse rate is below 1 Hz, the second-best option is to enable a hardware interrupt on a DI channel and increment a software counter inside OB40.

Configuration steps:

1. In device view, select a DI channel (e.g. DI 0.0) and set Hardware interrupt = Rising edge.
2. Assign the interrupt to OB40 in the same dialog.
3. Download hardware configuration.

OB40 in STL / SCL:

// OB40 - Hardware Interrupt
// OB40_EXIST = B#16#1, OB40_IO_FLAG indicates new event
IF "DI_HW_Int_Flag" = TRUE THEN
  // Edge-triggered: increment once per call
  "DB_FlowCounter".PulseCount_DINT := "DB_Flowcounter".PulseCount_DINT + 1;
  // Optional: clear event flag if the CPU did not auto-reset
  "DI_HW_Int_Flag" := FALSE;
END_IF;

OB40 is itself a task; its execution time, priority class (16 by default, configurable), and the time the operating system takes to enter the OB all influence whether a second pulse is lost. Consecutive OB40 events with a period shorter than the OB40 execution time + interrupt latency will be queued by the CPU. The 314C-2 supports a small interrupt queue (typically a few events) and any overflow sets an OB overflow diagnostic. Always check the OB40 execution time with the S7 online → block consistency / cycle time tools, and never place heavy logic in OB40.

Why OB1 Polling Fails

The PII update time is governed by OB1 priority and cycle time. On a 314C-2 with the default configuration, OB1 runs in the 5–25 ms range depending on program size. A pulse that arrives at, for example, t = 12 ms, is high for 1 ms, and is low by t = 13 ms, may either be sampled high (PII bit = 1) or not sampled at all (PII bit = 0), depending on the exact moment the PII is updated. There is no reliable way to capture pulses faster than 1 / (2 × scan time). For a 10 ms OB1 cycle, the effective maximum countable rate is 50 Hz, and in practice the aliasing gives non-monotonic counts.

Additionally, the DI input filter on the standard 314C-2 inputs is 0.1 ms / 0.5 ms / 3 ms / 15 ms. The default 3 ms filter is appropriate for switch debouncing but eliminates every pulse shorter than 3 ms. Flowmeter pulses below 3 ms width are silently dropped. If the DI filter is set to 0.1 ms, high-frequency noise can corrupt the count.

Flow Rate and Volume Calculations

Instantaneous flow rate (engineering units per hour):

Q = (ΔN / Δt) / K

where ΔN is the pulse count in the sample window, Δt is the sample window in seconds, and K is the K-factor in pulses per engineering unit. For K-factor given as pulses per gallon: Q_gph = (ΔN / Δt) × 3600 / K.

Totalized volume:

V = Σ(N_i) / K

Totalization must be performed in DINT or 64-bit integer; only the final display value should be cast to REAL. Converting intermediate counts to REAL and back is the most common source of drift and floating-point rounding error seen in totalizer applications.

Wiring and Electrical Limits

The 314C-2 HSC inputs (DI 0.4–0.7 by default) are 24 V DC IEC 61131-2 type 1 inputs. Wiring rules:

• Use a shielded twisted pair from the flowmeter to the CPU. Ground the shield at the cabinet entry, not at the flowmeter.
• For pulse output > 25 m cable, use a flowmeter with a push-pull (totem-pole) output, not open-collector, or add a shielded signal conditioner.
• Common the 24 V field supply and the CPU 24 V supply; do not double-feed the input from two isolated supplies.
• Sink the open-collector output to the same 24 V common. Provide a pull-up (typically 4.7 kΩ) to 24 V if the flowmeter output is open-collector NPN.
• Maximum input voltage on DI: 30 V DC continuous; 35 V DC for 0.5 s. Polarity reversal protection is provided.
• Maximum counting input frequency: 60 kHz in single evaluation, 200 kHz in quadruple evaluation (A/B quadrature only).

Reference: SIMATIC S7-300 S7-300 CPU 31xC: Technical Specifications, entry ID 109751801.

Diagnostic and Verification Steps

1. Open TIA Portal online view. Expand CPU 314C-2 PN/DP → Distributed I/O → Integrated I/O → Counter. The current count, status word (STS), and gate state (GATE) are visible in real time.
2. Force the hardware gate high (or short the gate input to 24 V). The status bit GATE_STS = 1 indicates the counter is actively counting.
3. Apply a known-frequency source (signal generator or calibrated flowmeter) at 1 Hz and confirm the count advances by 1 per second. Repeat at 10 Hz, 100 Hz, 1 kHz to confirm the upper limit.
4. Monitor the SFC 59 / RD_REC diagnostic buffer for OB40 overflow events if OB40 is in use.
5. Trigger a comparison event (CMP0) and verify the configured HW interrupt fires OB40 exactly once per crossing.
6. Run a 24-hour totalization test: compare the HSC count against a known reference volume (calibrated prover, weigh scale, or master meter). Acceptable error is ±0.05% for class A flowmeters.

Troubleshooting Matrix

Symptom	Likely Cause	Diagnostic	Fix
Count always zero	DI filter too long; HSC not enabled; pulse polarity inverted	Check STS bits, oscilloscope on input	Set filter to 0.1 µs, enable HSC, verify polarity
Count off by 2× or 4×	Quadrature mode active on a single-track pulse	Read count mode in device config	Set signal evaluation to Single
Count drifts high at low rates	Noise / contact bounce; filter too short	Scope the input	Add 0.5–1 µs filter or use Schmitt trigger conditioner
Count resets unexpectedly	SW gate wired to a DI that is bouncing	Monitor GATE_STS	Hold gate high or use HSC "counting always active"
Overflow at 2 147 483 647	No 64-bit accumulator in user program	Check totalizer DB	Implement 64-bit accumulator as shown above
OB40 fires repeatedly, count doubles	OB40 set to both edges	Check DI hardware interrupt settings	Configure to single edge (rising or falling)
Count drops under heavy CPU load	OB1 polling on standard DI	Measure OB1 cycle time	Move to HSC channel

Field-Proven Implementation Checklist

• Use HSC channel 0 for the primary flowmeter. Reserve channel 1 for a verification / redundant flowmeter. Reserve channel 2 for a prover pulse counter if a meter proving skid is installed.
• Configure both CMP0 (set) and CMP1 (clear) on a fixed cycle count for an end-of-batch OB40. Do not use OB1 to detect count thresholds.
• Set the DI input filter for HSC inputs to 0.1 µs. Do not leave the default 3 ms filter on HSC channels.
• Enable a hardware interrupt on upper count limit and route it to OB40 to log the rollover event.
• Store the K-factor as a configurable HMI tag in the totalizer DB. Do not hard-code the K-factor in FB source.
• Disable the SW gate during commissioning and re-enable it for production.
• Tag the HMI totalizer display with the engineering unit and the count update timestamp for traceability.

Frequency Measurement as Diagnostic Feedback

Use the HSC channel in Frequency measurement mode for the first 10 seconds of commissioning. The CPU outputs the measured frequency at the configured I/O address; the HMI can graph the value over time and the engineer can verify that the flowmeter is producing the expected pulse rate against a known flow. This is the fastest way to debug a wiring problem: a flowmeter that produces no frequency output points to a wiring or polarity issue, not a software issue.

FAQ