Generating Binary Output Sequences on LOGO! 0BA7 for Test Benches

Application Overview

Binary-coded output sequences are required to validate end-of-arm tooling, integrated positioners, valve islands, and rotary cam limit switches whose command set is a parallel BCD or Gray-free position word. A typical sequence of eight positions expressed in straight binary looks like:

The challenge is implementing this sequence on a controller with limited resources. The Siemens LOGO! 0BA7 (12/24 V variant) provides 24 digital inputs and 16 digital outputs in its base configuration, which is sufficient to drive four data lines, one strobe line, and reserve inputs for Start/Stop/Reset pushbuttons. This article documents the recommended implementation strategy, the zero-exclusion problem with the LOGO! random generator, and a deterministic alternative using the shift-register and counter blocks in LOGO! Soft Comfort.

Prerequisites

• LOGO! 0BA7 base module with display: 6ED1052-1MD00-0BA7 (LOGO! 12/24 RCE) or compatible variant.
• LOGO! Soft Comfort V8.x (or later) installed on the engineering PC.
• Ethernet or USB programming cable (LOGO! 0BA7 supports the Ethernet RJ45 port on the back of the base module).
• A digital I/O expansion module if more than 5 outputs are required downstream of the test bench wiring.
• Reference manual: LOGO! 0BA7 System Manual (Siemens Industry Online Support).

I/O Allocation

Reserve inputs and outputs before writing the program. The following table is the recommended mapping for an eight-position sequence with hand-jog controls:

Why a Random Generator Is Not the Right Tool

LOGO! Soft Comfort ships a Random number generator block (function block ID B22 in the legacy toolchain). Its output range is 0..N, and N is entered by the user. For an eight-position device the engineer typically enters 8 and expects values 1..8, but the block includes 0 in the uniform distribution. Two consequences follow:

1. The downstream positioner is driven to an undefined index (decimal 0 maps to all outputs low, which most BCD decoders treat as "no valid position").
2. Validation tests become non-reproducible: a regulatory test bench must produce the same stimulus sequence on every trial.

For these two reasons a deterministic sequence driven by an up-counter and a BCD-to-binary encoder is the correct architecture.

Sequence Engine Architecture

The recommended topology replaces the random block with three cascaded logic stages:

The three blocks provide the deterministic stepping, the upper-limit guard that excludes 0 and excludes values greater than the selected sequence length, and the routing of the counter value into the four output bits.

Block 1 - Up/Down Counter (Function Block B01)

• Set On = 1 so the count increments on each rising edge.
• Set Start = 1 (preset value) so the first step is decimal 1, not decimal 0.
• Set Direction = Up (default).
• Feed the trigger input with a 100 ms or 200 ms clock generator (LOGO! block B06 - On/Off delay or B08 - Pulse generator). 100 ms is a safe minimum that respects the 0BA7 scan cycle of ~10 ms and gives the positioner time to latch the word.

Block 2 - Comparator for Upper Limit (Function Block B05)

Two comparators wired in parallel produce the reset signal that wraps the counter back to 1 when the sequence is complete:

• Comparator 1: counter value >= 8 with SEQ_SEL_8 = 1 forces Cnt = 0 on the next clock.
• Comparator 2: counter value >= 12 with SEQ_SEL_12 = 1 forces Cnt = 0.
• Both comparator outputs go through an OR gate (function block B07) so that exactly one path is active at any time, depending on which selector input is high.

Block 3 - Decoder to Binary Bits

Rather than using BCD-decoder blocks, take advantage of the counter's integer output and feed it into four parallel comparators (function block B05) to derive each bit directly:

LOGO! 0BA7 comparators accept integer operands at the parameter dialog, so the bit-extraction math is entered directly without ladder of AND gates. Reference: LOGO! 0BA7 System Manual, chapter on arithmetic / comparator blocks.

Strobe Pulse Generation

The positioner under test expects a one-shot strobe that latches the four-bit word. Implement this with the Edge-triggered Pulse Generator (LOGO! block B08) configured as a single-shot of 50 ms duration, triggered on every counter increment:

1. Detect the rising edge of the counter output change using a one-bit memory (B04 - Set/Reset latch wired in toggle mode).
2. Differentiate the memory's output using B08 with a 50 ms pulse width.
3. Route the differentiated pulse to Q5 (STROBE).

The 50 ms pulse width must be longer than the slowest expected DUT latch time. Verify the actual value against the device datasheet before final commissioning.

Zero-Exclusion Implementation Detail

The original problem - "the random generator also generates zero (0)" - is solved at two layers in this architecture:

1. Preset value on the up/down counter is set to Start = 1. The counter never sits at 0 between cycles because the comparator resets it from the upper limit back to 1, never to 0.
2. Comparator guard: any time the counter is being read by an external HMI or by the decoder, the bit extraction ignores the zero range naturally - the binary representations of 1..8 contain no need for a zero bit. If the DUT must absolutely never see 0000, wire a NAND gate (B37) across Q1..Q4 so that all-four-low produces an inhibit on Q5 (STROBE).

Step-by-Step Commissioning Procedure

1. Open LOGO! Soft Comfort and select Tools > Select Hardware > 0BA7. Confirm the part number matches the installed module.
2. Build the program block-by-block: counter, two upper-limit comparators, four bit-extraction comparators, strobe pulse, run lamp. Save as testbench_sequence.lsc.
3. Switch the 0BA7 to STOP mode (press ESC on the display until the main menu appears, then select Stop).
4. Connect the engineering PC via the Ethernet RJ45 port and click PC → LOGO! in LOGO! Soft Comfort to download the program.
5. Switch the LOGO! back to RUN. The RUN_LAMP (Q6) should illuminate within one scan cycle.
6. Set the selector switch to SEQ_SEL_8 and press START_PB. Use an oscilloscope or the LOGO! online monitor to confirm Q1..Q4 step through 1, 3, 8, 5, 2, 6, 4, 7 in sequence. Press STOP_PB to halt.
7. Repeat step 6 with SEQ_SEL_12. Confirm the counter wraps at 12 and returns to 1.
8. Disconnect the engineering cable, lock the cabinet, and sign off the validation report.

Verification Checklist

Troubleshooting Matrix

Scaling Beyond the 0BA7

If the test bench is later expanded to more than 12 positions, or if additional deterministic sequencing tasks are added, the recommended migration path is to LOGO! 8 (0BA8) or to a SIMATIC S7-200 / S7-1200 controller:

Reference manuals for the migration candidates: S7-1200 Programmable Controller System Manual and LOGO! 0BA7 System Manual.

FAQ