How Do I Ramp a PR114 Analog Output from Digital Inputs?

The number that matters is the normalized analog command, not the physical voltage printed on the output terminal. For a PR114 output configured for 0–10 VDC, a command of 0 represents 0 V and 1 represents 10 V. The ramp is a sequence of bounded command increments generated while either 24 VDC direction input is active.

Normalized scale, current state, and timing

Store the requested output as a state variable u in the range 0.0…1.0. An increase pulse adds Δu; a decrease pulse subtracts it. Limit the result before sending it directly to the analog-output block:

direction = +1 when Increase is active
            -1 when Decrease is active
             0 otherwise

u_next = LIMIT(0.0, 1.0, u + direction × Δu)
V_output = 10 V × u_next

The final line describes the channel’s physical scaling. It is not an instruction to multiply the normalized command by 10 in the program. Sending 10 to a block that expects 0…1 drives the command outside its valid range and normally produces saturation rather than additional resolution.

With one update per generator pulse, the ideal full-span ramp time is:

T_ramp = 1 / (f × Δu)

Here, f is the pulse frequency in hertz and Δu is the normalized change per pulse. The physical voltage increment is ΔV = 10 × Δu volts for a 0–10 VDC range.

These times assume that every generator pulse produces exactly one update and that the task execution can process the selected pulse rate.

Control approaches compared

Use the level-gated pulse ramp when holding one input must raise the voltage and holding the other must lower it. Use edge-based adjustment only when “each application” means exactly one step per press. The two interpretations require different input conditioning, so settle that behavior before building the function blocks.

Recommended function-block architecture

The preferred design separates direction, timing, state, limiting, and output scaling. This makes the rate calculation visible and prevents the physical 10 V span from being confused with the normalized command span.

• A pulse generator establishes the update rate.
• The increase and decrease inputs select +Δu, -Δu, or zero.
• An accumulator adds the selected increment on each permitted pulse.
• Upper and lower limits clamp the stored state to 1.0 and 0.0.
• Optional nonvolatile storage retains the state through loss of power.
• The bounded normalized value connects directly to the analog-output command.

Define a deterministic response when both direction inputs are on. A safe control policy is zero motion until the conflict clears. Giving one direction priority is also valid when the machine specification explicitly requires it, but the priority must be visible in the logic.

Some function-block implementations use selectors and type conversions. A redundant SEL block can be omitted where to int alone supplies the conversion required by the downstream block. Keep FSEL1 constants in normalized units if that macro selects the positive and negative increments.

Configuration procedure

1. Configure the selected analog channel for its 0–10 VDC operating range and identify the command format expected by its output block.
2. Create a state variable initialized within 0.0…1.0. Mark it retentive only if the output must resume its previous setting after power returns.
3. Select the required voltage resolution. For 0.01 V steps, use Δu = 0.001; for 0.1 V steps, use Δu = 0.01.
4. Gate positive updates with the increase input and negative updates with the decrease input. Command zero change when neither input is active or when both are active under the conflict policy.
5. Apply the 0.0…1.0 limits after addition so repeated pulses cannot wind the state beyond either endpoint.
6. Connect the limited value directly to the analog output. Remove any final multiplication by 10.

Measured verification

Test the logic first from a midrange state so both directions are available. Read the normalized internal value in the programming environment and measure the output terminal with suitable instrumentation.

Measure the elapsed time between the endpoint limits. A noticeable difference from the calculated time points to missed updates, task timing, input conditioning, or a generator that is not executing at its configured rate. Cycle power as a separate test: a retentive design must restore the stored command, while a nonretentive design must start from its configured initial value.

Rate and state pitfalls

A larger increment changes both resolution and travel time. Moving from 0.001 to 0.01 changes the terminal step from 0.01 V to 0.1 V and, at the same pulse rate, reduces the full-span time by a factor of ten. Raising only the generator frequency preserves voltage resolution but increases execution demand.

Mechanical inputs may chatter, which matters most in edge-based mode because each transition can become another step. Filter or debounce the input according to the actual device behavior. In level-gated mode, confirm that the generator—not the raw input transition—is the only source of accumulator updates.

Retentive storage changes startup behavior. Restoring a saved normalized command can cause the physical output to return immediately after power recovery; use retention only when that restart action matches the machine’s operating requirements.

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