Overview
The ramp function (also called a ramp generator, ramp limiter, or setpoint ramp) is a fundamental building block of any variable-frequency drive control scheme. In its mathematical form, the continuous ramp is the integral of a rectangular pulse: r(t) = a·t·u(t) where u(t) is the unit step and a is the slope. In a discrete PLC implementation, the discrete-time equivalent becomes a fixed increment per scan:
yk = yk-1 + Δsetpoint · (Tcycle / Tramp)
where Δsetpoint is the difference between the target and the previous output, Tcycle is the OB1 scan time (or the interrupt OB time when the ramp runs in a cyclic interrupt), and Tramp is the user-entered ramp time in seconds. The same equation applies for ramp-down when the target is below the current output; the increment becomes negative.
This article implements ramp-up and ramp-down generation on a SIMATIC S7-1200 (any CPU 1211C/1212C/1214C/1215C/1217C) that commands a Fuji FRENIC-ACE series AC drive (FRN-Ace / FRN__AR1S-4□) via either a 0–10 V analog output or PROFINET. The program runs in STEP 7 Professional V13 and is forward-compatible with V13 SP1, V14, V15, V15.1, V16, V17, and V18 because it uses only standard IEC 61131-3 constructs.
Prerequisites
| Component | Required Version / Specification |
|---|---|
| STEP 7 Professional | V13 (Update 6 minimum) or V13 SP1 / V14 / V15.1 / V16 / V17 / V18 |
| S7-1200 CPU | CPU 1211C, 1212C, 1214C, 1215C, or 1217C (any article number 6ES7 2xx-1xx30-0XB0 or later) |
| CPU firmware | V4.0 or higher; V4.2 recommended for V13 SP1 example projects |
| Signal board (optional) | 6ES7 232-4HA30-0XB0 (AQ 1×12 bit, ±10 V) or 6ES7 232-4HB30-0XB0 (AQ 1×12 bit, 0–20 mA) |
| Analog input (for feedback) | CPU onboard AI or SM 1231 (6ES7 231-4HD32-0XB0) |
| Drive | Fuji FRENIC-ACE (e.g., FRN0001 to FRN0280 AR1S-4□); firmware ≥ V200 |
| Wiring | Shielded twisted pair, 0.5 mm² minimum, < 30 m for analog reference |
System Architecture
The S7-1200 reads commands from the HMI or upstream process, runs the ramp FB in OB1 (or in a cyclic interrupt OB30 at 100 ms), and writes the limited setpoint to the analog output that drives the Fuji ACE frequency reference terminal [12] (0–10 V) or [C1] (4–20 mA current loop). The drive itself also has internal acceleration/deceleration ramps (parameters F07/F08). For coordinated control, the PLC ramp is the master and the drive ramp is set short (0.1 s) so the drive follows the PLC profile without lag. The drive's internal ramp then acts as a fail-safe backup if the fieldbus drops.
Fuji ACE Drive Parameter Table for Ramp Control
Configure the FRENIC-ACE parameters below before commissioning. Settings are loaded via the drive keypad (FRENIC Loader) or PROFINET acyclic services. Default values shown are factory defaults; change them to match the application.
| Code | Name | Range | Default | Application Setting |
|---|---|---|---|---|
| F07 | Acceleration Time 1 | 0.0 – 3600 s | 6.0 s | 0.1 s (PLC ramp is master) |
| F08 | Deceleration Time 1 | 0.0 – 3600 s | 6.0 s | 0.1 s (PLC ramp is master) |
| F01 | Frequency setting 1 | 0–15 | 0 (keypad) | 1 (terminal [12] 0–10 V) |
| F02 | Run command source | 0–2 | 0 | 1 (terminal FWD/REV) |
| E01 | X1 terminal function | 0–99 | 0 (SS1) | 0 (Run forward) |
| E02 | X2 terminal function | 0–99 | 1 (SS2) | 1 (Run reverse) |
| C30 | Frequency setting 2 (terminal [12]) | 0–400 Hz | 50.0 Hz | 50.0 Hz at +10 V |
| C31 | Analog input offset (terminal [12]) | -5.0 to +5.0% | 0.0% | 0.0% |
| C32 | Analog input filter (terminal [12]) | 0.00–5.00 s | 0.05 s | 0.02 s (faster response) |
| H56 | PID feedback signal | 0/1 | 0 | 0 (off, PLC handles closed loop) |
| H96 | STOP key priority | 0/1 | 0 | 1 (always enabled, hard stop on PLC fault) |
Wiring the S7-1200 Analog Output to Fuji Terminal [12]
| PLC Terminal | Signal | Fuji ACE Terminal | Wire Type |
|---|---|---|---|
| S7-1200 AQ+ (e.g., A0+ on SB 1232) | 0–10 V speed reference | [12] (frequency setting input) | Shielded twisted pair, 0.5 mm² |
| S7-1200 AQ- (A0-) | Analog ground | [11] (common) | Same cable, opposite conductor |
| S7-1200 DO+ (Q0.0) | Run forward | [FWD] (terminal X1) | Control wire, 0.75 mm² |
| S7-1200 DO+ (Q0.1) | Run reverse | [REV] (terminal X2) | Control wire, 0.75 mm² |
| S7-1200 DI (I0.0) | Drive ready / fault | [30A]/[30C] (relay output) | Control wire |
| PE | Shield (one end only, drive side) | PE bar | Bonded to drive ground bar |
For 4–20 mA control, use the SB 1232 AQ 0–20 mA (6ES7 232-4HB30-0XB0) and wire to terminal [C1] (current input) and [11] (common). On the drive, set parameter C40 to 1 to enable current input, and use C41 for the gain.
Implementing the Ramp Function Block in SCL
Create a new SCL source or FB in the project tree. The block is split into a generic FB_Ramp (positive or negative slope) and a project-specific FB_RampDown wrapper that handles the enable, the emergency stop, and the unit conversion from the S7 REAL (Hz) to the AQ integer (0–27648 for ±10 V, 0–27648 for 0–10 V, 0–27648 for 0–20 mA).
FB_Ramp (SCL)
FUNCTION_BLOCK "FB_Ramp"
{ S7_Optimized_Access := 'TRUE' }
VERSION : 0.1
VAR_INPUT
bEnable : BOOL; // TRUE: ramp follows setpoint
rSetpoint : REAL; // Target value (engineering units)
rRampUp : REAL; // Ramp-up time in seconds
rRampDown : REAL; // Ramp-down time in seconds
rCycleTime : REAL; // Call period in seconds (e.g., 0.1)
rRampStop : REAL; // Emergency stop time in seconds
END_VAR
VAR_OUTPUT
rOutput : REAL; // Current ramp value
bComplete : BOOL; // TRUE when rOutput == rSetpoint
END_VAR
VAR
rLastOutput : REAL; // Previous output value
END_VAR
BEGIN
// Default state
bComplete := FALSE;
IF bEnable THEN
// Select ramp-up or ramp-down based on direction
IF rSetpoint > rLastOutput + 0.001 THEN
// Ramp UP
rOutput := rLastOutput
+ (rSetpoint - rLastOutput) * rCycleTime / rRampUp;
IF rOutput >= rSetpoint THEN
rOutput := rSetpoint;
bComplete := TRUE;
END_IF;
ELSIF rSetpoint < rLastOutput - 0.001 THEN
// Ramp DOWN
rOutput := rLastOutput
- (rLastOutput - rSetpoint) * rCycleTime / rRampDown;
IF rOutput <= rSetpoint THEN
rOutput := rSetpoint;
bComplete := TRUE;
END_IF;
ELSE
// Setpoint already reached, hold
rOutput := rSetpoint;
bComplete := TRUE;
END_IF;
ELSE
// Emergency stop: ramp to 0 (or minimum) using rRampStop time
IF rLastOutput > 0.0 THEN
rOutput := rLastOutput
- (rLastOutput * rCycleTime / rRampStop);
IF rOutput < 0.0 THEN rOutput := 0.0; END_IF;
ELSIF rLastOutput < 0.0 THEN
rOutput := rLastOutput
+ (-rLastOutput * rCycleTime / rRampStop);
IF rOutput > 0.0 THEN rOutput := 0.0; END_IF;
END_IF;
END_IF;
rLastOutput := rOutput;
END_FUNCTION_BLOCK
FB_RampDrive (Project Wrapper)
FUNCTION_BLOCK "FB_RampDrive"
{ S7_Optimized_Access := 'TRUE' }
VERSION : 0.1
VAR_INPUT
bEnable : BOOL;
bRunFwd : BOOL; // From HMI or sequence
bRunRev : BOOL;
rHzSetpoint : REAL; // 0.0 .. 50.0 Hz (or 60.0)
rRampUpSec : REAL; // Typical: 10.0
rRampDownSec : REAL; // Typical: 15.0
rCycleTime : REAL; // 0.1
END_VAR
VAR_OUTPUT
rHzOutput : REAL; // Hz after ramp
iAQRaw : INT; // 0..27648 for AQ
bRunFwdOut : BOOL; // To drive terminal FWD
bRunRevOut : BOOL; // To drive terminal REV
END_VAR
VAR
fbRamp : FB_Ramp;
rMaxFreq : REAL := 50.0;
END_VAR
BEGIN
// Clamp setpoint to ±max frequency
IF rHzSetpoint > rMaxFreq THEN rHzSetpoint := rMaxFreq; END_IF;
IF rHzSetpoint < -rMaxFreq THEN rHzSetpoint := -rMaxFreq; END_IF;
// Drive ramp block
fbRamp(bEnable := bEnable,
rSetpoint := rHzSetpoint,
rRampUp := rRampUpSec,
rRampDown := rRampDownSec,
rCycleTime := rCycleTime,
rRampStop := 3.0, // 3 s emergency stop
rOutput => rHzOutput,
bComplete =>);
// Convert Hz to analog output raw value (unipolar 0..10 V)
IF rHzOutput >= 0.0 THEN
iAQRaw := REAL_TO_INT(rHzOutput / rMaxFreq * 27648.0);
ELSE
iAQRaw := 0; // Reverse handled via REV terminal, AQ stays 0..10 V magnitude
END_IF;
// Run commands (interlock FWD and REV)
bRunFwdOut := bRunFwd AND NOT bRunRev AND bEnable;
bRunRevOut := bRunRev AND NOT bRunFwd AND bEnable;
END_FUNCTION_BLOCK
Calling the Block from OB1 (LAD/FBD view)
// In OB1 - call once per scan (or use OB30 for 100 ms cyclic interrupt)
"FB_RampDrive_DB"(
bEnable := NOT "Emergency_Stop", // Global safety input
bRunFwd := "HMI".RunFwd,
bRunRev := "HMI".RunRev,
rHzSetpoint := "HMI".Speed_SP,
rRampUpSec := 10.0, // 10 s ramp-up
rRampDownSec:= 15.0, // 15 s ramp-down (longer for inertial loads)
rCycleTime := 0.1, // 100 ms
rHzOutput => "HMI".Speed_PV,
iAQRaw => "AQ_SpeedRef", // wired to AQ 0
bRunFwdOut => "DO_FWD", // wired to Q0.0
bRunRevOut => "DO_REV" // wired to Q0.1
);
Cyclic Interrupt Variant (OB30)
Calling the FB in OB1 is acceptable for slow ramps (≥ 5 s), but the cycle time will drift with program length. For deterministic timing, use a cyclic interrupt OB:
- Project tree → CPU → Program blocks → Add new block → Organization block → OB30 (Cyclic interrupt).
- Set phase offset to 0 ms, cycle time to 100 ms.
- Call
FB_RampDrive_DBfrom OB30 instead of OB1. PassrCycleTime := 0.1. - Move the output
iAQRawwrite to OB1 (writes to peripherals are allowed in any OB; OB30 execution is non-preemptive to OB1 only on S7-1200).
Alternative: Ladder Logic (LAD) Ramp
If the project forbids SCL, the same logic is achievable in LAD using a math block chain. Below is a one-line slope generator using the standard IEC blocks. Replace the discrete components with the equivalent network:
// Network 1: Slope selector
|---[ rSetpoint > rLastOutput ]---( MOV rRampUp -> rRampActive )---|
|---[ rSetpoint < rLastOutput ]---( MOV rRampDown -> rRampActive )--|
// Network 2: Increment per cycle
|---[ 100 ]--[ DIV rRampActive ]--[ MUL rCycleTime ]--|
| v
|---[ rSetpoint - rLastOutput ]--[ MUL ]--[ ADD rLastOutput ]--[ LIMIT ]--> rOutput
// Network 3: Hold and store
|---[ bComplete ]---( MOV rOutput -> rLastOutput )---|
Configuration of the Analog Output in TIA Portal V13
- Open the device view of the CPU.
- Drag the signal board AQ 1x12 bit (6ES7 232-4HA30-0XB0) into the slot. If using a SM 1232 instead, insert it on the right side of the CPU rack.
- Select the analog output channel (e.g., A0) and set:
- Output type: Voltage
- Range: 0..10 V
- Diagnostics: enable short-circuit and wire-break.
- In the program, write the integer value directly:
%QW64 := iAQRaw;(address depends on slot). For symbolic access, the symbol"AQ_SpeedRef"is mapped automatically by TIA Portal once the variable is assigned in the PLC tag table.
PROFINET Alternative to Analog Wiring
For installations where the drive is more than 30 m from the PLC, PROFINET is preferred because it eliminates analog drift. The FRENIC-ACE supports PROFINET via the optional OPC-ACE-PN card or the integrated FRN-Ace PROFINET variant. Cyclic process data are:
| Slot | Direction | Name | Length | Mapping |
|---|---|---|---|---|
| 1 | PLC → Drive | Control word 1 (STW1) | 2 bytes | Bit 0 = ON/OFF1, Bit 1 = OFF2, Bit 2 = OFF3, Bit 3 = Enable, Bit 4 = Enable ramp, Bit 5 = Freeze ramp, Bit 6 = Setpoint enable, Bit 15 = Fault ack |
| 2 | PLC → Drive | Setpoint frequency (NSOLL_A) | 2 bytes | 0..16384 corresponds to 0..100% (use C30/F_MAX for scaling) |
| 3 | Drive → PLC | Status word 1 (ZSW1) | 2 bytes | Bit 0 = Ready, Bit 2 = Running, Bit 3 = Fault, Bit 7 = Alarm, Bit 13 = Ramp active |
| 4 | Drive → PLC | Actual frequency (NIST_A) | 2 bytes | 0..16384 corresponds to 0..100% |
To integrate, install the GSDML file GSDML-Vx.x-Fuji-ACE-PN-xxxxxxxxx.xml from the Fuji Electric download portal under Options > Manage general station description files (GSD) in TIA Portal. The device appears under Other field devices > PROFINET IO > Drives > Fuji Electric > FRENIC-ACE. Map the four I/O slots above and connect them in the device configuration. The ramp FB then writes to NSOLL_A instead of the AQ integer.
Step-by-Step Commissioning
- Hardware check. Verify CPU, signal board, and drive wiring against the table in the wiring section. Confirm shield is bonded at the drive end only.
- Drive parameters. Load F07 = 0.1 s, F08 = 0.1 s, F01 = 1 (terminal [12] reference), F02 = 1 (terminal run), C30 = 50.0 Hz, C32 = 0.02 s. Save with the drive keypad PRG key.
- PLC project. Add the CPU 12xx to the project, add the SB 1232 or SM 1232 analog module, paste the SCL source for FB_Ramp and FB_RampDrive, compile, and download to the PLC.
- Online watch table. Add iAQRaw, rHzOutput, bRunFwdOut, and bRunRevOut to a watch table. Force rHzSetpoint = 0.0, bEnable = FALSE, bRunFwd = FALSE. Verify iAQRaw = 0 and the drive shows 0.00 Hz on the keypad.
- Ramp test, no load. Set bEnable = TRUE, rHzSetpoint = 30.0 Hz, rRampUp = 10.0 s, rRampDown = 15.0 s. Click bRunFwd momentarily to latch. The HMI should show rHzOutput climbing from 0 → 30 Hz in 10 s linearly. Click bRunFwd OFF: rHzOutput should fall to 0 in 15 s.
- Emergency stop test. Activate the Emergency_Stop input. Verify rHzOutput falls to 0 in 3 s (rRampStop) and that the drive stops without DC braking (F11 = 0).
- Load test. Couple the motor to the load. Run the full setpoint profile 0 → 50 → 0 Hz three times. Capture the ramp profile on the HMI trend.
- Fault injection. Pull the analog cable from terminal [12] with the drive running. The drive should detect the loss of signal only if C32 (analog filter) and C36 (signal loss detection) are configured. Add C36 = 1 (alarm) or C36 = 2 (forced stop) for production deployment.
Verification Checklist
| Test | Expected Result | Pass/Fail Criteria |
|---|---|---|
| Analog output 0 Hz | 0.000 V at terminal [12] | ±0.05 V (12-bit AQ resolution) |
| Analog output 25 Hz | 5.000 V at terminal [12] | ±0.05 V |
| Analog output 50 Hz | 10.000 V at terminal [12] | ±0.05 V |
| Ramp-up linearity | rHzOutput increases by 5 Hz/s when rRampUp=10 s to 50 Hz | ±0.5 Hz deviation at any sample |
| Ramp-down linearity | rHzOutput decreases by 50/15 ≈ 3.33 Hz/s when rRampDown=15 s | ±0.5 Hz deviation at any sample |
| Direction interlock | Both bRunFwdOut and bRunRevOut never TRUE simultaneously | Always 0; verify in watch table |
| Emergency stop | rHzOutput reaches 0 in 3 s when bEnable = FALSE | 0 ± 0.1 Hz at t = 3.1 s |
| Direction reversal mid-ramp | Output reverses at rRampDown then ramps up at rRampUp | No step change; smooth cross-over at 0 Hz |
Troubleshooting Matrix
| Symptom | Likely Root Cause | Diagnostic | Fix |
|---|---|---|---|
| Output stays at 0 Hz despite bEnable TRUE | Run command missing or FWD/REV not wired | Check bRunFwdOut in watch table; measure 24 V at FWD terminal | Wire DO to terminal [FWD] and set F02 = 1 |
| Output jumps to setpoint instead of ramping | FB_Ramp instance not retentive; rLastOutput reset on warm restart | Online → monitor rLastOutput; it should track rOutput | Add {S7_Optimized_Access := 'TRUE'} or set the instance DB as retentive for rLastOutput |
| Ramp time off by 2× | OB1 scan time ≠ rCycleTime | Add "OB1_SCAN_ACT" to watch table; compare to rCycleTime | Move FB to OB30 (100 ms cyclic interrupt) and set rCycleTime = 0.1 |
| Drive trips on Er1 (overcurrent during ramp-down) | Drive's F08 = 0.1 s forces very fast decel; load inertia too high | Set F08 = 5 s; if trip clears, the PLC ramp is the limiter | Increase PLC rRampDown to match load (typical 2× accel time for pumps, 3× for fans) |
| Reverse command issues but motor does not spin | REV direction disabled or interlock on drive | Check parameter H96 (STOP key priority) and F02 | Set F02 = 1 (terminal control), wire REV to X2, set E02 = 1 |
| Output overshoots setpoint | Increment overshoots because the loop runs faster than expected | Verify rCycleTime matches actual call period | Add an upper clamp on the increment: IF increment > (setpoint - last) THEN increment := (setpoint - last) END_IF |
| TIA Portal V13 will not open Siemens example | Example saved with V13 SP1 | Open the project in V13 SP1 or use the SCL source above (V13-compatible) | Upgrade to V13 SP1 Update 6 (free for valid license holders); the SCL code in this article works in stock V13 |
| AQ value > 27648 when converting | rHzSetpoint above rMaxFreq before clamp | Watch rHzSetpoint at the input to FB_RampDrive | Verify the input clamp at the start of FB_RampDrive (already included in the wrapper) |
Safety and Standards Notes
- For Safe Torque Off (STO) per IEC 61800-5-2, use the FRENIC-ACE option card or wire the drive's EN terminal (X3) to a 24 V output that is released by an emergency stop. Do not rely on the analog setpoint alone for safe stop.
- For applications requiring Safety Integrity Level 1 or higher (PL c/d), the ramp function is not a substitute for a safety-rated stop. Implement a separate, hardwired safety chain that removes drive power via a contactor or the STO input.
- For pump and fan curves, the ramp should follow the affinity laws: a linear frequency ramp produces a quadratic flow ramp, which is gentler on hydraulics. Use 30–60 s ramps for large centrifugal pumps.
Performance and Tuning
The cycle time of the cyclic interrupt OB is the dominant factor in ramp accuracy. A 100 ms OB30 yields a minimum step size of (setpoint × 0.1 / ramp_time). For a 50 Hz setpoint with a 10 s ramp, the increment is 0.5 Hz per cycle, which is well below the 12-bit analog resolution (0.012 V / 0.06 Hz). For very fast ramps (≤ 1 s), use a 10 ms OB30 cycle to keep the discretization error under 1%.
For closed-loop control where the PLC is the PID master and the drive is the actuator, wrap the ramp FB around the PID output. This prevents the PID from commanding a step change that would trip the drive on overcurrent:
// Sequence:
// PID outputs Hz setpoint (raw) -> FB_RampDrive limits rate of change
// FB_RampDrive outputs smoothed Hz -> AQ or PROFINET
// Drive follows smoothed Hz internally with F08 = 0.1 s
FAQ
How do I add the SCL source in TIA Portal V13 without SP1?
Open the project, right-click Program blocks, choose Add new block > Function block with language SCL. Delete the generated skeleton, paste the SCL code from the "FB_Ramp (SCL)" section of this article, and click Compile. The code uses only base IEC operations available in V13 without SP1.
What ramp-down time should I use for a Fuji ACE drive with a 15 kW motor?
Start with 1.5× to 2× the acceleration time. For an unloaded motor, 5–10 s is typical. For high-inertia loads (large fans, centrifuges), use 20–60 s. The PLC ramp should be the master; keep the drive's F08 parameter at 0.1 s so the drive follows the PLC profile.
Can I use the same FB for a PROFINET connection instead of analog?
Yes. The FB_Ramp logic is identical; only the final scaling changes. Replace the line iAQRaw := REAL_TO_INT(rHzOutput / rMaxFreq * 27648.0); with iPROFINET_HZ := REAL_TO_INT(rHzOutput / rMaxFreq * 16384.0); for the NSOLL_A scaling (0..16384 = 0..100%).
Why does the S7-1200 analog output read 10 V with 50 Hz setpoint but the drive shows only 48 Hz?
The drive's C30 parameter sets the frequency at +10 V. If C30 is set to 48 Hz, the drive will only command 48 Hz at 10 V input. Change C30 = 50.0 (or your maximum frequency) to scale the input. Also verify F03 (maximum frequency) is at least 50 Hz.
How do I migrate the project from TIA V13 to a newer version without breaking the ramp block?
Open the project, accept the migration prompt to "Migrate to current version". The SCL block is standard IEC and migrates without code changes. Re-compile, re-download, and verify the instance DB has the same structure. If the retentive behavior changed, set the rLastOutput variable to retentive in the instance DB properties.