Interfacing Omron CPM2A Peripheral Port to RS485 Networks
The Omron CPM2A exposes two serial channels: an RS-232C port (port 1) and a peripheral port (port 2) that carries TTL-level signals. Field deployments frequently require a third option — RS-485 — because multi-drop, long-distance, or industrial-bus architectures rarely accept the single-ended, point-to-point RS-232C electrical profile. The peripheral port cannot speak RS-485 directly. It must first be level-shifted, and in many cases the protocol selection must be changed from Host Link (full-duplex) to no-protocol (half-duplex-capable) mode. This reference documents the supported adapter families, the wiring rules, the protocol and DM-area configuration, and the field verification steps needed to bring a CPM2A online against an RS-485 master or slave.
1. CPM2A Serial Architecture Overview
The CPM2A CPU integrates two serial channels. The reference for pin assignments, mode words, and command set is the CPM2A Operation Manual (W352-E1-07).
| Channel | Connector | Electrical Level | Default Protocol | Mode Control |
|---|---|---|---|---|
| Port 1 (RS-232C) | DB-9 male | EIA-232 (±5 to ±15 V) | Host Link / No-Protocol / 1:N NT-Link | DM6645 – DM6649 |
| Port 2 (Peripheral) | Mini-DIN circular | TTL (0 / +5 V) | Host Link (slave) / Peripheral bus | DM6650 – DM6653 |
The peripheral port is a 5 V CMOS/TTL interface. Connecting an RS-485 transceiver directly to it will exceed the absolute-maximum input voltage of the integrated UART pins and may permanently damage the CPU. Always insert an approved Omron adapter that performs the level translation and, where required, the bus-direction control.
2. Why RS-485 Cannot Connect Directly
Three independent reasons prevent a direct peripheral-port-to-RS-485 connection:
- Electrical mismatch. RS-485 specifies a differential signal with a common-mode range of −7 V to +12 V and a minimum differential of 200 mV on a ±1.5 V driver output. The peripheral port is single-ended 0/5 V CMOS. Direct connection will not meet the receiver threshold and risks over-voltage damage.
- Protocol mismatch. Default port-2 operation is Host Link slave at 9 600 bit/s, 7 data bits, even parity, 2 stop bits (7-E-2). Host Link C-mode commands are inherently full-duplex: the master transmits a command frame and the slave responds while the master is still driving its TX line. RS-485 is half-duplex; both ends cannot transmit simultaneously on a single twisted pair.
- Direction control. RS-485 transceivers require a DE/RE driver-enable signal to release the bus. The CPM2A peripheral port does not expose an RTS-equivalent handshake line, so the bus must be released by the adapter automatically using a timer, by the connected device, or by a converter that holds DE inactive between frames.
3. Supported Adapter Families
Omron ships a small family of level-conversion adapters that accept either the peripheral-port mini-DIN or a DB-9 RS-232C input. The right choice depends on whether you want a four-wire RS-422 intermediate (preserving full-duplex Host Link) or a true two-wire RS-485 network (forcing a protocol change to no-protocol with a converter handling DE).
| Catalog Number | Input Side | Output Side | Power | Use Case |
|---|---|---|---|---|
| CPM1-CIF11 | Peripheral (TTL) | RS-422 (4-wire, full-duplex) | +5 V DC on pin 6 / 0 V on pin 9 of D-sub | Extend peripheral port to RS-422 bus; pair with a CJ1W-CIF11 or K3SC to derive RS-485 |
| CPM1-CIF01 | Peripheral (TTL) | RS-232C | +5 V DC on pin 6 / 0 V on pin 9 of D-sub | Convert peripheral port to RS-232C; does not source 5 V |
| CJ1W-CIF11 | RS-232C (DB-9) | RS-422 / RS-485 (selector) | Self-powered from RS-232C lines or +5 V | Pair with CPM1-CIF01 to get RS-485 from the peripheral port |
| K3SC-10 / K3SC-101 | RS-232C (DB-9) | RS-485 (2-wire, half-duplex) | 100–240 V AC supply | Standalone converter; configurable echo and timing |
| NT-AL001 | RS-232C | RS-422 / RS-485 | Self-powered from DTR/RTS | Compact converter for low-speed Host Link |
4. Selecting the Correct Conversion Path
Three practical topologies cover the majority of field requests.
4.1 Path A — Peripheral → RS-422 → external RS-485 gateway
This is the cleanest four-wire route. The CPM1-CIF11 performs peripheral-to-RS-422 conversion. The downstream gateway is responsible for RS-485 direction control. Host Link frames can be carried end-to-end if the gateway is transparent to start/stop bits and turnaround time.
4.2 Path B — Peripheral → RS-232C → CJ1W-CIF11 → RS-485
Two adapters are stacked: the CPM1-CIF01 brings the peripheral port to RS-232C, and the CJ1W-CIF11 selects between RS-422 (full-duplex) and RS-485 (half-duplex) on its terminal block. This path is the most flexible because the CJ1W-CIF11 has a hardware switch for 2-wire / 4-wire mode and a built-in DE/RE timing circuit.
4.3 Path C — RS-232C port 1 → K3SC → RS-485
If the application allows you to give up the peripheral port, drive the K3SC from port 1 (RS-232C) directly. The K3SC has DIP switches for echo suppression, RTS control, and end-of-frame timeout. Set it to "no echo" so that transmitted bytes are not looped back to the CPU RXD.
5. Pinout and Wiring Specifications
5.1 CPM1-CIF11 D-Sub Output (RS-422 side)
| Pin | Signal | Direction | Function |
|---|---|---|---|
| 1 | FG | — | Frame ground, connect to shielded cable drain |
| 2 | SDB | Out | Send data B (−) |
| 3 | RDB | In | Receive data B (−) |
| 4 | SDA | Out | Send data A (+) |
| 5 | RDA | In | Receive data A (+) |
| 6 | +5 V | In | External +5 V DC supply (≥ 200 mA) |
| 7, 8 | — | — | No connection |
| 9 | 0 V | In | External 0 V reference |
| Hood | SHELL | — | Shield / chassis ground |
5.2 RS-485 Cabling Rules
- Topology: Daisy-chain only. Star, stub, or branch runs greater than 1 m will cause reflections on a 9 600 bit/s Host Link bus.
- Cable: Twisted pair, 24 AWG typical, characteristic impedance 100–120 Ω. Belden 3106A or equivalent.
- Termination: 120 Ω across A–B at each end of the bus, no more. Inline taps must not include a terminator.
- Bias: Many RS-485 transceivers (e.g. SN75176) require fail-safe bias resistors (typically 680 Ω to +5 V on A, 680 Ω to GND on B) at the master to hold the line idle high. Confirm whether the downstream adapter (CJ1W-CIF11, K3SC) includes these internally.
- Maximum length: 1 200 m at ≤ 93.75 kbit/s. At the CPM2A's default 9 600 bit/s this limit is never reached in practice.
6. Protocol and DM-Area Configuration
Per the CPM2A Operation Manual (W352-E1-07), serial-port parameters are held in the DM area. The peripheral port uses DM6650–DM6653.
| Word | Bit / Value | Meaning | Recommended Setting for RS-485 Path |
|---|---|---|---|
| DM6650 | 0000 to 9999 (BCD) | Baud rate (e.g. 9600) | 9600 (matches Host Link default) |
| DM6651 | 00–15 (hex) | Frame format, mode, CTS control | See below |
| DM6652 | 00–31 (decimal) | Transmission delay (Host Link response) | 10 (≈ 100 ms) if downstream device is slow to release DE |
| DM6653 | 00–31 | Host Link unit number, no-protocol settings | 00 for unit 0; 0F for no-protocol termination char |
6.1 DM6651 Bit Map
| Bits 12–15 | Mode |
|---|---|
| 0 | Host Link (default) |
| 1 | No-protocol (TX/RX only, no command interpreter) |
| 2 | 1:1 NT-Link (PT) |
| 3 | 1:N NT-Link |
| Bits 8–11 | Frame Format |
|---|---|
| 0 | 7-E-2 (Host Link default) |
| 1 | 7-N-2 |
| 2 | 7-E-1 |
| 3 | 7-N-1 |
| 4 | 7-O-2 |
| 5 | 7-O-1 |
| 6 | 8-N-1 |
| 7 | 8-E-1 |
| 8 | 8-O-1 |
| 9 | 8-N-2 |
| 10 | 8-E-2 |
| 11 | 8-O-2 |
For Host Link to RS-485 through the CJ1W-CIF11, leave mode bits at 0. For half-duplex no-protocol operation, set mode bits to 1 and configure DM6653 with the desired start/end characters and a 10–100 ms inter-frame delay.
7. Half-Duplex Timing and Bus Turnaround
Bus turnaround (the time between the master's last transmitted bit and the slave's first transmitted bit) is the single most common cause of intermittent RS-485 faults. The maximum allowed turnaround is set by the converter's DE-release timer plus the slave's response latency.
For a CJ1W-CIF11 set to 2-wire RS-485, the DE-to-RE release is approximately 1 ms after the last stop bit. The K3SC default is configurable from 1 to 100 ms. Set the master to wait at least
T_wait >= T_de_release + T_slave_latency + T_cable_skew
For a 9 600 bit/s bus on a 10 m cable, a safe value is:
T_wait = 1 ms (DE) + 5 ms (PLC scan + UART) + 0.1 ms (cable) ≈ 10 ms
Many Host Link master libraries expose this as a "response timeout" or "RX wait" parameter. Set it to 50–100 ms on the first commissioning pass, then tighten once the bus is stable.
8. Step-by-Step Wiring Procedure
The procedure below uses Path B (Peripheral → CPM1-CIF01 → RS-232C → CJ1W-CIF11 → RS-485) because it is the most general-purpose. Substitute the CJ1W-CIF11 with a K3SC if the application demands it.
8.1 Prerequisites
- CPM2A CPU with firmware that supports the peripheral-port DM words (all production units since the late 1990s).
- CPM1-CIF01 or CPM1-CIF11 adapter.
- CJ1W-CIF11 RS-232C → RS-422/485 converter.
- External regulated +5 V DC supply, 200 mA minimum, connected to pins 6 (+5 V) and 9 (0 V) of the CPM1-CIF01 D-sub.
- Belden 3106A or equivalent twisted pair, 120 Ω termination resistors, 680 Ω bias resistors if the CJ1W-CIF11 does not include internal bias.
- CX-Programmer version 9.x or later, with the CPM2A device file installed.
8.2 Wiring Steps
- Power down the CPM2A and the +5 V supply.
- Plug the CPM1-CIF01 onto the peripheral port mini-DIN. Tighten the retaining screws.
- Connect a straight-through DB-9 male-to-female RS-232C cable between the CPM1-CIF01 and the CJ1W-CIF11 input.
- Apply +5 V to pin 6 and 0 V to pin 9 of the CPM1-CIF01 D-sub. Verify 5.00 V ± 0.25 V under load.
- On the CJ1W-CIF11, set the mode DIP switch to 2-wire RS-485 (position 2 of SW1) and the echo-suppression switch to OFF (position 4 of SW1).
- Wire A (SDA/RDA) to terminal SDA on the CJ1W-CIF11, B (SDB/RDB) to SDB. Connect shield to FG on one end only (typically the master).
- Install 120 Ω across A–B at the two physical ends of the RS-485 bus.
- Power on the CJ1W-CIF11 (it sources its own 5 V from the RS-232C lines or its auxiliary terminals — confirm with the CJ1W-CIF11 datasheet).
- Power on the CPM2A.
8.3 DM Configuration Example
For a Host Link slave at unit 0, 9 600 bit/s, 7-E-2, 100 ms response delay:
DM6650 = 09600 ; Baud = 9600
DM6651 = 0000 ; Mode = Host Link, 7-E-2, no CTS control
DM6652 = 00010 ; 10 × 10 ms = 100 ms response delay
DM6653 = 00000 ; Unit number = 0
For no-protocol mode at 19 200 bit/s, 8-N-1, terminator CR+LF, 50 ms inter-frame gap:
DM6650 = 19200
DM6651 = 0106 ; Mode = 1 (no-protocol), Frame = 6 (8-N-1)
DM6652 = 00000 ; No Host Link delay (not used in no-protocol)
DM6653 = 0F0D ; Start = any, end = CR+LF (0D 0A)
9. Verification and Commissioning
- Voltage check. With no traffic, A should sit above B by ≥ 200 mV. Measure 0.2 V to 5.0 V on a multimeter; 0 V indicates missing fail-safe bias.
- TX loopback test. Jumper A to A and B to B at the CJ1W-CIF11 terminal block. From CX-Programmer, send a Host Link RR command. If a normal response comes back, the TX, RX, and DE control are wired correctly.
- Echo check. With the loopback removed, the CJ1W-CIF11 should not echo any transmitted bytes. Read DM6650–DM6653 and confirm the unit is in PROGRAM or RUN mode (transmission allowed).
- Multi-drop test. Add a single slave. Issue Host Link RJ/RL read commands. Verify response within the configured T_wait.
- Bus scan. With CX-Programmer's "Network Inspector" or a Modbus/RTU scan tool, poll unit numbers 0–31. Exactly one device should respond per address.
10. Troubleshooting Matrix
| Symptom | Likely Cause | Diagnostic Step | Corrective Action |
|---|---|---|---|
| No response, AR area flags set on port 2 | Missing +5 V on CPM1-CIF01 pin 6 | Measure 5.0 V on pin 6 of D-sub | Install external 5 V supply |
| First byte of every response is corrupted | DE release not waited for; bus still being driven by master | Scope A–B during TX→RX transition | Increase T_wait to 50 ms, or enable DE echo in K3SC |
| CRC/checksum error on every Host Link frame | Echo enabled on converter; CPU sees its own TX frame as RX | Disable echo, repeat test | Set K3SC DIP 4 to OFF, or CJ1W-CIF11 echo switch to OFF |
| Intermittent failure after a few hours | Bias resistors missing; line idle low | Measure A–B idle voltage; should be > 200 mV | Add 680 Ω pull-up on A, 680 Ω pull-down on B at master |
| Multiple slaves answer simultaneously | Star wiring or stubs longer than 1 m | Inspect topology; verify daisy-chain only | Re-pull cable in daisy-chain, remove stubs |
| Communication works at 9 600 but fails at 57 600 | Cable capacitance too high for bit period | Calculate t_bit vs cable RC: 17.5 µs at 57 600 vs 30 pF/m × 100 m = 3 ns/m | Reduce cable length or use lower-capacitance cable (e.g. Belden 9841) |
| Garbled response from power meter on first poll | Slave response begins before converter releases DE | Set K3SC DE delay to maximum; check slave "silent interval" spec | Match converter DE time to the slowest slave's start-of-frame latency |
11. Common Pitfalls and Field Notes
- Mixing units on the same bus. Host Link (C-mode) and Modbus/RTU cannot share an RS-485 segment. They use different framing, parity, and address semantics. Use a gateway or a separate physical bus.
- Termination at every drop. A common wiring mistake is to put 120 Ω on every device. Only the two physical ends are terminated; intermediate drops see reflections and ringing if they are terminated.
- Peripheral-port pinout confusion. The mini-DIN peripheral port on the CPM2A carries TTL-level signals, not RS-232. The CPM1-CIF11 is the only Omron adapter in this generation that consumes those TTL signals and outputs RS-422.
- Mode word side effects. Changing DM6651 restarts the UART. CX-Programmer will momentarily lose online connection if the connected PC is the very port being reprogrammed. Cycle the PC comm port after any DM6651 write.
- Firmware revision cross-check. The CJ1W-CIF11 and K3SC-10 have multiple firmware revisions. The DE release time and echo behavior differ between revisions. Always record the catalog number plus the "Lot No." or "Ver." suffix when troubleshooting an intermittent.
- No-protocol termination character. In no-protocol mode, DM6653 must be set with the end character the slave will emit (typically 0D, 0A, or both). If the slave sends nothing, the CPU will time out and report an RX error in AR08.05 / AR09.05.
12. Reference Material
- Omron CPM2A Operation Manual (W352-E1-07)
- Omron CJ1W-CIF11 Datasheet — RS-232C to RS-422/485 Adapter
- Omron K3SC-10 / K3SC-101 Datasheet — RS-232C to RS-485 Converter
- Omron CPM1-CIF11 / CPM1-CIF01 Datasheet — Peripheral Port Adapters
FAQ
Can the CPM2A peripheral port talk RS-485 directly?
No. The peripheral port exposes 0/5 V CMOS signals and defaults to full-duplex Host Link. Connecting an RS-485 transceiver directly will damage the CPU and will not produce valid RS-485 levels. Use a CPM1-CIF11 to RS-422 first, then derive RS-485 through a CJ1W-CIF11 or K3SC.
Do I need an external 5 V supply for the CPM1-CIF11 or CPM1-CIF01?
Yes. Neither adapter sources its own +5 V. Apply +5 V DC to pin 6 and 0 V to pin 9 of the output D-sub, with at least 200 mA capacity. Without it, the adapter will not function and the CPU's port may intermittently fail to enumerate.
What is the correct DM setting for Host Link on the peripheral port?
DM6650 = 09600 (baud), DM6651 = 0000 (Host Link, 7-E-2, no CTS), DM6652 = 00010 (100 ms response delay), DM6653 = 00000 (unit number 0). These are the values recommended in the CPM2A Operation Manual for a default Host Link slave.
Why is the first response byte corrupted when I poll the slave?
The downstream RS-485 converter is still asserting DE when the slave begins to transmit, so the first byte is clipped. Increase the master's response wait time (T_wait) to 50–100 ms, or increase the K3SC DE-release delay, so the bus is fully released before the slave drives it.
Can I run Host Link and Modbus RTU on the same RS-485 segment?
No. Host Link C-mode uses 7-E-2 framing with a C-mode checksum, while Modbus RTU uses 8-N-1 with a CRC-16. The two protocols cannot share the same physical bus. Use a separate segment, a protocol gateway, or a multi-protocol master that time-shares the bus with a known inter-frame gap.