Why JP2 Bits 36–43 Stay High
Kanalog JP2 uses differential inputs, not ordinary single-ended switch inputs. Each channel must see its positive terminal driven above its negative terminal or below it, with an absolute minimum differential magnitude of 200 mV.
Connecting the negative terminal to 0 V and switching the positive terminal between 5 V and 0 V produces only +5 V or approximately 0 V differential. It never produces the required negative differential state. This explains why KFLOP Bits 36–43 can remain unchanged even though a multimeter confirms the switch voltage. The reported internal 470-ohm resistance across an unconnected input does not create the required negative polarity.
JP2 Differential Signal Requirements
| Input condition | Differential voltage | Supported interpretation |
|---|---|---|
| Positive input at least 200 mV above negative | At least +200 mV | One valid logic state |
| Positive input at least 200 mV below negative | At most -200 mV | Opposite valid logic state |
| Both terminals at approximately the same voltage | Near 0 V | Does not meet the minimum differential requirement |
A normal differential driver was described as switching one line near 0.4 V and the other near 3 V, then reversing them. That produces approximately +2.6 V and -2.6 V differential states. Do not treat a 0-to-5 V mechanical-switch signal referenced permanently to 0 V as an equivalent differential drive.
Corrective Options and Verification
- Use a differential driver that reverses the relative voltage across each JP2 input pair and exceeds 200 mV in both directions, or move ordinary switch signals to Kanalog opto inputs.
- If opto inputs are already allocated, consider a Konnect for optically isolated standard 24 V signals.
- Alternatively, encode multiple switches into a JP6 ADC input and run C code in a forever loop to decode measured ADC ranges into Virtual I/O bits. The evidence confirms feasibility but does not provide resistor values, thresholds, or code, so derive those from the implemented circuit and measured ADC readings.
- Verify each JP2 pair by measuring voltage directly from its positive terminal to its negative terminal in both switch states. Confirm one state exceeds +200 mV, the other is below -200 mV, and the corresponding KFLOP bit changes.
Where to Enter Encoder Scale
Encoder axis resolution belongs in the application using the encoder rather than in the JP2 digital-input configuration. In KMotionCNC, enter it under Tool Setup | Trajectory Planner | Axis Parameters | Counts/inch. The evidence does not establish an equivalent setting for other applications.
FAQ
Why does a Kanalog JP2 input stay high with a 0–5 V limit switch?
The switch produces +5 V or approximately 0 V across the pair, but JP2 requires differential states on both sides of zero: at least +200 mV for one state and no more than -200 mV for the other.
Can Kanalog ADC values be converted into virtual digital inputs?
Yes. C code running in a forever loop can decode JP6 ADC values and set Virtual I/O bits. Determine the decoding thresholds from the actual resistor network and measured ADC values.
Where do I enter encoder counts per inch in KMotionCNC?
Open Tool Setup | Trajectory Planner | Axis Parameters and enter the axis resolution in Counts/inch.
