LabVIEW Crank-Angle Pressure Acquisition with E-Series Cards

Overview

Crank-angle resolved (CAR) data acquisition is a standard measurement requirement in engine development. The goal is straightforward: capture one or more analog samples (typically cylinder pressure, but also crankcase pressure, vibration, ion current, or injector drive current) at a known angular position of the crankshaft, with a resolution commonly expressed as 1 scan/°CA (one analog-to-digital scan per crank-angle degree). Unlike time-based sampling, CAR sampling stays phase-locked to the engine cycle regardless of speed, which is essential for combustion analysis, valve-event timing, and knock detection.

National Instruments E-Series multifunction DAQ cards such as the PCI-6071E support the architecture required for this measurement: an external scan clock can be routed from a counter/timer or from a PFI (Programmable Function Input) terminal directly into the analog input sample-clock line. When the encoder pulse train (channel A or channel B) is used as that external scan clock, the AI subsystem acquires a new sample on every rising or falling edge of the encoder pulse — meaning one scan per encoder increment, not per elapsed time.

Prerequisites

• Hardware: NI E-Series DAQ card (PCI-6071E, PCI-6024E, PCI-6031E, PCI-6052E, etc.) with available PFI pins supporting external AI sample clock routing.
• Encoder: Incremental optical or magnetic encoder mounted to the crankshaft, providing channel A, channel B (90° quadrature, optional) and a once-per-revolution index Z pulse. TTL or open-collector with pull-up capable of meeting NI's digital input thresholds.
• Transducers: Cylinder pressure transducer (piezoelectric or strain gauge with amplifier), GCD-SE linear transducers for piston travel, bucket-tappet LVDTs for valve lift, or any low-bandwidth analog source.
• Software: LabVIEW with the NI-DAQ (Traditional) driver. The example VI Cont Acq&Graph ExtScanClk D-Trig.vi in the labview\examples\daq\anlogin\anlog8x.llb library serves as the starting point.
• Signal conditioning: Charge amplifier or strain-gauge amplifier with anti-alias filter matched to the highest expected crank speed.

Hardware Wiring and Pinout

The E-Series AI subsystem uses pin PFI0 as the default external sample clock input on most PCI-60xxE boards. The 68-pin shield pinout varies by model; on the PCI-6071E the relevant terminals are:

Encoder Resolution and Scan-Rate Math

The number of analog scans acquired per crankshaft revolution is set entirely by the encoder's pulse count per revolution (PPR). The relationship is:

scans/rev = PPR × quadrature_factor × edge_factor

Where:

• quadruple_factor = 1 for single-channel A, 2 for A and B in quadrature, 4 for full quadrature (x4 decoding).
• edge_factor = 1 if sampling on rising edge only, 2 for rising+falling.

Examples of scan-per-revolution values at common resolutions:

To achieve exactly 1 scan/°CA, a 360-PPR encoder in x1 mode is required. This is what the original forum user (Woodi) configured. Higher resolution (e.g., 7200 PPR) gives 0.05 °CA/scan — useful for combustion-knock analysis where 0.1° crank-angle resolution is the typical floor.

Sample-rate burden on the NI card is:

effective_AI_rate = (RPM/60) × scans_per_rev

For a 4-stroke engine at 3000 RPM with 3600 scans/rev:

AI_rate = 50 × 3600 = 180,000 S/s

The PCI-6071E is rated at 1.25 MS/s aggregate, so this leaves substantial headroom for additional channels (pressure, ion current, injection control current) provided the DMA path is configured for high-speed streaming.

Configuring the AI Task in Traditional NI-DAQ

Two timing signals must be configured in parallel:

1. AI sample clock source: Set to External Scan Clock, source = PFI0. Polarity = rising edge. Number of scans = finite or continuous (continuous is the practical choice for sustained engine runs).
2. Counter task for position tracking: Configure CTR1 in Event Counting mode gated by the Z-index pulse; this gives a revolution counter and lets the software reset the degrees display to 0°CA on every Z transition.

LabVIEW block diagram wiring for the canonical example VI Cont Acq&Graph ExtScanClk D-Trig.vi:

AI Config (CH0, range ±10V, continuous)
   clock source → External (PFI0)
   trigger      → Digital trigger on PFI1 (encoder Z, rising edge)
   buffer size  → 14400 (matches 7200 PPR × 2 rev history)
   AI Start

CTR Config (Counter 1)
   gate   → PFI1 (Z index, rising)
   source → Internal 20 MHz timebase
   mode   → Counting Edges
   output → revolutions.int32

The Z index must be routed to both a digital trigger input (to capture the first revolution synchronously) and a counter (to count revolutions and reset the angular position). If the application needs to label each scan with its absolute crank angle in real time, the index event is also written to the AI buffer's metadata stream via AI_Read with position-event timestamps.

Does the VI Truly Acquire 1 Scan per Encoder Pulse?

Yes — when the AI sample clock is sourced from PFI0 (or any other PFI pin configured as the external scan clock) and the encoder A channel is wired to that same PFI, the AI subsystem performs one analog-to-digital conversion on each valid clock edge. The hardware does not measure the time between the first two pulses and extrapolate; the ADC is clocked by the encoder line directly. The post-condition is:

scan_n timestamp ≈ n × (60 / (RPM × PPR)) seconds after last Z

However, two real-world effects can break this assumption:

1. Encoder jitter: Optical encoders exhibit ±0.05° to ±0.1° mechanical jitter on individual pulses. This translates to point-to-point angular noise in the pressure trace, not a structural error in the sample count.
2. Missed edges: If the encoder cable picks up EMI from the ignition system, a few edges can be lost or doubled, causing single scans to be skipped or duplicated. This is detectable as a sudden jump in the pressure trace that does not repeat every revolution.

For this reason, an external verification with a function generator is the recommended commissioning step:

• Drive PFI0 with a known 100 Hz TTL square wave.
• Acquire for 10 seconds.
• Confirm exactly 1000 samples are returned in continuous mode (sample counter in the AI Read block).
• If sample count matches frequency × time, the AI is being clocked correctly by the external pin.

Triggering and Crank-Angle Reset Logic

The Z index pulse should be configured as the digital trigger source. In Traditional NI-DAQ, set:

AI Trigger:
   type    = Digital
   source  = PFI1
   slope   = Rising
   mode    = Start on Trigger (one-shot) or Restart (re-armable)

For continuous per-revolution re-arming (so the system recovers from a missed tooth or stall), use Pre-Trigger Reference mode and route the Z pulse as a reference trigger; this lets the buffer pre-fill with N scans of pre-trigger data, then re-center on each Z event.

Resetting the displayed crank angle to 0°CA at every Z event is a software function performed in the LabVIEW block diagram:

Revolution counter (CTR1) → i32
Angle = (i32 MOD 720) × 0.5 °CA  // for 720 PPR
Display = Angle - TDC_offset       // configurable per cylinder

TDC (top-dead-center) offset calibration is performed with a TDC indicator on the crank and a static compression test; the angular difference between the index pulse edge and the actual TDC position of cylinder 1 is stored as a constant and subtracted from the displayed angle.

Dual-Measurement Architecture (Counter + AI)

The recommended architecture runs two hardware-timed tasks in parallel:

• Task 1: Analog Input — pressure, lift, ion current, all clocked by the encoder A pulse. Buffer continuously, write to disk in chunks.
• Task 2: Counter — measures instantaneous RPM by counting encoder edges against the 20 MHz timebase over each Z-to-Z period. This provides a tachometer trace phase-locked to the same data set.

On E-Series hardware, the two tasks share the RTSI bus and can run simultaneously without CPU intervention. Critical point: the counter must not use PFI0 as its source, because that pin is already the AI sample clock. Use PFI2/PFI3 or a counter that internally routes to the APFI bus.

Data Storage and Post-Processing

For a 4-cylinder 4-stroke engine at 3000 RPM with 7200 scans/rev, raw AI throughput is 360 kS/s/channel. A typical 30-second run produces:

30 s × 360,000 = 10.8 MSamples × 2 bytes = 21.6 MB per channel

Use TDMS file format for streaming — it provides built-in support for absolute time, channel grouping, and lossless compression. Avoid legacy DAQStream (.dst) on the PCI-6071E; the older DST format is single-channel and writes do not survive driver crashes gracefully.

Post-processing (resampling, angle-domain averaging over N cycles, P-V calculation) is performed in DIAdem or a custom LabVIEW script, not in the real-time acquisition loop.

Alternative: Yokogawa DL708 Scope-Method

Troubleshooting Matrix

Verification Procedure

1. Connect function generator (5V TTL square wave, 1 kHz) to PFI0 and DGND. Run Cont Acq&Graph ExtScanClk D-Trig.vi for exactly 10 seconds. Confirm the acquired sample count is between 9990 and 10010. If not, the external clock is not being sourced correctly.
2. Connect the encoder to the test bench without the engine running. Hand-rotate the shaft. Confirm a single Z pulse is observed per revolution on a scope at PFI1 and that the AI buffer increments at the expected rate.
3. Run the engine at idle (typically 800 RPM) for 30 seconds. Plot pressure vs. angular position. Verify 720 pressure samples per revolution (assuming 720 PPR). Look for cycle-to-cycle repeatability; standard deviation across 100 cycles should be < 2% of peak pressure for a healthy engine.
4. Step the engine to 1500, 2500, 3500 RPM. Confirm the pressure trace does not shift in angle relative to the Z index (indicates timing is purely angle-locked, not time-locked).
5. Cross-check with a high-speed pressure transducer on a calibrated combustion bomb if available — this validates the entire chain including transducer, charge amp, AI, and reconstruction.

FAQ