LOGO! Soft Comfort 6.2.4/6.2.5: Troubleshooting Q Output Dropout

Problem Overview

A reproducible fault pattern occurs in Siemens LOGO! Soft Comfort V6.2.4 and V6.2.5 when editing a Function Block Diagram (FBD) program that mixes analog temperature inputs, digital mode selection, on-delay timing, and analog threshold triggers. After a specific state-transition sequence, the digital outputs Q1, Q2, and Q3 drop to 0 even though the upstream timer and analog comparator blocks continue to report active (non-zero) intermediate values. In simulation, the counter and comparator blocks keep ticking, but the physical relay outputs do not follow.

The fault is not a hardware defect in the LOGO! Base Module (BM) and is not a wiring error. It is a diagram-integrity problem in the FBD that can survive a project download to the BM and then manifest on the workshop floor. The same diagram edited in 6.2.5 with the blocks physically rearranged on the schematic page simulates correctly but produces a different defect (a lost delta-temperature hysteresis on Q1). Both defects are traced to the same family of editor bugs.

Affected Versions and Environment

LOGO! Soft Comfort V6.2.x is the long-running branch maintained for older 0BA6/0BA7 hardware. Newer 0BA8 / LOGO! 8.3 projects are typically built in V8.x or V8.4 of the tool. The defect described here is specific to the V6.2 editor and does not necessarily reproduce in V8.x because the FBD graph engine was rewritten. If you are working in a current V8.x project, jump to the Best Practices section — the prevention rules still apply.

Symptoms — Reproducible Test Sequence

The defect can be triggered in simulation in under two minutes. Use this sequence as a regression test any time you edit a 6.2.4/6.2.5 project that contains analog threshold blocks, on-delay timers, and a mode-selector digital input.

1. Open the project in LOGO! Soft Comfort V6.2.4.
2. Force AI1 = 1800 (corresponds to 18.0 °C on the typical 0.1 °C/count scaling used by PT100/PT1000 RTD modules).
3. Force I5 = 1 (mode-selector input active).
4. Wait for the on-delay timer to expire. By default the offending project uses 1 minute; for simulation you may temporarily reduce it to 1 second to speed the regression test, then restore the production value before downloading.
5. Change AI1 to 2100 (21.0 °C).
6. Switch I5 off (I5 = 0).

Expected result: Q2 and Q3 remain 1 (or transition 1) because the upstream analog threshold is now satisfied.

Faulty result: Q2 and Q3 drop to 0. The threshold/analog comparator blocks in the middle of the chain still display the correct computed value in the FBD online monitor, and the timer B042 is still counting — only the final Q coil is wrong.

Root Cause Analysis

LOGO! Soft Comfort stores the FBD as a directed graph. Each block has typed input pins and a small number of output pins. When you select a region, copy it, and paste it back into the same diagram (or into another diagram), the editor is supposed to remap the connections inside the pasted region and re-route any external wires that crossed the selection bounding box. Two distinct bugs in V6.2.4/V6.2.5 break this remap:

1. External connection loss on paste. Wires that originate outside the pasted region and terminate on a pin of a block inside the region can be silently dropped if the source pin's coordinate falls exactly on the bounding box edge or if the destination pin was renamed during the paste. The block survives, the input pin survives, but the wire does not. In the FBD online view the affected input pin shows no source and floats to its default value.
2. Block property partial copy. Some block properties — hysteresis band, on/off thresholds, parameter protection — are stored in a different sub-record than the pin map. V6.2.4 only copies the pin map. V6.2.5 copies the pin map and most properties, but a small set (notably the on/off threshold pair and the delta-temperature band) is still lost. This is why simply re-arranging the blocks in 6.2.5 "fixes" the Q2/Q3 fault but introduces a new Q1 hysteresis fault.

Both bugs share the same end-state signature: an output coil fails to follow a still-active upstream source. The Q block in LOGO! is a strict passthrough — if its input pin is 0 the output is 0, no matter what the upstream block's internal computation says. Therefore any time you see a LOGO! coil that does not match its immediately upstream block, suspect a lost wire rather than a logic error.

Step-by-Step Diagnostic Procedure

Run the following checks in order. Stop at the first check that produces a different reading between simulation and the live BM, or at the first check that reveals a missing wire.

1. Online vs. Offline comparison. Open the FBD online monitor (Tools → Online → Start Online Test). Hover the cursor over the input pin of the Q2 coil. The tooltip must show the source block's current value. If it shows No signal or 0 (default), the wire is missing.
2. Pin tooltip walk-back. Walk back upstream pin by pin. At each step, verify that the tooltip identifies a real source block. Stop at the first pin that cannot resolve a source — that pin is the break point.
3. Block properties audit. Right-click each analog threshold block in the chain (B013, B015, B026 in the typical case). Compare the On and Off thresholds and the hysteresis value against the schematic you drew on paper. A common symptom is an Off threshold that has silently reverted to 0. In the original fault report the B013 block had its Off threshold reset to 0 °C, so the coil went off whenever the input dropped below the On threshold by even 1 count.
4. Timer behaviour. Confirm that B042 is incrementing by watching its Ta (actual time) and Tt (target time) fields in the online monitor. A timer that increments correctly while the coil it drives does not energise on completion is the canonical signature of a paste-dropped wire.
5. Cross-tool verification. Save the project, close LOGO! Soft Comfort, reopen it, and re-run the simulation. A wire that exists in memory but not in the saved file will disappear on reload — this is a quick way to confirm the project on disk is corrupt and not just your running session.

Block-Level Repair Procedure

Once you have located the missing wire, repair it as follows. Do not delete and re-paste the region — the paste engine is the source of the corruption in the first place.

1. Click on the source pin of the upstream block (for example, the output pin of the analog comparator that should drive Q2). The pin highlights in red.
2. Drag a wire from the source pin to the input pin of the destination block. Release the mouse button on the destination pin. The wire appears as a solid line and the input pin tooltip immediately resolves to the source block.
3. Restore block properties that were silently zeroed. For an analog threshold block, re-enter the On, Off, and hysteresis values exactly. For a math/offset block such as B056, re-enter the offset (in the reference case the offset was -10, i.e. subtract 10 counts from the live temperature before the threshold comparison).
4. Repeat for every affected pin. Walk the entire FBD and confirm every input pin resolves to a source. Tools → Consistency Check runs a static analysis and will list any remaining floating inputs.
5. Save, close, reopen, simulate. Re-run the regression test from Symptoms. The coil must follow the upstream block.

Verification Procedure

Verification must pass on three independent platforms: simulation in V6.2.4, simulation in V6.2.5, and the live LOGO! BM with the corrected program loaded.

1. Simulation — V6.2.4. Run the regression test from Symptoms. Q2 and Q3 must follow the analog threshold within one LOGO! cycle (~50 ms in fast-scan mode) of the upstream block going high.
2. Simulation — V6.2.5. If you maintain a parallel project in 6.2.5 (recommended during the V6->V8 transition), repeat the regression test. The hysteresis on Q1 must behave per the On/Off threshold pair you re-entered — the coil must not require the input to drop all the way to 0 before releasing.
3. Live BM. Transfer the program to the BM with PC → LOGO!. Read it back with LOGO! → PC and confirm the CRC matches. Then run the regression test against the live inputs. The BM LEDs on Q1, Q2, Q3 must track the simulation exactly.
4. Long-run soak. Leave the corrected program running for at least 24 hours covering at least three full heating cycles. The original fault was first noticed after several hours of operation — a short bench test will not catch a slow leak.

Best Practices for LOGO! Soft Comfort FBD Editing

These rules are derived from the V6.2.4/V6.2.5 paste bugs and remain useful defensive practice in V8.x.

• Never copy/paste across an I/O boundary. If a region you want to duplicate includes an I, AI, Q, or AQ block, redraw the wires by hand in the new location. Copying the I/O block along with its wiring is the most common trigger for lost connections.
• Always run a Consistency Check after any paste operation. Tools → Consistency Check will flag floating inputs and zeroed block properties. Treat its output as a release gate.
• Keep a single source of truth. Maintain a "gold" copy of the schematic on paper or in a non-editable PDF. When you need to recover a corrupt project, redraw against the gold copy rather than repairing the corrupt file in place. The redrawn project will be smaller and cleaner than the repaired one.
• Lock block properties. In V6.2.5 and later, use the block property protection password to prevent accidental parameter changes. A protected block is harder to corrupt silently — LOGO! Soft Comfort will not zero a protected property during paste.
• Use naming. Assign comment text to every block. The block number (B013, B042, etc.) is reused across the project; a named block survives a paste-remap much more legibly.
• Version the project file. Save the .lsc file under a versioned name (project_v6.2.5_repaired_2024-05-17.lsc) every time you repair a paste defect. The repaired file is typically stable, but if you need to roll back, you want an authoritative copy.

Related Anomalies: Delta-Temperature Hysteresis

Once the original Q2/Q3 fault was corrected by rewiring, the V6.2.5 rearrangement introduced a second, independent defect: the Q1 coil only released when the analog input dropped to 0 °C, ignoring the configured delta-temperature band. The block-level diagnosis in the original case is illustrative for any analog threshold block:

The fix is to re-enter the On and Off thresholds on B013 explicitly, re-apply the offset of −10 on B056, and verify that the inversion on B015 is still in place. After this, Q1 toggles within the configured delta-temperature band as designed.

Simulation vs. Live Behaviour

A subtle observation from the field case: V6.2.4 simulated the fault — i.e. the on-screen Q-coil indicators dropped to 0 in the simulator. The on-bench reproduction of the same project on the real BM produced the same fault. V6.2.5 simulated correctly but failed on the real BM after download. The take-away:

• Simulation is a necessary but not sufficient verification step.
• If a project simulates correctly but misbehaves on the BM, suspect a transfer / CRC issue: re-read the project from the BM with LOGO! → PC and compare byte-for-byte.
• If the BM-side copy matches the PC-side copy and the BM still misbehaves, the FBD graph on the BM is the same corrupted graph as on the PC. The repair must be done on the PC and re-downloaded.

Escalation Path

If the V6.2.x editor continues to drop connections on your project, the supported migration path is to rebuild the project in LOGO! Soft Comfort V8.x. The V8 editor uses a different FBD storage engine and the paste bugs documented here are not present. The migration is mechanical:

1. Open the V6.2.x .lsc file in V8. V8 will prompt to upgrade the project format.
2. Accept the upgrade. The block graph is preserved, but you must re-enter any analog block thresholds and verify the comments.
3. Run the same regression test from Symptoms on the V8 project. The result must be identical to the corrected V6.2.x project.
4. Download the V8 project to a 0BA8 / LOGO! 8.x BM. Older 0BA6/0BA7 BMs require V6.2.x; the V8 tool will warn and refuse the transfer if the target BM is too old.

Frequently Asked Questions