OP77A to S7-300R Redundant CPUs: WinCC Flexible MPI Setup

Overview of the S7-300R Redundant Architecture with a Single OP

The SIMATIC S7-300R is a redundant automation configuration assembled from two identical S7-300 stations operating as a hot-standby pair. Both CPUs run the same user program in lock-step; one unit is designated as the master (active) and the other as the slave (reserve). Distributed I/O is connected through PROFIBUS DP, and the redundant pair is synchronized through a dedicated fiber-optic redundancy link or, in simpler topologies, through the MPI bus.

Introducing a single Operator Panel — in this case the OP77A — into a redundant S7-300R pair raises a fundamental HMI question: the panel cannot bind to one CPU alone, because at any moment either CPU may be carrying the active process image. The HMI must therefore be able to read from the active master, follow switchovers in real time, and display diagnostic information about which CPU is currently live.

Two implementation paths are well established with WinCC Flexible:

1. Define one PLC connection per CPU and switch the active connection at runtime using the Change Connection function (typically bound to soft keys K3/K4 on the OP77A).
2. Define two PLC connections and let the HMI follow a master/slave coordination bit read from the PLC, automatically switching the active connection whenever the bit changes.

This article walks through the port selection, the WinCC Flexible connection setup, both runtime switchover methods, and the commissioning checks that confirm the OP77A is in lock-step with the live CPU in an S7-300R pair. The SIMATIC S7-300 platform remains available from Siemens through 2033, so the configuration described here is current for both new installations and modernization projects: SIMATIC S7-300 - Siemens.

Prerequisites: Hardware, Software, and Topology

Before configuring the OP77A, verify that the following components and conditions are in place. Each item must be confirmed before you move to the WinCC Flexible configuration step.

CPU 315-2DP Port Layout and MPI Addressing

The CPU 315-2DP exposes two physical interfaces, and the choice of which one to use for the OP77A is the first design decision you must make.

Two valid bus assignments exist for a redundant S7-300R with a single OP77A:

1. MPI on X1 of both CPUs (recommended for an OP77A). The OP77A sits on the MPI segment along with the redundancy traffic. Each CPU keeps its own MPI address (typically 2 and 4), and the OP77A uses one of the free MPI addresses (for example, 3).
2. PROFIBUS DP shared between CPUs, I/O, and OP77A. The OP77A is connected to the same DP segment as the distributed I/O. This is mechanically possible but has a major caveat: if the OP77A traffic contends with I/O on the DP bus, the constant bus cycle time of the I/O must be recalculated.

For an OP77A in a redundant S7-300R pair, the MPI option is the cleanest: it keeps HMI traffic on a separate bus from the process I/O, leaves the PROFIBUS DP port free for distributed I/O only, and matches the topology described in the source thread where the I/Os are on the DP port and the CPUs exchange synchronization data over MPI.

OP77A Interface Options: MPI vs PROFIBUS DP

The OP77A is available in two interface variants: an MPI-only version and an MPI/PROFIBUS version. The MPI-only OP77A always sits on the MPI bus; the MPI/DP variant can sit on either bus and is configured per project.

Configuration parameter set in WinCC Flexible under Communication > Connections:

Connection name:       PLC1_CPU_A
Communication driver:  SIMATIC S7 300/400
HMI station address:   3                (OP77A MPI address)
PLC station address:   2                (CPU A MPI address)
Bus type:              MPI
Baud rate:             187.5 kbit/s

Connection name:       PLC2_CPU_B
Communication driver:  SIMATIC S7 300/400
HMI station address:   3                (OP77A MPI address — same panel)
PLC station address:   4                (CPU B MPI address)
Bus type:              MPI
Baud rate:             187.5 kbit/s

Both connections share the OP77A station address because only one physical panel is present. The PLC station address is the only thing that changes between the two connection objects.

Selecting the Connection Port for the OP77A

The decision tree below captures the practical selection logic. Use it to justify the port choice in the project documentation.

1. Are the I/Os on the DP port of both CPUs? → Yes (this is the source-thread topology). The DP port is occupied by distributed I/O. The OP77A must therefore go on MPI.
2. Are the two CPUs already linked over MPI for redundancy traffic? → Yes. The OP77A joins the same MPI segment using a free MPI address.
3. Is there a free MPI address in the 1..31 range? → Yes, address 3 (or any unused address other than 2 and 4) is reserved for the OP77A.

If all three answers are yes, MPI is the correct port. If the I/Os were not on DP — for instance, central I/O on the S7-300 rack — the OP77A could in principle be placed on PROFIBUS DP, but for a redundant S7-300R pair the MPI option is preferred because the redundancy protocol on MPI is independent of any DP bus load.

WinCC Flexible Connection Definition for Dual CPUs

Open the HMI project in WinCC Flexible and create two connection objects, one per CPU. The procedure is identical for both the Change Connection method and the master/slave bit method; only the runtime switching logic differs.

1. Open the project tree, right-click Communication > Connections, and select Add Connection.
2. Name the first connection PLC1_CPU_A. Set the communication driver to SIMATIC S7 300/400.
3. Enter the HMI station address (3) and the PLC station address (2). Confirm Bus type = MPI and Baud rate = 187.5 kbit/s.
4. Add a second connection, name it PLC2_CPU_B. Use the same HMI station address (3) and set the PLC station address to 4.
5. Verify the connection table now contains two rows with identical HMI parameters and different PLC station addresses.

When tags are added to the project, every tag must be assigned to one of the two connections. In the source thread the recommended pattern is to assign every tag to PLC1_CPU_A by default and switch to PLC2_CPU_B at runtime — that way only the active connection matters when reading a value.

If you intend to use the master/slave bit method (covered below), only the coordination bit and any tag you want to monitor regardless of master status need to be on PLC1_CPU_A. All other tags can be on either connection because the HMI will switch automatically.

Method A: Change Connection Function on Soft Keys

The Change Connection function in WinCC Flexible allows the operator to switch the active PLC connection at runtime. On the OP77A, this is typically wired to two soft keys: K3 for CPU A and K4 for CPU B.

1. Open the screen editor in WinCC Flexible and place two buttons on the screen.
2. For the first button, set the Event to Press and assign the function Change Connection with parameter PLC1_CPU_A.
3. For the second button, set the Event to Press and assign the function Change Connection with parameter PLC2_CPU_B.
4. Map the first button to soft key K3 and the second to K4 in the screen properties.

Runtime behavior: pressing K3 makes the OP77A read all tags from CPU A; pressing K4 switches to CPU B. The operator must be trained to look at the diagnostic screen and press the correct key after a redundancy event, or to follow a procedure that defines which key corresponds to the currently active master.

Method B: Master/Slave Bit Coordination

The master/slave bit method makes the HMI follow the active CPU automatically. The PLC program writes a coordination bit (commonly a marker in the process image, e.g., M100.0) that is set on the master and cleared on the slave. The OP77A reads this bit cyclically and switches the active connection whenever the value changes.

1. Define a tag in WinCC Flexible named MasterSlaveBit assigned to connection PLC1_CPU_A. The data type is Bool, the address is M100.0, and the update cycle is 500 ms with On change trigger.
2. In the same project, define a tag MasterSlaveBit_B on connection PLC2_CPU_B at the same address M100.0. This is the same physical bit but read through the other CPU; in a redundant pair, the bit is mirrored by the synchronization link.
3. Add a tag-named scheduler or a script that triggers every 500 ms. In the script, evaluate both MasterSlaveBit and MasterSlaveBit_B and call the Change Connection function with the connection name corresponding to the CPU that currently returns TRUE.

Script example (WinCC Flexible VBScript on a scheduled task):

' Trigger: every 500 ms
Dim sActiveConn
If SmartTags("MasterSlaveBit") = True Then
    sActiveConn = "PLC1_CPU_A"
ElseIf SmartTags("MasterSlaveBit_B") = True Then
    sActiveConn = "PLC2_CPU_B"
Else
    ' Both bits are 0 — no master detected
    sActiveConn = "PLC1_CPU_A"   ' default to CPU A
End If

' Only call Change Connection if the connection has actually changed
If SmartTags("ActiveConnection") <> sActiveConn Then
    SmartTags("ActiveConnection") = sActiveConn
    HMIRuntime.Connection.ChangeConnection sActiveConn
End If

The ActiveConnection internal tag is used to suppress redundant Change Connection calls. Calling Change Connection on every cycle is unnecessary and can briefly disturb tag polling.

Key implementation rules for the master/slave bit method:

• Place the coordination bit in the non-retentive marker area (for example M100.0) so it is rewritten on every master change.
• Use a fixed address in both CPUs; the S7-300R synchronization will mirror the value to the reserve CPU automatically.
• On the OP77A, read the bit from both connections, not just one. If you read from only CPU A and CPU A is the slave, the bit will be 0 and the HMI will not detect the master on CPU B.
• Include a watchdog behavior in the script: if neither bit returns TRUE for a configurable timeout, alarm and revert to CPU A.

Step-by-Step Commissioning Procedure

Follow this sequence at first power-up. Do not skip the verification step after each stage.

1. Bring up the redundant PLC pair first. Power CPU A, then CPU B. Open STEP 7 and confirm that CPU A reports master and CPU B reports reserve. Check that the redundancy link is error-free in the diagnostic buffer.
2. Assign MPI addresses. Set CPU A to MPI 2, CPU B to MPI 4. Connect a programming device to MPI and confirm both CPUs are reachable at their assigned addresses.
3. Power the OP77A and assign it MPI 3. In the OP77A control panel, navigate to Settings > Transfer > MPI/DP Settings and set the address to 3 with baud rate 187.5 kbit/s.
4. Create the WinCC Flexible project. Add the two connections (PLC1_CPU_A and PLC2_CPU_B) and a small set of test tags. Compile the project and transfer it to the OP77A.
5. Verify connection to CPU A. On the OP77A, press K3 (Change Connection to PLC1_CPU_A). Confirm the test tags return values from CPU A. Check Connection status in the OP77A diagnostics — it should show Online for PLC1_CPU_A.
6. Verify connection to CPU B. Press K4 (Change Connection to PLC2_CPU_B). Confirm the same test tags return values from CPU B. If you wrote a distinguishing value in CPU B's process image, confirm it appears.
7. Enable the master/slave bit method. Configure the coordination tags and the VBScript scheduler described in Method B. Transfer the updated project to the OP77A and confirm the panel is still able to read both CPUs.
8. Force a master switchover. In STEP 7, on CPU A, set the CPU into STOP. CPU B should become master within the configured redundancy switchover time (typically 100 ms to 1 s). The OP77A must switch to PLC2_CPU_B automatically. Verify by reading the diagnostic screen and the master/slave bit.
9. Restore CPU A. Switch CPU A back to RUN. Confirm the redundancy link restores and that the master/slave role assignment matches your project requirement (either CPU A returns to master or CPU B remains master, depending on your configuration).

Verification and Acceptance Tests

The acceptance test must demonstrate that the OP77A reads from the live CPU under all four combinations of master/slave and operator action.

For each test, record the time between the master change and the OP77A connection update. The typical update time on MPI at 187.5 kbit/s with a 500 ms polling cycle is 500 ms to 1 s. If the measured time exceeds 2 s, the update cycle on the master/slave bit tag is too long and should be tightened.

Troubleshooting Matrix

Field-Proven Notes and Best Practices

• Keep a printable MPI address map next to each cabinet. The most common commissioning error in redundant S7-300R projects is duplicate MPI addresses caused by ad-hoc programming device connection.
• Do not assign the OP77A to MPI address 1 unless your engineering toolchain requires it. Address 1 is frequently used by the programming device, and a power-on race between the PG and the OP77A can cause momentary bus arbitration faults.
• If you use the master/slave bit method, place a small status indicator on every HMI screen showing the currently active connection. Operators need to see at a glance which CPU the panel is talking to, especially during commissioning.
• For long MPI bus segments, use repeaters rather than daisy-chained T-connectors. A reflection at an unterminated stub can corrupt the bus and cause the OP77A to log intermittent connection drops that look like configuration errors.
• Test the redundancy switchover with a real STOP on CPU A, not just with a soft stop from STEP 7. A hard stop exercises the watchdog timing in the reserve CPU and the OP77A end-to-end.
• Document the OP77A project revision against the STEP 7 project revision. Mismatched revisions are the second most common source of intermittent HMI read errors in the field.