Resolving CJ1W-CIF12 Modbus Timeout with Omron MX2 Drives

Problem Overview

A CJ-series PLC equipped with a CJ1W-CIF12 serial communication option board is polling eight Omron MX2 variable-frequency drives over Modbus RTU on a 2-wire RS-485 multi-drop link. The setpoint update for motor speed appears sluggish: a new frequency command sent from the HMI / ladder program takes roughly 16 seconds to be reflected at the drive shaft. The CIF12 activity LED is not steady but blinks irregularly with long dark intervals. Communication parameters (baud rate, parity, data bits, stop bits) match between the PLC and every MX2 node, and the PLC-side Modbus Function Block (FB) reports its Busy output as constantly TRUE.

Field observation of the LED pattern is the diagnostic key: when activity is intermittent (flashes followed by long off periods) instead of continuous or rapidly blinking, the master is hitting a per-node response timeout and stepping to the next slave. With eight slaves and a 2 s default response wait, the effective cycle time becomes 8 × 2 s = 16 s, which exactly matches the observed update lag.

Root Cause Analysis

The CIF12 is configured with DIP switches 1, 2, 3 in ON and 4, 5, 6 in OFF. That combination leaves the RS-485 driver/receiver turnaround interval at its minimum value, but the MX2 inverter firmware and the on-board line transceiver require additional silent time on the bus between the end of the master's request and the start of the slave's response. When this silent interval is too short, the first byte of the reply is either clipped or lost in the master's receiver; the Modbus FB then waits for the full response timeout (default ~2 s) before declaring the exchange failed and rotating to the next node.

The total cycle degenerates from a healthy value (single-digit milliseconds at 115200 bit/s) to a worst-case N_nodes × T_timeout ceiling. Increasing switches 5 and 6 to ON inserts the longest available inter-frame delay supported by the CIF12, which gives the MX2 transceivers enough time to release the bus and the PLC receiver enough time to resynchronize on the response start bit. After this change the activity LED becomes steady and the setpoint becomes effectively instantaneous.

CJ1W-CIF12 Hardware and DIP Switch Reference

The CJ1W-CIF12 is a serial communications option board that mounts on the CJ1 / CJ2 CPU or expansion rack and exposes a single PORT 2 RS-422A/485 channel. It supports Modbus-RTU master/slave, host link, and raw protocol through dedicated FBs in CX-Programmer. The board carries a 6-position DIP switch block (SW1-SW6) that determines physical layer behavior. The default and the corrected settings for this fault are summarized below.

Switches 5 and 6 combine to select one of four inter-frame wait intervals before the CIF12 releases the RS-485 transmitter and enables its receiver. The wait time is required because RS-485 transceivers do not all switch at the same speed and the bus must be guaranteed silent for at least the Modbus RTU 3.5 character inter-frame gap plus the slave's processing latency.

RS-485 Turnaround Delay and Modbus Timing

Modbus RTU over RS-485 is a half-duplex protocol: the master drives the differential pair, releases it, the slave takes it, drives its reply, and releases it again. The bus must be electrically silent for at least t3.5 = 3.5 × (1/baud) seconds before the next frame starts, and the transceivers at both ends need a finite time to swap TX/RX direction.

For the standard Modbus frame (8 data bytes address + function + 6 bytes register + 2 bytes CRC = 8 bytes typical minimum, plus silence), the theoretical cycle for one transaction at 115200 bit/s with 11 bits per character is:

T_frame = (N_chars × 11) / 115200

A 17-byte request plus 21-byte response is ~38 bytes × 11 bits = 418 bits ≈ 3.6 ms on the wire. The inter-frame silent time is 3.5 × 11 / 115200 ≈ 0.33 ms. A healthy 8-drive poll should complete in under 50 ms. The observed 16 s indicates that zero successful replies are arriving on the first attempt - every node is timing out at the master's response wait (default ~2 s for the Omron Modbus FB), so the loop is dominated by 8 × 2 s = 16 s.

Correct DIP Switch Configuration

Apply the following sequence on the CJ1W-CIF12. Power down the PLC before changing any DIP switch on the option board - the switches are read only at power-on or at peripheral reset.

1. Set SW1 = ON to engage the on-board 120 Ω termination resistor at the PLC end of the trunk.
2. Set SW2 = ON for 2-wire RS-485 half-duplex operation (Modbus multi-drop).
3. Set SW3 = ON to enable RS (Request-to-Send) control - the CIF12 manages TX/RX switching internally.
4. Set SW4 = OFF to declare 1:N multi-drop topology.
5. Set SW5 = ON and SW6 = ON to insert the longest inter-frame wait.
6. Verify that the last MX2 in the daisy-chain also has its termination resistor engaged (DIP SW1 on the MX2 keypad / option board).
7. Power up the PLC and observe the CIF12 transmit / receive LEDs.

MX2 Inverter Modbus Setup

The MX2 drive family accepts Modbus RTU commands on its RS-485 port when configured through the Cxxx communication parameter group. For an 8-node multi-drop with CJ1W-CIF12 as master, apply the following baseline. Always save the new values with the MX2 Initialize step (parameter b084 = 01 cycle) only after confirming that the motor will not start inadvertently.

Slave-side response delay C077 on the MX2 is the counterpart to the CIF12 SW5/SW6 wait - if both are zero, the reply can collide with the master's TX release. Setting C077 ≥ 5 ms on every MX2 adds another safety margin.

Network Wiring and Termination

RS-485 must be wired as a daisy chain, not a star. Two wires plus a reference are required: SDA/RDA- (negative), SDB/RDB+ (positive), and an SG signal ground. Keep the shield continuous and ground it at one point only, normally at the PLC cabinet.

• Use twisted pair, characteristic impedance ~120 Ω, e.g. Belden 3106A or Alpha 2466C.
• Total trunk length must stay below 1200 m at ≤ 19200 bit/s; at 115200 bit/s, plan for ≤ 100 m with good cable.
• Terminate both ends with 120 Ω: SW1 on the CIF12 at the PLC, SW1 on the last MX2 at the far end. Do not terminate intermediate drops.
• Tap (drop) length from the trunk to each MX2 should be < 1 m. Long stubs act as unterminated stubs and reflect signals.
• Never connect SG to chassis ground at multiple points - ground loops inject common-mode noise that breaks Modbus at 115200 bit/s.

Communication Speed Selection

Although 115200 bit/s is supported by both the CIF12 and MX2, the practical speed ceiling on a multi-drop RS-485 bus in a plant with VFD noise is closer to 38400 bit/s or 19200 bit/s. Switch to a lower baud only after the SW5/SW6 fix if:

1. The CIF12 activity LED still shows uneven bursts.
2. The Modbus FB reports intermittent timeouts in the diagnostic buffer.
3. The PLC diagnostic area flags serial port 2 overrun errors (A402.07 or A424.00 area depending on PLC family).

A useful field trick: keep the master at 9600 bit/s for commissioning, prove the topology and addresses, then raise the baud once everything is stable. The MX2 default C071 = 04 is 9600 bit/s for a reason.

Verification Procedure

1. Power up the PLC with all eight MX2 drives connected, RS-485 wiring verified.
2. Watch the CIF12 transmit and receive LEDs - they should now alternate rapidly with the receive LED blinking on every poll response.
3. From the HMI, command a frequency setpoint change of 10 Hz on node 1.
4. Measure the time between HMI write and the MX2 keypad display reflecting the new frequency: target < 200 ms for an 8-node network at 115200 bit/s.
5. Repeat the test for every node address 01 through 08.
6. Force a communication error by unplugging the RS-485 connector on node 4, confirm the FB completes the cycle without hanging, then re-connect.
7. Check MX2 trip history (parameter d081) for any E041 (RS-485 communications error) entries that may have been logged during the fault window.

Extended Troubleshooting Matrix

FAQ