1. Problem Overview
An OMRON CQM1H CPU51 controller presents with the front-panel ERR/ALM LED permanently lit at power-up. When a programmer is connected via CX-Programmer in online mode, two entries appear in the controller's error log:
- Memory Error (recoverable by clearing)
- System Alarm 0x009B (non-fatal FAL error, persistent)
After clearing the memory error from CX-Programmer, the ERR/ALM LED transitions from steady-on to a slow blink, indicating a non-fatal alarm is still asserted. The decimal value of 0x009B is 155, which places the code inside the user-defined FAL range (0001h–00FFh). This is critical: the controller has executed FAL(06) with operand #155 in the ladder program, or the error was triggered by internal supervision logic whose alarm code falls in the same band.
The CQM1H is documented in the official CQM1H Series Programming Manual (W364). LED semantics, FAL/FALS behavior, and PLC Setup (DM6600–DM6655) addresses referenced in this article derive from that manual and the companion CQM1 Operation Manual (W226).
-
ERR/ALMOFF – normal operation -
ERR/ALMON (steady) – fatal error; CPU halts or enters PROGRAM mode -
ERR/ALMblinking – non-fatal error; CPU continues running
2. LED and Error Category Map
| LED state | CPU mode | Severity | Action |
|---|---|---|---|
| OFF | RUN / MONITOR / PROGRAM | None | No action |
| Blinking | RUN / MONITOR / PROGRAM | Non-fatal (FAL) | Investigate FAL code, clear bit, continue |
| Steady ON | PROGRAM (usually) | Fatal (FALS / memory / I/O bus) | Diagnose, clear cause, restart |
When both a memory error and a system alarm coexist, the steady-ON state takes priority. The memory error must be cleared first, after which the FAL code 0x009B becomes the dominant error source and the LED changes to a blink pattern.
3. Decoding FAL Error 0x009B
The CQM1H ladder instruction FAL(06) generates a non-fatal system alarm with a user-selected code. The companion FALS(07) instruction is fatal and halts the CPU. Both instructions write a code to the error stack and to dedicated status flags in the Auxiliary Relay area.
Code 0x009B analysis:
- Range check: 0x0001–0x00FF is reserved for user FAL/FALS opcodes (decimal 1–255).
- 155 decimal = 0x9B. This is a valid user-defined code, typically placed in a comparison or interlock rung.
- It is not a built-in diagnostic code (those are documented separately in W364, Chapter 7 – Troubleshooting).
To locate the source, open the project offline in CX-Programmer, press Ctrl+Shift+F to launch cross-reference, and search for FAL with operand 155 (decimal) or 9B (hex). If the original ladder is unavailable, the same scan must be performed against the binary uploaded from the unit; see Section 9 for upload issues.
4. Root-Cause Matrix: Memory Error + FAL 0x009B
Memory errors on a CQM1H originate from three primary sources, each of which can also corrupt a previously executed FAL flag:
| Root cause | Mechanism | Evidence | Reliability |
|---|---|---|---|
| Back-up battery depleted | RAM contents lost; FAL latch retained in non-volatile bit (AR2400) |
BAT ERR LED on, AR2401 may be set |
Common after years of storage |
| Conformal coating / dust on CPU PCB | Leakage paths on data bus; intermittent parity / checksum fault | Visible contamination, recurring memory error after power cycle | Common in panel enclosures without filtration |
| Corrupt Memory Card / DIP switch conflict | Bad block on Memory Card, or pin-1 of DIP in RUN-forced position | UM/IO/TBC LED combinations | Less frequent; verify switch 1/2/3 per W226 |
| Expansion I/O or CommBoard failure | Bus contention on the inner-board slot | Error clears when slot card removed | Common on CQM1H-CPU51/61 |
When the FAL code is asserted in the same scan cycle as a memory-error clear attempt, the error stack retains the FAL until its source bit is reset. This is why clearing the memory error alone does not extinguish the LED.
5. Diagnostic Procedure with CX-Programmer
- Connect the CQM1H to the host PC via the appropriate peripheral cable: CQM1-CIF01/CIF02 (RS-232C) or CS1W-CIF31 (USB-to-serial) into the CPU's peripheral port.
- Launch CX-Programmer v9.x or later, open the matching CQM1H CPU type (CPU51), and select PLC > Work Online. Use Auto Online only when the project on disk matches the program loaded in the PLC.
- Open PLC > Error Log. Confirm the two entries: Memory Error (clearable) and FAL 0x009B (non-fatal).
- Open PLC > PLC Information and capture the contents of AR2400 through AR2402 and DM6600 through DM6655. Save this to a CSV for comparison after restoration.
- Clear the memory error via PLC > Clear All Memory Areas or cycle power with the back-up battery confirmed good.
- If FAL 0x009B persists, do not assume a programming fault: proceed with hardware inspection (Section 6) before attempting to overwrite the FAL bit, which can mask a real machine fault.
6. Hardware Restoration Procedure
The field-proven sequence below resolves the simultaneous memory + FAL condition on CQM1H-CPU51 units where contamination, low battery, or capacitor degradation is suspected. Tools required: ESD wrist strap, #1 Phillips driver, OMRON-replacement battery C500-BAT08 (3.6 V lithium), and electronics-safe contact cleaner (e.g., CRC QD or Kontakt IPA 99.9%).
- Power down and isolate. Disconnect the 24 VDC supply and any 200/220 VAC input on adjacent units. Wait 60 s for capacitor discharge.
- Remove expansion I/O and option boards. Unseat the inner Communication Board, Memory Card, and any right-side I/O blocks from the CPU base. The CPU51 has one inner-board slot; record the board position before removal.
- Open the CPU housing. Unlatch the four plastic snaps, lift the CPU board from the base, and lay it on a grounded ESD mat. Do not flex the PCB.
- Visual inspection. Examine the area around the MPU and the battery clip with a 10× loupe. Look for: dust accumulation, electrolyte residue (white/green crust) around the aluminium electrolytic capacitor near the MPU, broken battery clip, and any bulging capacitor.
- De-solder and remove the aluminium electrolytic capacitor on the CPU board if bulging or leaking. The CQM1H-CPU51 typically carries a single 47 µF / 16 V part near the lithium battery. Replace with a low-ESR 47 µF / 25 V 105 °C unit, observing polarity (stripe = negative).
- Remove the lithium battery from its clip; do not bend the clip.
- Clean the board. Spray electronics contact cleaner onto a soft ESD-safe brush, not directly on the PCB, and scrub gently around the MPU, RAM, and battery clip. Follow with a clean, dry brush. Allow 10 minutes for solvent flash-off.
- Reinstall the battery and inspect clip tension; replace the clip if loose.
- Reassemble the CPU and reinstall inner-board / Memory Card / I/O. Do not apply 24 V yet – continue to Section 7 for PLC Setup and Section 8 for program download.
7. PLC Setup (DM6600–DM6655) and AR2400–AR2402
On the CQM1H, the PLC Setup area is DM6600 through DM6655. This area controls the peripheral port, RS-232C port, host link, communications mode, I/O response time, and cycle-time supervision. Several bits in AR2400 indicate active FAL/FALS state and the FAL code currently latched. The bit map below is summarized from the W364 programming manual; verify against the actual W226 Operations Manual for unit-specific address allocation.
| Address | Bit / Word | Function (summary) |
|---|---|---|
| AR2400 | Flag | FAL Error Flag – ON while any FAL 0x0001–0x00FF is active |
| AR2401 | Flag | Low Battery Flag – latches when C500-BAT08 falls below threshold |
| AR2402 | Flag | Cycle Time Over Flag – latches on maximum cycle-time exceedance |
| DM6600 | Word | Peripheral / RS-232C port settings (comm mode, baud, frame format) |
| DM6615–DM6619 | Word | RS-232C port parameters (baud, parity, data bits, stop bits) |
| DM6620–DM6623 | Word | Peripheral port parameters |
| DM6635 | Word | Host link unit number / network address |
| DM6640–DM6644 | Word | Cycle time / run-time supervision |
| DM6645 | Word | Background execution time slice, I/O refresh enable |
| DM6650–DM6655 | Word | Error log retention / start-up mode bits |
To restore communication after a clean PLC Setup area is required, the following default-ish values can be entered for a host-link peripheral port, 9 600 bit/s, 7 data, even parity, 2 stop:
-
DM6600 = 1000001000000001(binary) – standard host-link peripheral settings; verify each bit against W226 Section 5 before transfer. -
AR2400should be reset to OFF after the FAL cause is cleared. -
AR2401should be OFF once the new battery has been installed for at least 10 minutes under power. -
AR2402should be OFF; if it latches, scan the program for tasks whose cycle exceedsDM6644. -
DM6645 = 0101000000010000(binary) – cycle supervision and I/O refresh default; review against W226 if cycle overrun continues.
7.1 PLC Setup Workflow in CX-Programmer
- With the project online, open PLC > Edit > Set, or use the PLC Setup Table editor.
- Edit the relevant DM words. Press Transfer to PLC. Do not type values into the DM area directly with the binary monitor unless you are certain of every bit; CX-Programmer masks bits outside the table and may show phantom differences on Compare.
- After transfer, perform PLC > Compare with PLC. The 0x009B FAL must not re-appear in the error log after a power cycle.
8. Memory File Download and RUN Mode Recovery
- From CX-Programmer, open the source
.cxpproject that matches the unit's I/O configuration. - Select PLC > Transfer > To PLC. In the dialog, tick Program, DM, HR, AR, LR, EM, and Comments as applicable. Including the Memory File section ensures the PLC Setup (DM6600–DM6655) is written.
- When prompted Place CPU in PROGRAM mode? click Yes. The CPU will drop to PROGRAM and the
RUNLED will extinguish. - Wait for the transfer progress bar to complete. A green Transfer complete dialog confirms the file write.
- Set the front-panel key switch to RUN. The CPU performs a self-test, clears residual FAL bits that are not held in the program, and starts scanning. The
ERR/ALMLED should extinguish within 2 scan cycles if no programmed FAL is asserted. - Verify PLC > Error Log – both the Memory Error and the 0x009B entry should be replaced by a fresh "Power ON" / "RUN start" entry.
9. CX-Programmer Upload Failure Workaround
If CX-Programmer crashes during Auto Online > Upload from PLC with a Windows application error, the program memory is likely already lost or partially corrupted. Use the following work-around sequence:
- Open CX-Programmer without selecting Auto Online. Create a new CQM1H CPU51 project with the correct I/O table.
- Select PLC > Work Online (manual). Choose the correct comm port. The upload of the binary ladder will proceed; CX-Programmer may still throw a fault if a rung contains an unsupported construct, but the bulk of the program will transfer.
- If upload still crashes, switch to a second PC with a different CX-Programmer revision (v7.x with v9.x project converter) and retry. The crash is often driver-side, not PLC-side.
- After upload, immediately Save As a backup and store a binary copy via File > Memory Card File Utility > Read from PLC if a Memory Card is fitted.
10. Verification and Commissioning Checklist
| Step | Expected result | Pass criterion |
|---|---|---|
| Power up |
PWR ON, RUN ON, ERR/ALM OFF, BAT ERR OFF |
No LED change for 5 minutes |
| Error log read | Latest entry is RUN start, no 0x009B | Empty stack on Memory Error |
| AR2400 / AR2401 / AR2402 | All OFF | Re-check after 24 h powered |
| DM6600–DM6655 | Compare with stored values – equal | 0 word difference |
| Forced-set / reset test | Outputs respond, inputs latch correctly | No fault logged |
| Battery hold test | Power off 5 min, RAM retained | Program runs at power-up without re-download |
| Cycle time | Scan time < DM6644 setting | AR2402 remains OFF |
11. Preventive Recommendations
- Battery service life: The C500-BAT08 has a nominal life of 5 years at 25 °C. Replace on a calendar basis, not on first failure.
- Enclosure filtration: Install a Gore-Tex vent (IP65) on the panel door. Dust ingress is the single most common CQM1H failure mode in field reports.
- ESD discipline: The peripheral port is not isolated. Use a shielded cable and a properly grounded PC chassis.
- Memory Card hygiene: When using CQM1H-ME16K, format with Memory Card File Utility, never with a PC file manager. Card errors propagate as memory errors at power-up.
- PLC Setup backup: After every commissioning change, export DM6600–DM6655 to a CSV and store in the project archive.
12. Frequently Asked Questions
What does FAL error 0x009B mean on a CQM1H CPU51?
0x009B equals decimal 155, which falls inside the user-defined FAL/FALS range 0x0001–0x00FF. It is generated by an FAL(06) instruction with operand #155 in the ladder program, or by supervisor logic that writes to the error stack. It is not a built-in diagnostic code.
Why does the ERR/ALM LED blink after I clear the memory error?
The CQM1H prioritises the memory error first (steady ON), then drops to the FAL flag (blinking) once memory is cleared. The blink pattern is the non-fatal indicator per the CQM1 Operation Manual (W226). Clear the FAL source bit in the program or resolve the underlying condition to extinguish the LED.
Can I clear the FAL 0x009B from CX-Programmer without finding the source?
You can reset AR2400 or perform a memory clear, but the FAL will re-assert on the next scan if the ladder still drives FAL(06) #155. Always cross-reference the project (Ctrl+Shift+F) for FAL with operand 155 or 0x9B before clearing.
What are the default values for DM6600 and DM6645 on a CQM1H CPU51?
Defaults depend on the port mode. For a standard host-link peripheral port at 9 600 / 7-E-2, field-applied values are DM6600 = 1000001000000001 and DM6645 = 0101000000010000. Always verify against the latest revision of the CQM1H Series Programming Manual (W364) and the CQM1 Operation Manual (W226) for your firmware version.
Why does CX-Programmer crash when I try to upload from the PLC?
The crash is typically caused by a corrupt ladder rung (bad Memory Card, partial RAM loss) or a Windows driver fault. Open a fresh project with the correct CPU type, use Work Online instead of Auto Online, and retry on a different PC or CX-Programmer revision. If the crash persists, power-cycle the CPU with the battery removed for 60 s to clear residual comm state.