Problem Overview
After replacing a defective Siemens SIMATIC S7-300 CPU 314C-2DP with a spare of the same order number but a different firmware revision (in the incident: V2.0.2 replaced by V3.3.11), the system returns to operation with the new hardware configuration downloaded. The CPU reports SF (group error) and BF (bus fault), and every DP slave on the PROFIBUS segment shows its own BF LED. The hardware configuration in the engineering tool shows all slaves with a red slash and the CPU displays a red diagnostic star. Re-downloading the hardware configuration and the program blocks is reported as successful, but the bus does not come up.
This scenario is one of the most common PROFIBUS commissioning failures when an S7-300 DP master is replaced. The fault rarely originates in the application program and almost always traces to one of three layers: the engineering configuration, the PROFIBUS physical layer, or the CPU firmware/MLFB identification. The procedures below isolate each layer in order of likelihood and lowest remediation cost.
Affected Hardware and Firmware Identification
The CPU 314C-2DP belongs to the SIMATIC S7-300 compact CPU family with an integrated PROFIBUS DP master/slave interface. There are multiple order-number revisions of this CPU, each tied to a specific firmware range that must match the entry in the hardware configuration:
| Order number (MLFB) | Firmware family | Engineering tool |
|---|---|---|
| 6ES7314-6CF00-0AB0 | V1.x | STEP 7 V5.3 or later |
| 6ES7314-6CF02-0AB0 | V2.0.x (example: V2.0.2) | STEP 7 V5.4 SPx or TIA V13+ |
| 6ES7314-6CG03-0AB0 | V3.3.x (example: V3.3.11) | STEP 7 V5.5 SPx or TIA V14+ |
| 6ES7314-6CH04-0AB0 | V4.x | STEP 7 V5.6 / TIA V15+ |
Confirm the physical replacement by reading the order label on the front cover and the firmware version shown in PLC → Online → Accessible Nodes or on the CPU's display in the INFO / DIAGNOSTICS menu.
PROFIBUS Interface Architecture of the CPU 314C-2DP
The CPU 314C-2DP exposes two physical interfaces that are easy to confuse during commissioning:
| Port | Label on CPU | Function | Address range |
|---|---|---|---|
| X1 | MPI/DP | Combined MPI and PROFIBUS DP. Default at delivery: MPI. | 1 (default MPI) or DP master 1–126 |
| X2 | DP | Pure PROFIBUS DP master or slave | 1–126 as DP master |
For a DP master with distributed I/O, interface X2 is the PROFIBUS DP segment on which the slaves are connected. Interface X1 is typically used for the engineering connection (PG) or for MPI networking. If the DP master role is assigned to X1 in the project but the slaves are physically wired to X2 (or vice versa), the symptom matches the incident exactly: BF on the master and BF on every slave, with no slave entering data exchange. The Siemens TIA Portal DP master configuration reference documents the slot and DP interface selection steps at basics of configuring a DP master system (S7-300/S7-400/S7-1500).
LED Diagnostic Indicators
The CPU 314C-2DP and every standard DP slave expose a defined set of indicators that must be interpreted jointly:
| LED | Color / state | Meaning |
|---|---|---|
| SF | Red, steady | CPU group error — diagnostic buffer event, hardware fault, or DP configuration mismatch. |
| BF (X1) | Red, steady | Bus fault on the MPI/DP interface X1 — physical layer or DP protocol error. |
| BF (X2) | Red, steady | Bus fault on the DP interface X2 — physical layer or DP protocol error. |
| BF flashing | Red, ~0.5 Hz | DP master cannot reach one or more configured slaves — slave missing, wrong address, or wrong baud rate. |
| RUN | Green | CPU in RUN. If RUN is OFF and STOP is ON, the CPU has halted due to a fatal error. |
| STOP | Yellow | CPU in STOP — diagnostic buffer must be read. |
The pattern in this incident — SF steady plus BF steady on both master ports and BF on every slave — points to either a PROFIBUS physical layer break (cable, connector, termination) or a DP master that is not active on the segment (wrong interface selected, master not started, or configuration rejected).
Root Cause Analysis Matrix
| Rank | Layer | Likely cause | Symptom | Verification |
|---|---|---|---|---|
| 1 | Engineering configuration | Hardware configuration still references the old MLFB or old firmware | SF on CPU, BF on slaves, "Slave not found" in diagnostic buffer | Online → Hardware Diagnostics → Compare offline to online |
| 2 | PROFIBUS physical layer | Termination missing, reversed, or only one terminator active | BF steady on master and all slaves, intermittent communication | Measure voltage between pins 3 and 8: ~1 V idle (terminated) or ~5 V (unterminated); check terminator slide switch |
| 3 | Interface assignment | DP master configured on X1 but slaves wired to X2 (or vice versa) | BF on the unused port, slaves unreachable | Check Properties of the DP master interface in HW Config; trace cable |
| 4 | Baud rate / profile | Slaves set to a fixed baud rate that differs from the master | BF steady on slaves, occasional frame error counters incrementing | Set master to "Auto" or match each slave's DIL switch |
| 5 | Address conflict | Two slaves (or slave and master) at the same PROFIBUS address | BF steady on the conflicting slaves, others cycle in/out of data exchange | Disconnect slaves one at a time |
| 6 | GSD file | Third-party slave GSD not installed in the new firmware's HW catalog | Slave displayed in offline config but marked "not recognized" online | Install GSD via Options → Install GSD File |
| 7 | Master firmware | New firmware V3.3.x changes DP startup behavior, slot count, or DPV1 default | Configuration download accepted but slaves do not come up | Read diagnostic buffer; recompile with correct firmware tag or downgrade |
Step-by-Step Diagnostic Procedure
Work through the steps in order. Do not skip the physical-layer check — a single missing terminator can mask a perfectly correct configuration.
- Connect the PG via the PROFIBUS DP port, not MPI. Use a PROFIBUS cable with a 9-pin D-sub and a bus connector with the termination switch OFF at the PG end. In STEP 7 select Online → Accessible Nodes over the PROFIBUS interface. If the CPU responds only when the PG is on MPI, the DP interface is the failing segment and the engineering tool cannot see the slave-side diagnostic state over MPI.
- Open the online diagnostic buffer. Right-click the CPU in the project and select PLC → Diagnostic Buffer. Look for entries containing "DP", "Station failure", "Parameter assignment error", "Configuration error", or "Slave not found". The timestamp and event ID point to the failing layer.
- Read PROFIBUS diagnostics. Open the online view of the DP master system. Right-click each slave and choose PROFIBUS Diagnostics. The diagnostic dialog shows frame errors, retry counters, and the last valid telegram — useful to distinguish physical-layer noise from configuration faults.
- Compare offline to online hardware configuration. Select PLC → Compare Offline/Online. If the online CPU shows a different MLFB or firmware version than the offline project, the master will reject the DP startup and report BF.
- Verify the DP master interface assignment. In HW Config open Properties → PROFIBUS Interface on the CPU. Confirm the master is assigned to the physical port that the segment is actually wired to (X1 or X2). If the slaves are on X2 and the master is configured on X1, switch the assignment or move the cable.
- Inspect the segment physically. Power down the segment. Check every connector for seated termination switches (only the two end stations must be terminated). Measure the idle voltage on each segment between A and B lines — a healthy terminated segment reads approximately 1 V DC (≈5 V with the master disconnected). A reading near 0 V or near 5 V indicates an open or a short.
- Isolate by slave. Disconnect all but one slave. Power the segment and watch the master BF. Reconnect slaves one at a time. The slave that brings the BF back in is either at a duplicate address, set to the wrong baud rate, or has a failing bus interface.
Hardware Configuration Verification
Open the S7 project in STEP 7 (the equivalent TIA Portal procedure is documented in the Siemens link above) and confirm the following items match the physical replacement:
- MLFB: 6ES7314-6CG03-0AB0 (or the order number printed on the replacement CPU).
- Firmware: The version field must show V3.3.11 (or the exact firmware on the label). The drop-down is version-gated — selecting "V3.3" with V3.3.11 firmware is fine; selecting V2.0 with V3.3.11 firmware is rejected at download or produces SF on the first DP cycle.
- Slot assignment: The integrated DI16/DO16/AI5/AO2 of the 314C-2DP occupy fixed slots. Any change in firmware family can shift the addresses of the onboard I/O by a few bytes; verify against the symbol table.
- DP master system: Open the DP master properties. The "Interface" must read the port to which the slaves are physically wired. The "Address" must match the DIL switch (or the CPU display) on the master — typically address 2 for the CPU 314C-2DP when it acts as DP master, with address 1 reserved for the PG or for a higher-level master.
- Slaves: Each slave on the segment must be present with the correct PROFIBUS address and the correct GSD-based I/O map. If a slave was added after the original CPU was commissioned, its GSD must be installed in the current HW catalog.
After every change, perform PLC → Download to Target System → Hardware Configuration. STEP 7 will warn if the target CPU firmware is incompatible with the project.
PROFIBUS Physical Layer Inspection
Even when the configuration is correct, a single physical defect takes the entire segment down. The PROFIBUS RS-485 physical layer has well-defined acceptance criteria:
| Check | Method | Pass criterion |
|---|---|---|
| Cable type | Verify cable marking | PROFIBUS DP cable, 150 Ω nominal, twisted pair, shield (Siemens 6XV1830-0EH10 or equivalent) |
| Shield continuity | Continuity meter, shield-to-shield end-to-end | < 1 Ω, no breaks; shield bonded to ground at one point only |
| Termination | Count terminators with switch ON | Exactly two per segment, at the two physical end nodes |
| Idle voltage A-B | Voltmeter at any active node, segment powered | ≈1 V DC terminated, ≈5 V DC unterminated |
| Address uniqueness | Visually check DIL switches on every slave | No two nodes share an address 1–126 |
| Baud rate | Compare master profile vs. slave switches | All nodes agree (9.6 kbps up to 12 Mbps); for cable > 100 m avoid 12 Mbps |
| Segment length | Tape measure or topology print | ≤ 1,200 m at 9.6 kbps / 187.5 kbps; ≤ 200 m at 1.5 Mbps; ≤ 100 m at 12 Mbps |
The CPU 314C-2DP defaults to Auto baud rate. If a slave is hardware-set to a fixed baud rate that the auto-negotiation cannot identify within a few seconds, the segment will fail to come up. For deterministic startup, set the master profile to the segment's target baud rate and confirm every slave matches.
Firmware Compatibility Considerations
Moving between firmware families is a hidden source of DP faults. V3.3.x of the 314C-2DP introduces features and constraints not present in V2.0.x:
- Slot count and I/O consistency: The onboard I/O mapping may be reorganized. A project compiled against V2.0.x may compile but fail the CPU's online/offline consistency check on V3.3.x.
- DPV1 services: V3.3.x enables DPV1 by default on the DP master. Slaves that are not DPV1-capable may refuse the startup sequence and report BF.
- Diagnostic buffer format: Event IDs differ between V2.0.x and V3.3.x. Documentation from V2.0.x cannot be used to interpret V3.3.x buffer entries without a cross-reference.
Before any cross-family replacement, pull the project from the old CPU with PLC → Upload Station to PG, then open the freshly uploaded project on the PG connected to the new CPU and compare. If a project backup is unavailable, build a clean HW Config from scratch using the new MLFB and download.
Restoring PROFIBUS Communication
After the configuration and physical layer are clean, run the following sequence to bring the segment back up:
- Save and compile the corrected HW Config. Resolve any "incompatible firmware" or "module does not exist in target" warnings.
- Select PLC → Download to Target System → Hardware and Software. Confirm the dialog showing the target CPU firmware matches the physical CPU.
- Switch the CPU to STOP if it is in RUN, then back to RUN after download. The CPU performs a cold restart, reinitializes the DP master, and sends
Get_Cfgto every configured slave. - Watch the slave BF LEDs. A correctly addressed slave clears BF within 2–5 seconds of the master startup.
- In HW Config online view, confirm every slave shows a green check rather than a red slash. The diagnostic buffer should be free of new DP entries.
If BF persists on a single slave only, that slave is the failing node — swap its bus connector, then its power supply, then the slave itself.
Verification and Commissioning
Before returning the line to production, perform a complete verification cycle:
- Diagnostic buffer: Empty of DP events for at least 10 minutes of normal operation.
- PROFIBUS diagnostics: Retry counters stable; no frame errors incrementing; no station failures.
- I/O check: Force each input from the PG and verify the corresponding input bit in the process image; toggle each output and verify with a multimeter at the field terminals.
- Cold restart test: Power-cycle the CPU. Confirm DP comes up cleanly without operator intervention within 15 seconds.
- Hot restart test: Switch the CPU from RUN to STOP and back. DP must re-establish without re-downloading the configuration.
- Spare inventory: Update the spare CPU label to the new MLFB and firmware. Mixing V2.0.x and V3.3.x spares in the same line is a documented cause of intermittent SF/BF faults that are very hard to diagnose after the fact.
Cross-Platform Notes
For users migrating from or integrating with non-Siemens PROFIBUS masters, the same diagnostic discipline applies. Pro-face HMI PROFIBUS DP slave drivers document the external device connection topology used when a Pro-face display is dropped on a Siemens DP master segment (see the Pro-face PROFIBUS DP Slave Driver manual). Schneider Electric's Machine Expert provides a parallel DP master configuration editor for NetX-based controllers documented at the Schneider Electric PROFIBUS DP NetX master configuration page. The fault indicators (SF, BF, slave red-slash) and the layered diagnostic procedure (configuration → firmware → physical) are identical across vendors.
Frequently Asked Questions
Why does the CPU 314C-2DP show BF on both X1 and X2 after a CPU replacement?
BF on both ports indicates the DP master startup failed, typically because the hardware configuration does not match the physical replacement (different MLFB or firmware). Open the diagnostic buffer via the PROFIBUS port — not the MPI port — and compare the online MLFB and firmware to the offline project. The CPU will not start a DP master cycle when its own identification does not match the configuration it has loaded.
Can I reuse the same STEP 7 project after replacing the CPU 314C-2DP with a different firmware?
Only after updating the hardware configuration to the new MLFB and firmware version. The CPU rejects configurations written for a different firmware family at startup and reports SF and BF. Recompile the HW Config against the replacement CPU's exact order number and firmware tag, then download hardware and software together — not blocks only.
Should I connect the programming device to the MPI port or the PROFIBUS DP port for online diagnostics?
Connect to the PROFIBUS DP port when troubleshooting DP faults. The MPI port cannot see the DP master's diagnostic state or slave-side events. Set the PG's PC adapter to PROFIBUS and the correct baud rate, attach via a PROFIBUS connector with termination OFF, and use Online → Accessible Nodes over PROFIBUS.
How do I tell whether the BF is a physical-layer fault or a configuration fault?
Disconnect all slaves and measure the idle voltage between pins 3 (B) and 8 (A) of an active PROFIBUS connector. A terminated segment reads approximately 1 V DC; an unterminated one reads approximately 5 V DC. If the voltage is correct on a single-slave segment and the slave still reports BF, the fault is configuration-related — address, baud rate, or GSD mismatch.
Does a V2.0.x program block run on a V3.3.x CPU without recompilation?
Not reliably. Some firmware transitions enforce a re-sign of the program blocks on first download. Always perform a full Download to Target System → Hardware and Software after a cross-family replacement, then cold-restart the CPU and verify the diagnostic buffer is free of slot or consistency errors before returning the line to production.