Problem Overview
When commissioning a SIMATIC S7-200 CPU 224 (order number 6ES7214-1AG31-0XB0) running firmware V3.0.2 inside STEP 7 (TIA Portal) V11, the hardware catalog in the project tree typically displays only the base catalog entry V3.0. The intermediate firmware level V3.0.2 is not enumerated as a separate catalog item. If a user opens a project that referenced V3.0.2, or attempts to download a configuration generated against a different firmware entry, the engineering tool raises an "HW configuration not compatible" or "Module does not support the configured firmware version" error and refuses the operation.
Field incidents show that the error often surfaces only after the operator has already performed a Download to device (PG → PLC) with a mismatched configuration. Because the S7-200 CPU 224 has no removable Micro Memory Card, and because the user may not have an offline backup of the original program, the immediate concern becomes: how to restore the previous PLC state. The recovery path differs depending on whether the PLC still contains a valid, executable user program and whether the original project archive can be obtained from a backup, a colleague, or the machine builder.
Affected Hardware and Firmware
The PLC referenced in the source case is the S7-200 CPU 224 AC/DC/Relay, MLFB 6ES7214-1AG31-0XB0. Confirm the order number on the PLC's front panel nameplate before applying any of the procedures below, because the CPU 224 has multiple derivatives (DC/DC/DC, AC/DC/Relay, relay variants) with different firmware levels.
| Parameter | Value |
|---|---|
| Order number (MLFB) | 6ES7214-1AG31-0XB0 |
| Designation | CPU 224 AC/DC/Relay |
| Digital inputs | 14 (24 V DC) |
| Digital outputs | 10 relay contacts, 2 A |
| Analog inputs | 2 (0..10 V, 10-bit) |
| Analog outputs | 1 (0..10 V, 8-bit) |
| Program memory | 4096 words (8 KB) user program, 4096 words data |
| Bit execution time | 0.22 µs |
| Communication ports | 1 × RS-485 (PPI/MPI/Freeport/USS) |
| Removable media | None (no MMC slot) |
| Backup mechanism | On-board EEPROM (project, retentive data, IP/port settings) |
| Catalog firmware baseline | V3.0 (V3.0.0, V3.0.1, V3.0.2 all map to V3.0) |
Because the CPU 224 stores the user program, data blocks, retentive memory, and the CPU's communication/port configuration in internal EEPROM, the PLC retains the program across a power cycle but does not support a swap-in backup card. A firmware update on this CPU is also performed through the programming tool (PPI / USB-PPI cable) and not via removable media.
Root Cause: How TIA Portal V11 Maps Firmware Sub-Versions
STEP 7 (TIA Portal) V11 and its Service Pack V11 SP2 introduced S7-200 support through a dedicated add-on and the Hardware Support Package (HSP) mechanism. The hardware catalog is structured by catalog entry name and version, not by every sub-version a CPU has shipped. The catalog entry "CPU 224, V3.0" therefore covers all CPUs whose firmware begins with 3.0 — namely V3.0.0, V3.0.1, and V3.0.2.
The mapping rule that governs the catalog is straightforward:
- Catalog entry V3.0 ⇒ serves all firmware states V3.0.x (where x is the service level: 0, 1, 2, ...).
- Catalog entry V4.1 ⇒ serves all firmware states V4.1.x, including the actual device firmware V4.1.2.
- Catalog entry V3.1 ⇒ serves all firmware states V3.1.x, which is a functionally distinct branch from V3.0.x.
The conflict arises only when the user explicitly creates a project that pins the CPU to a sub-version the catalog cannot resolve — for example by importing a project from a newer TIA Portal version that has V3.0.2 as a discrete catalog item, by hand-editing the device description XML, or by using a project that was migrated from STEP 7 Micro/WIN with a specific firmware tag. The same rule applies to the related 6ES7214-1AD31-0XB0 (CPU 224 DC/DC/DC) and 6ES7214-1BD31-0XB0 (CPU 224XPsi) variants within the same firmware family.
Pre-Download Best Practices
Two rules must be enforced on every S7-200 service intervention to prevent the recovery scenario the source user encountered.
- Always Upload first. Before touching the PLC, execute Online → Upload from device (PG/PC) and save the result as a new TIA Portal project. This captures the exact program, DBs, and system data currently in the PLC.
- Compare Online vs Offline. With both the original offline project and the freshly uploaded project open, use Online → Compare Offline/Online to identify drift in OB1, subroutines, DBs, force table, and CPU configuration. Only when the comparison is reviewed and intentional should a Download be performed.
Both steps assume the PLC is reachable on its PPI network. If communication fails, the PLC must be brought online through a known-working PC/PPI cable (USB-PPI or RS-232 PPI) at the default baud rate of 9.6 kbps; the PLC will accept PPI at this rate regardless of project-defined baud rate as a fallback. See the S7-200 Programmable Controller System Manual for the port pinout, the LED diagnostics page, and the procedure to switch the CPU into STOP before any download.
Required Tooling and HSP Installation
The minimum environment to work with the 6ES7214-1AG31-0XB0 in TIA Portal V11 is STEP 7 (TIA Portal) V11 SP2 or higher, with the S7-200 HSP installed. Confirm the following before opening the project:
| Component | Required value |
|---|---|
| STEP 7 / TIA Portal | V11 SP2 or V12, V13, V13 SP1 (V11 SP2 is the minimum for S7-200 support) |
| S7-200 HSP | Installed for the target catalog version (V3.0 for V3.0.2 device) |
| PC/PPI cable | USB-PPI (6ES7 901-3DB30-0XA0) or RS-232 PPI (6ES7 901-3CB30-0XA0) |
| PPI baud rate | 9.6 kbps (PLC default), 19.2 kbps, 187.5 kbps (project-defined) |
| PG/PC interface | PPI (or PC/PPI cable, Auto-detect) |
| PLC mode | STOP for download; RUN optional for upload |
Install the S7-200 HSP from the TIA Portal installation media or via Options → Support Packages → Install in the TIA Portal menu. After installation, verify that the catalog shows the device under PLC → CPU 200 → CPU 224 with version V3.0. If the catalog still does not show V3.0, the HSP has not been registered, and any project against the CPU 224 will compile to an unsupported device placeholder.
Step-by-Step Recovery Procedure
Apply the steps in order. Do not skip step 2; the upload is the only way to obtain a working copy of the current PLC state.
Step 1 — Stop the Plant and Verify Hardware
- Place the controlled machine in a safe state. Open the safety circuit, lock out the energy source, and verify that the CPU's STOP/RUN switch is in the STOP position.
- Inspect the CPU's status LEDs: SF (system fault), BF (bus fault), and RUN. A steady SF during power-up indicates a corrupt program or hardware configuration error. A flashing SF with a constant STOP LED after a download typically indicates that the downloaded program references an I/O point or symbol that does not match the real wiring — a strong hint that the wrong project was downloaded.
- Record the PLC's order number, firmware version, and any error code from the diagnostic buffer. Read the diagnostic buffer via Online → Diagnostics → Diagnostic buffer after establishing PPI communication.
Step 2 — Upload the Current Program from the PLC to the PG
- Connect the USB-PPI cable to the PLC's port 0 and to the engineering PC. Set the PG/PC interface in TIA Portal to "PPI" with the cable auto-detected.
- Open TIA Portal and create a new project. From the project tree, right-click the device and select Upload from device (PG/PC). Confirm the target CPU is the 6ES7214-1AG31-0XB0 with firmware V3.0.2.
- Save the uploaded project immediately as a new archive under a distinct name, e.g.,
224_uploaded_2024-MM-DD.zip. This file is now the working copy of the PLC's current state, even if that state is the post-corrupt state. Do not delete or modify it.
Step 3 — Identify the Drift Between the Original and the PLC
- Open both the original offline project (the one the user attempted to load) and the freshly uploaded project.
- Use Online → Compare Offline/Online on each block. Pay particular attention to OB1, the system data blocks, the retentive data, and the force table.
- Document every difference. A typical drift is in the hardware configuration: a different EM (expansion module) list, a wrong analog input range, a wrong baud rate, or a different PPI address. The hardware configuration lives in the system data block (SDB) and is the first place a non-matching project breaks the PLC.
Step 4 — Rebuild a Compatible Project
- Create a third TIA Portal project, this time selecting the CPU 224 with catalog version V3.0 (which serves firmware V3.0.2). Do not import the offline project directly; the offline project is the one that triggered the mismatch.
- Add the correct rack: the CPU 224 occupies slot 0; add EM modules in slots 1..7 to match the machine's I/O (e.g., EM223, EM235, EM232, EM231).
- Copy the program blocks from the uploaded project into the new project. Manually re-apply the symbol table, the comments, and any hardware-specific configuration values (PPI address, baud rate, retentive memory ranges) from the machine schematic.
Step 5 — Compile and Download the Rebuilt Project
- Compile the rebuilt project. The compiler must report "0 errors" before download is allowed.
- Switch the CPU to STOP, then trigger Online → Download to device. Confirm the dialog shows the correct device type and firmware V3.0.2.
- When the download completes, switch the CPU back to RUN. Verify that the SF LED extinguishes and that outputs behave as expected. Run the machine through a controlled test sequence before returning to production.
Verification
After the rebuild and download, the following checks confirm that the PLC is back to a healthy state.
| Check | Expected result |
|---|---|
| CPU LED state | RUN on (green), STOP off, SF off |
| Diagnostic buffer | No new "Firmware update", "Hardware configuration error", or "System data error" entries |
| Online ↔ Offline comparison | Identical (no differences) for OB1, all SDBs, all DBs |
| Force table | Empty (no stale forces from a previous project) |
| Retentive data | Values preserved through a power cycle |
| PPI communication | Stable on the configured baud rate (19.2 kbps or 187.5 kbps depending on project) |
| Machine trial run | All inputs and outputs respond per the I/O map; no "Field device not responding" alarms |
If the diagnostic buffer continues to log a hardware configuration error after a clean download, the most common cause is a wrong EM (expansion module) model in the device configuration. The CPU will not refuse a download that lists an EM the machine does not physically have, but the EM slot will not respond on the I/O bus. Conversely, an EM present on the machine but missing from the project generates a "Module missing" diagnostic event every CPU scan.
Troubleshooting Matrix
| Symptom | Likely cause | Action |
|---|---|---|
| Catalog shows only V2.x, not V3.0 | S7-200 HSP not installed or V11 SP2 not applied | Install HSP for V11 SP2; restart TIA Portal |
| Catalog shows V3.0 only, not V3.0.2 | Normal — V3.0.2 is a service level of V3.0 | Use V3.0 catalog entry; do not edit the device description |
| Download fails with "Firmware version not supported" | Project was created against V3.1, PLC is V3.0.2 | Change device to V3.0 catalog entry; recompile; download |
| Download succeeds, but SF LED stays on, RUN off | Hardware configuration mismatch (EM list, analog range) | Compare SDBs online/offline; correct EM model list |
| PPI cable not detected by TIA Portal | PG/PC interface set to TCP/IP, not PPI | Set PG/PC interface to PPI → USB-PPI cable |
| Upload returns only empty blocks | PLC program memory cleared or CPU is in factory state | No project available; contact OEM for the original archive |
| PLC unreachable on PPI | Baud rate mismatch; cable damaged; wrong PPI address | Try 9.6 kbps fallback; verify cable; check PPI address in the project |
| Diagnostic buffer reports "Parameter assignment error" | Analog input module set to a range the wiring does not support | Set the analog range per the schematic; redownload SDBs |
Working with S7-200 CPUs That Have No MMC
The S7-200 family predates the S7-300/400 MMC and the S7-1200/1500 SIMATIC Memory Card. The user program, the system data, the retentive data, and the CPU's communication parameters are stored in on-board EEPROM. The implications for service are:
- No program card backup is possible. The PLC is its own backup. If the user program is corrupted and no archive exists, the only way to obtain a working copy is to upload from device — which requires that the PLC still contains a valid, even if non-functional, program.
- Power cycling does not clear the program. The EEPROM retains the program across a power loss. A failed download therefore leaves the previous program only if the download was interrupted before completion. A completed download overwrites the previous program.
- Firmware updates are performed over PPI. The CPU 224's firmware is updatable only via the programming tool and the PPI port. The firmware version is therefore not something a service technician can reset on the bench without the corresponding TIA Portal version.
If the PLC's program is unrecoverable and no backup is available, the only path forward is to contact the machine builder or the original system integrator and request the original STEP 7 Micro/WIN archive (or the TIA Portal archive if the project was migrated). The schematic set, if it includes the I/O list, the symbol table, and the program narrative, is also a viable input for a manual reconstruction.
Project Hygiene for Future Interventions
To prevent recurrence, the following engineering practice must be applied to every S7-200 intervention.
- Maintain a versioned project archive. Store every project in a versioned repository (Git, SVN, or at minimum a dated ZIP archive) with the device's MLFB and firmware in the filename.
- Tag the catalog entry explicitly in the project. Open the device properties, navigate to General → Catalog Information, and confirm that the entry reads "CPU 224, V3.0". A comment in the project header should state the on-device firmware as V3.0.2.
- Document the on-device firmware separately. The on-device firmware can be read with Online → Accessible devices → Read diagnostics. Record this on the schematic or in the project's README.
- Enforce a download checklist. Before any download: (a) upload the current PLC state, (b) save as a new project, (c) compare online/offline, (d) confirm the difference is intentional, (e) compile, (f) download in STOP, (g) verify in RUN, (h) archive the new project.
Compatibility with STEP 7 Micro/WIN and TIA Portal Migration
Many S7-200 projects still live in STEP 7 Micro/WIN V4.0 SP9 (the last V4.x version) or in Micro/WIN SMART. TIA Portal V11 SP2 introduced S7-200 support through an import path: Micro/WIN V4.0 SP9 archives (
If the migration produces a project pinned to firmware V3.0.2 but the TIA Portal catalog only shows V3.0, the workaround is to set the device's catalog entry to V3.0 manually. The compile and download succeed, and the PLC accepts the configuration because the on-device firmware V3.0.2 is a service level of V3.0.
For projects being moved to TIA Portal V13 / V14 / V15 / V16 (V15.1 and later dropped S7-200 support in favor of S7-200 SMART), the same V3.0 catalog entry rule applies until the project is migrated to a SMART-style CPU. The S7-200 SMART CPUs use a different MLFB series (6ES7288-...) and are out of scope for the catalog rule discussed in this article.
Frequently Asked Questions
Why does TIA Portal V11 show only V3.0 and not V3.0.2 in the hardware catalog for the 6ES7214-1AG31-0XB0?
STEP 7 (TIA Portal) catalogs S7-200 CPUs by major.minor firmware level. V3.0.2 is the service level of V3.0 and is intentionally not listed as a separate catalog entry. Selecting V3.0 in the catalog covers the device firmware V3.0.0, V3.0.1, and V3.0.2; the engineering tool will download to a V3.0.2 device without error.
I downloaded a mismatched project to the CPU 224. Can I undo the download?
No, the S7-200 has no MMC, no transaction log, and no automatic rollback. The previous program is overwritten the moment the download completes. The only way to recover the previous state is to Upload from device to PG before the next change, or to restore the original project from a backup, the schematic, or the original system integrator.
What is the minimum TIA Portal version to support the S7-200 CPU 224 with firmware V3.0.2?
STEP 7 (TIA Portal) V11 SP2 introduced the S7-200 add-on and the supporting HSPs. V11 SP2, V12, V13, and V13 SP1 all support the 6ES7214-1AG31-0XB0 against catalog entry V3.0. TIA Portal V14 supports S7-200 only with the S7-200 add-on HSP; TIA Portal V15.1 and later do not support the classic S7-200 line.
After a clean download, the SF LED stays on. What is the first thing to check?
Open the diagnostic buffer via Online → Diagnostics → Diagnostic buffer. The most common entry is "Hardware configuration error" caused by a wrong EM (expansion module) list or a wrong analog input range in the system data block. Compare the configured rack to the physically installed modules and adjust the device configuration accordingly.
The PLC is unreachable on PPI. What baud rate should I try first?
The S7-200 CPU 224's PPI port always supports the 9.6 kbps fallback regardless of the project-defined baud rate. Set the PG/PC interface to PPI → USB-PPI cable with 9.6 kbps, address 2 (the factory default), and try to go online. If communication succeeds, the project baud rate is the one to keep; if it does not, verify the cable, the COM/USB driver, and the PPI address in the project.