S5-115U System Data Words: BS, RS, SD Reference Manual

S5-115U System Data Word Reference: Architecture, Access, and Conversion

The SIMATIC S5-115U is a modular mid-range PLC from the SIMATIC S5 family that exposes its internal controller state through a structured block of System Data Words (in German: Systemdatenwörter). These words carry diagnostic codes, OB interval times, process-image scan times, and the 16 performance-control bits that change how the CPU treats timers, counters, OB priorities, and restart behaviour. Because STEP 5 programs can read and even overwrite portions of this area, every migration to STEP 7 (S7-300/400 or S7-1500 via S5 migration tooling) must begin with a clear map of which System Data Word the original program is touching and what value it forces.

This reference consolidates what the published S5-115U Programmable Controller manual (6ES5 998-0UF23) describes in Section 6.4 ("System Data") — the same section that starts on page 159 of the English print edition — and pairs it with the field-proven semantics engineers need when reading legacy STEP 5 listings. Throughout this document, the German abbreviation BS (Betriebssystem), the synonym RS (Rechner-Systemdaten / Runtime System Data), and the generic SD all refer to the same 16-bit internal word set; only the prefix changes between CPU firmware revisions, language versions, and manual printings.

S5-115U CPU Family and System Data Capabilities

The S5-115U ships with four central-processing-unit options that determine the depth and resolution of the System Data area. Each CPU uses the same word numbering, but not every word is populated on every CPU.

For System Data Words RS 97 and RS 120 — the two values most often encountered in STEP 5 code that triggers migration questions — the 941-944 series is homogeneous: RS 97 in any 115U CPU (941-944) carries the OB13 interval time in multiples of 10 ms, and RS 120 always contains 16 individual bits that govern system performance characteristics such as timer/counter retentivity and OB6 priority. Differences between CPUs appear in the available scan-time words, the floating-point process image, and the diagnostic-stack depth, all documented in the 6ES5 998-0UF23 manual.

System Data Word Notation: BS, RS, and SD Conventions

STEP 5 supports three families of operand identifiers that all index the same System Data array:

• BS — German original ("Betriebssystem"). Common in older German-language listings and in the System Data section of the German S5-115U Handbuch.
• RS — Siemens-internal synonym used heavily in the English S5-115U manual. The English manual at one point introduces RS, then drops back to BS without warning, which is the most common reason engineers believe they have a missing operand.
• SD — Generic identifier used in STEP 5 V6+ programming tools and in the STEP 5 → STEP 7 converter tables. SD is the most portable form when searching Siemens Support entries.

Mnemonic mapping for STEP 5 source lines:

L  RS  97      // Load System Data Word 97 (OB13 interval) into ACCU 1
L  BS  120      // Load System Data Word 120 (performance bits) into ACCU 1
T  SD  120      // Transfer ACCU 1 into System Data Word 120 (overwrite bits)
L  IW  0        // NOT a System Data Word – do not confuse with process input

The 16-bit value loaded from a System Data Word is right-aligned in the accumulator; the upper byte of the word follows the same bit significance as any standard 16-bit STEP 5 word (bit 0 = LSB, bit 15 = MSB). When transferring back with T BS n or T RS n, you are writing to a CPU-internal register that the firmware samples on each scan. The change is immediate; no restart is required unless the bit is documented as "effective after RESTART" in the manual.

System Data Word Address Map (Overview)

Page 159, Section 6.4 of the English S5-115U manual lists every System Data Word together with a cross-reference to the section that describes it. The condensed map below groups the words by function so a migration engineer can find a candidate word in seconds.

Diagnostic and Status System Data Words (BS 0 – BS 31)

The low-numbered System Data Words expose the live state of the CPU to user code. They are the only way a STEP 5 program can ask the firmware "why did you stop?" without an external programmer.

Reading these words is a common pattern in legacy programs that implement their own "blue-screen" diagnostic display. A typical STEP 5 sequence looks like:

L   BS 4           // Last stop cause (low byte)
T   DB 100 DW 0     // Copy to user DB for the diagnostic message
L   BS 12           // BSTACK pointer high word
T   DB 100 DW 1
L   BS 16           // Current cycle time (ms)
T   DB 100 DW 2

During STEP 5 to STEP 7 migration, replace BS 4 with STW / STW1 reads in S7 (status word) and replace BS 16-class scan-time values with SFC 78 ("OB_RT") / SFC 6 / SFC 7 cycle-time queries. The semantics differ enough that the value should not be copied directly; treat it as a "yes, the original program cared about cycle timing" flag, then re-implement the diagnostic against the S7 equivalent.

Timing System Data Words (BS 96 – BS 111)

Words 96 through 111 hold the time bases for time-driven organisation blocks. The 115U supports a fixed set of OBs whose trigger period is hardware-or-firmware-defined, and the System Data Word for each OB holds the period as a multiple of a base tick (10 ms on the 115U, 1 ms on later S5-135U/155U). RS 97, the OB13 interval, is the most frequently read word in this group.

The value stored is an unsigned 16-bit count of base ticks. To change the OB13 period from the default 1 second to, say, 250 ms, the legacy code transfers the value 25 into word 97:

L   KH 0019        // 25 decimal = 250 ms @ 10 ms base
T   BS 97           // Overwrite OB13 interval – effective after RESTART

During migration to STEP 7, BS 97 → OB13 is replaced by configuring the OB35 / OB38 / OB1x periodic-interrupt block in HW Config (S7-300) or in the device configuration of the S7-1500. The 10 ms base tick is preserved on the S7-300 (CPU 314-319) and the S7-1500 (CPU 1510-1518) hardware-timer OB family, but the integer count range and the RESTART semantic are different — the migration tool will warn when it cannot map 1:1.

System Performance Characteristics (BS 120 – BS 127)

Word 120 is the most configuration-rich System Data Word in the S5-115U. It carries 16 individual bits that determine system performance characteristics, including but not limited to: retentivity of timers, retentivity of counters, OB6 priority level, restart method, and the error-LED behaviour. The exact bit-to-function assignment is documented in Section 6.4 of the S5-115U manual; the table below lists the bit ranges and the characteristic they control.

A typical field pattern is a one-shot initialisation block that loads a configured constant into RS 120 during cold start:

// PB 100 – COLD-RESTART configuration block
L   KH F800         // Set timer retentive, counter retentive, OB6 priority 7
T   RS 120          // Latch the 16 performance bits
BE

Reading RS 120 for diagnostics is also common in watchdog-style applications. The bit at position 0 (timer retentivity) is the most often flipped bit in the field, because the default of "all timers cleared on power-cycle" surprises many engineers who treat S5 timers like S7 IEC timers.

System Data Word DBs and Memory Access

STEP 5 also exposes the System Data Words as data words inside reserved data blocks — most commonly DB 0 / DB 1 and the system DBs created by COM 115 / COM 945 — so that operators can monitor values with a standard PG rather than the S5-DOS programmer. The relationship is:

If the migration project is using the SIMATIC S5 → S7 converter, the tool reads the direct-operand forms (L RS / T RS) and emits a warning when it cannot resolve the System Data Word into an S7 system function. Treat the warning as a TODO: open the original STEP 5 listing, find the operand, look up the function in the S5-115U manual Section 6.4, and implement the S7 equivalent with the SFC family or the periodic-interrupt OB configuration.

STEP 5 to STEP 7 Conversion Considerations

When converting a STEP 5 program that touches the System Data Words, the migration engineer should treat the BS/RS/SD area as a "first-class" interface, not as a flag variable. The recommended procedure is:

1. Generate a complete list of every L RS, T RS, L BS, T BS, L SD, T SD statement in the STEP 5 source. Most STEP 5 editors (COM 115, COM 945, S5-DOS) print a cross-reference that includes operand type.
2. Map each operand to the function listed in Section 6.4 of the S5-115U manual. The two words that almost always appear are RS 97 (OB13 interval) and RS 120 (system performance bits).
3. Decide the S7-300/400 target:
   • BS 0 (system status) → STW1, STW2, or read of the diagnostic buffer with SFC 13 / SFC 59.
   • BS 4 / BS 5 (stop cause) → diagnostic buffer read with SFC 13 ("DP_TOPOL" / "RD_REC") and SFB 52 "RDREC".
   • BS 16 (cycle time) → SFC 6 / SFC 78 cycle-time query in OB1.
   • RS 97 (OB13 interval) → OB35 / OB38 configuration in HW Config or in the periodic-interrupt block properties.
   • RS 120 (performance bits) → S7 retentivity setting in the CPU properties (Retentive Memory: Timers / Counters / Bit Memory), and the OB priority configuration in OB1 priority block.
4. Verify each replacement in OB1, OB100 (cold restart) and OB101 (warm restart) on the S7 target. The OB100/101 cold-restart block is the natural location to re-implement an RS 120-style performance configuration.

Verification and Diagnostic Procedures

After any code change that touches a System Data Word, verify the result with the following checks before returning the controller to production:

1. Online status of RS 120. With the PG online, read RS 120 (or its DB-mapped equivalent) and confirm the expected bits are set. Cross-check the bit map against the CPU's firmware-revision print of Section 6.4.
2. Cycle-time assertion. Read BS 16 (current cycle) and BS 17 (max cycle) and confirm the cycle time is below the OB1 watchdog threshold. On a 944 with default watchdog, this is 200 ms. If the migration has introduced a periodic-interrupt OB that didn't exist in STEP 5, BS 16 is the quickest way to detect it.
3. OB13 firing-rate check. Toggle a marker bit inside OB13, and confirm in OB1 that the marker's transition rate matches the value previously stored in RS 97 (× 10 ms). A mismatch of one tick indicates that the new value has not been applied because the CPU did not see a RESTART.
4. Stop cause drill. Force a stop (e.g. unplug an I/O module) and read BS 4 / BS 5. The stop cause should be the expected one. If BS 4 still reads the previous stop cause, the firmware has not re-sampled since the previous stop — exercise the CPU with a fresh COLD RESTART.
5. Retentivity sanity check. Power-cycle the CPU and read the timer / counter area. The values should match the retentivity bits set in RS 120. Mismatches almost always trace to bit 0 / bit 1 of RS 120 being left at default.

Frequently Asked Questions