S7-1200 CPU 1215C Sizing for Mixed I/O and V20 VFDs

1. System Requirements Overview

This reference evaluates a control architecture for a pilot-plant application with the following field-level signal and device count:

Total I/O: 56 analog channels (including TC) + 65 digital channels. The primary engineering question is whether a single S7-1200 CPU 1215C can absorb the I/O directly via Signal Modules (SM) and Signal Boards (SB), or whether a distributed I/O topology (ET 200SP) is the more robust answer. This article works through the CPU budget, module selection, V20 drive wiring (USS vs. analog), and the ET 200SP alternative.

2. S7-1200 CPU 1215C Capability Assessment

The CPU 1215C is the highest-performance model in the S7-1200 range. Two firmware generations are typically encountered in the field:

Key specifications that bound the architecture decision:

• Onboard I/O: 14 DI 24 V DC, 10 DO (transistor or relay), 2 AI 0-10 V, 2 AO 0-20 mA.
• Maximum SM count: 8 Signal Modules on the right-side bus (CPU 1215C and 1217C).
• Maximum SB count: 1 Signal Board in the top socket.
• Communication ports: 1 PROFINET (PN) interface with 2-port switch, 1 serial RS485/232 for USS / Modbus RTU, optional CM 1241 for additional RS232/422/485.
• Bit memory: 8 KB retainable M, 16 KB total M area.
• Work memory (load/retain, varies by FW): 125 KB code / 4 MB data (V4.6+).
• PROFINET devices: Up to 16 PN devices as PROFINET IO controller.
• Number of USS slaves: Up to 16 on a single CM 1241 (RS485) per port, in practice the V20 manual recommends 1 master per RS485 segment with the address range 1-31.

Data-sheet source: CPU 1215C technical data (Siemens Industry Online Support).

3. Signal Module Selection and Signal Budget

The 18 AI, 11 TC, 16 AO, 45 DO, 20 DI requirements must be allocated to SM, SB, and onboard channels. The most common module families for S7-1200 are:

3.1 One-CPU signal budget with SM only

The CPU 1215C accepts 8 SMs. A minimum-fit allocation:

This still leaves 21 DO uncovered (45 required - 24 covered). Add a ninth slot:

• SM 1222 DQ 16 RLY: 16 DO

Total DO = 24 + 16 = 40 (still 5 short). The 8-slot SM ceiling of the CPU 1215C is the hard limit. Reaching 45 DO therefore requires an additional relay bank (e.g. Phoenix Contact PLC-OSC relay splitter on the SM 1222 outputs) or a second tier of distributed I/O. The 8-slot ceiling is documented in the S7-1200 System Manual (function manual entries for "Max. number of SMs per CPU").

4. Thermocouple Input Module Considerations

Type K thermocouples require cold-junction compensation (CJC) and a resolution of at least 0.1 K to be useful. The two viable choices on the S7-1200 are:

• SM 1231 TC 8x (6ES7231-5QF32-0XB0): 8 channels, internal CJC, supports types J, K, T, E, N, R, S, voltage ±80 mV. Resolution ≈ 0.1 °C/10 nV.
• SB 1231 TC 4x (6ES7231-5QD32-0XB0): 4 channels, Signal Board form factor, internal CJC.

For 11 channels, use one 8-channel SM and one 4-channel SB. The SB occupies the top slot of the CPU and does not consume an SM position.

Wiring best practices for thermocouples on the S7-1200:

1. Use shielded compensation cable, do not run alongside VFD output cables (minimum 200 mm parallel separation).
2. Bond the shield at the cabinet entry gland only, never at both ends.
3. Use a thermocouple terminal block (e.g. 6ES7291-3AX20-0XA0 cold-junction compensation terminal if remote CJC is required).
4. Configure the channel for type K, 0.0 °C to 1370.0 °C, internal CJC enabled, smoothing set to 4 or 8 scans to reject mains-coupled noise.
5. For long cable runs, use a TC repeater or accept the engineering loss of copper-junction transition at the terminal block.

5. SINAMICS V20 Drive Integration: USS vs. Analog

The SINAMICS V20 supports two mainstream control paths from an S7-1200:

5.1 Analog reference (0-10 V or 4-20 mA) + digital start/stop

• Wiring: 1 analog output channel per V20 to terminal 3 (AIN1) and 4 (GND); 1 digital output to terminal 5 (DI1, run enable) or 1 (DIN1) depending on macro.
• Wiring alternative: use the macro "Conn-2-wire control with analog input", giving 0-10 V speed reference and a digital run signal.
• Pros: deterministic, no protocol stack, immune to single-node RS485 fault.
• Cons: 1 AO per drive, 1 DO for start. With 8 drives, this matches the 8 AO and 8 DO used for drives in the original specification.

5.2 USS (Universal Serial Interface) protocol on RS485

• Wiring: single twisted pair on terminal 14 (P+) and 15 (N-) of each V20, daisy-chained, terminated at the two ends with 120 Ω.
• Each V20 must be assigned a unique USS address (parameter P2014, range 1-31).
• Baud: max 19 200 bit/s on V20; default 9 600 bit/s.
• On the S7-1200, the USS library (USS_Port_Scan / USS_Drive_Control function blocks) is supplied in TIA Portal under "Libraries > Communication > USS".
• Limit: one CM 1241 RS485 module supports 16 V20 slaves in theory; in practice a single bus should be limited to 8-10 drives to keep round-trip latency below 200 ms at 9 600 bit/s.

For 200 ms cycle latency across 8 VFDs, the calculation is:

T_frame ≈ N_drives × (bytes_per_telegram × 11 / baud_rate) = 8 × (32 × 11 / 9 600) = 8 × 36.7 ms ≈ 294 ms

That exceeds the 200 ms budget at 9 600 bit/s. The solutions are:

1. Raise baud to 19 200 bit/s: T_frame ≈ 147 ms, just within budget.
2. Reduce telegram length: use PKE/IND/PWE minimal read only, skipping parameter read-backs, ~ 14 bytes per slave ≈ 80 ms round trip at 19 200.
3. Use PROFINET via V20 with the PN variant (6SL3210-5BE2x-xUV0 + SINAMICS V20 PN option) to keep the VFD on PROFINET with deterministic update of 4-8 ms.

For a pilot plant with setpoint changes only once per test (one test ≈ 1 hour), analog wiring is the most robust path. The 200 ms USS cycle target is a stress case, not a hard requirement of the application as described.

6. Distributed I/O Architecture with ET 200SP

The discussion in the source thread recommends replacing the S7-1200 pair with a CPU 1510SP-1 PN (6ES7510-1DJ01-0AB0) backed by ET 200SP head modules. This is a significant architectural improvement when the I/O and PROFINET count climbs into the range described.

With CPU 1510SP-1 PN, the I/O can be split as follows:

• 1 × IM 155-6 PN ST (6ES7155-6AA01-0BN0) as the head module
• 8 × AI 8xRTD/TC modules (6ES7134-6JF00-0CA1) for TC and 4-wire RTD
• 3 × AI 8xU/I/RTD/TC (6ES7134-6HD00-0CA1) for process AI
• 4 × AQ 8xU/I HS (6ES7135-6HB00-0CA1) for VFD setpoints and valve references
• 3 × DI 16 (6ES7131-6BH00-0BA1)
• 3 × DQ 16 (6ES7132-6BH00-0BA1)
• 1 × server module (6ES7193-6PA00-0AA0) and BU type identification

Total: ~22 ET 200SP modules on a single station, well within the 64-module limit. The I/O is then distributed in the field via PROFINET, with typical update times of 1-4 ms. This replaces the 8-SM local-bus ceiling of the S7-1200 with a 64-module distributed station.

Reference: ET 200SP System Manual on Siemens Industry Online Support.

7. HMI and SCADA Integration over PROFINET

Both the S7-1200 and the CPU 1510SP-1 PN connect to the SIMATIC HMI and the SCADA PC over PROFINET. Typical configuration:

• SIMATIC HMI: Comfort Panel 6AV2 124 (e.g. KTP1200 Comfort 6AV2 124-1MC01-0AX0) or Basic Panel KTP400. Comfort panels connect via PN; basic panels connect via PN for the V13+ firmware generation.
• SCADA PC: WinCC Runtime Professional, running on a Siemens or third-party IPC, communicates with the PLC via PN. For third-party SCADA, expose the PLC tags via OPC UA server (built-in to S7-1500; S7-1200 requires firmware V4.5+ for OPC UA server with up to 250 tags).

Sample TIA Portal configuration for OPC UA on S7-1200 (firmware V4.6+):

1. CPU properties → "OPC UA Server" → enable the server.
2. Set the server port (default 4840) and authentication mode.
3. Define the publishable tag list in the "OPC UA Server interface" editor.
4. Add an S7-1200 OPC UA client or third-party client (e.g. Ignition, WinCC) on the PC.

For a CPU 1510SP-1 PN, OPC UA server is native to the firmware (V2.9+) and supports up to 5 000 publishable tag items in the basic S7-1500 OPC UA configuration, with extensions available via the S7-1500 OPC UA option.

8. TIA Portal Version and Firmware Compatibility

Reference: Compatibility Tool — S7-1200 to TIA Portal versions.

9. PLC Scan Time and Cycle Budget Calculation

The S7-1200 CPU 1215C executes the OB1 cycle in roughly 0.1 µs per bit instruction, but analog and PROFINET IO update times dominate at high I/O counts. Empirical guidance from Siemens application notes:

• 8 SMs with 64 analog channels total: ~3-5 ms I/O update contribution.
• PROFINET update of 16 PN devices at 1 ms update time: ~2 ms.
• USS scan over 8 drives at 9 600 bit/s: ~50-300 ms, depending on the telegram length.
• User program with 50 KB of structured code: ~5-15 ms.

Recommended OB1 cycle ceiling: < 50 ms for process response; < 200 ms for setpoint-only update (as in this pilot plant). The USS pathway consumes nearly all the budget at 9 600 bit/s; the analog pathway keeps the cycle clean.

10. Installation and Wiring Guidelines

The S7-1200 CPU and signal modules are installed on a standard 35 mm DIN rail or a panel mount. Clearances:

• Top: 25 mm for ventilation, signal board access.
• Bottom: 25 mm for wiring duct and stress relief.
• Side: 0 mm between CPUs, but allow 1 module width of clear space at each end of the rail.

Wire gauges for the S7-1200 and ET 200SP base units:

Reference: Guidelines for installing S7-1200 devices from the SIMATIC S7-1200 Manual Collection.

11. Commissioning Verification Checklist

1. Power-on the CPU without the I/O modules. Confirm the LEDs: PWR (green), RUN (green) after a few seconds. MAINT (yellow) is acceptable if no project is loaded.
2. Install one SM at a time; check the CPU detects it in the online > diagnostic buffer.
3. Load the project from TIA Portal. Use "Extended download to device" with PG/PC interface = PN interface of the CPU.
4. Watch the diagnostic buffer for module insertion events and any "Module not parameterized" errors. Correct slot configuration if the slot index is wrong.
5. Wire one TC input. Use the "Watch table" to monitor the AIW address. Confirm a sensible temperature reading with the type-K compensation active.
6. Test one analog output by setting a constant value in the program and verifying voltage/current at the channel with a multimeter.
7. Connect a single V20, test the AO + DO run command. Verify the motor runs, the V20 output frequency matches the setpoint, and the current draw is within nameplate range.
8. Expand to the full 8 V20s only after step 7 is successful.
9. Run the SCADA connection, browse the tag list, and confirm scan latency of < 1 s.
10. Document the OB1 cycle time, the I/O update time, and the PROFINET port statistics. File these in the project commissioning record.

12. Troubleshooting Matrix

13. Practical Recommendations

• For a pilot plant with low-bandwidth setpoint changes and < 100 analog channels total: a single CPU 1215C with 8 SMs, analog wiring to the V20 drives, is the most cost-effective path. Budget 2-3 cabinet-side spare slots for future expansion.
• For 100+ analog channels, 8+ VFDs, and SCADA integration: switch to CPU 1510SP-1 PN with ET 200SP. The price gap between one S7-1500-class CPU and two S7-1200 CPUs is small (often < 15 %), and the engineering time saving in one project is significant.
• For V20 control: use analog + digital for the pilot plant, and reserve USS for cases where the parameter set must be uploaded/downloaded frequently (recipe management) or where a single V20 must be parameterized dynamically.
• For diagnostics: enable the diagnostic buffer (online > diagnostic buffer) on the CPU and connect the diagnostic events into the SCADA alarm log.

14. Frequently Asked Questions