1. Overview
Replacing or substituting a Siemens SIMATIC S7-300 CPU 315-2 PN/DP is rarely a drop-in operation even when the new module shares the same MLFB family. The 6ES7 315-2EH14-0AB0 (Firmware V3.2) and the predecessor 6ES7 315-2EH13-0AB0 (Firmware V2.5) are physically the same catalog branch, but their integrated work memory, integrated load memory, supported instruction set, and PROFINET IO controller behavior differ in ways that determine whether a compiled S7 program can be downloaded, started, and retained after a power cycle. This reference walks through the exact compatibility verification that must be performed when migrating a STEP 7 (SIMATIC Manager or TIA Portal) project from the newer 2EH14 to the older 2EH13.
The analysis is based on the memory footprint reported by STEP 7 for a representative program:
- Load memory required: 321,242 bytes (~314 KB)
- Work memory (integrated RAM) used: 183,418 bytes (~179 KB)
- Data portion: 41,798 bytes
- Total work memory reservation reported: 225,216 bytes (~220 KB)
- Code (MC7) size: 62,660 bytes (~61 KB)
Every figure must be checked against the target CPU's datasheet values, not against the source CPU's values, because a program that fits in the 2EH14 may overflow the 2EH13 if the older device has the same or smaller memory budget.
2. CPU Identification and MLFB Decoding
Both CPUs belong to the SIMATIC S7-300 family and are cataloged under the order number prefix 6ES7 315-2EHxx-0AB0. The Siemens MLFB scheme encodes the functional scope, the interface combination, and the firmware/hardware release:
| MLFB Segment | Meaning | 2EH13-0AB0 | 2EH14-0AB0 |
|---|---|---|---|
6ES7 315 |
S7-300, CPU class 315 | Yes | Yes |
2 |
2 integrated interfaces (MPI/DP + PN) | Yes | Yes |
EH |
Interface combination: MPI/DP + PROFINET 2-port switch | Yes | Yes |
13 vs 14
|
Hardware/firmware release index | Release 13 | Release 14 (newer) |
0AB0 |
Region/EU packaging, no special features | Yes | Yes |
Cross-reference the catalog and data sheet entries at the Siemens Product Support entry for CPU 315-2 PN/DP (6ES7315-2EH14-0AB0) and the corresponding predecessor datasheet 6ES7315-2EH13-0AB0 before quoting a value to a customer or to procurement. The two parts share the same housing, the same backplane pinout, and the same MMC slot, so the replacement is mechanically trivial; the question is purely firmware and memory.
3. S7-300 Memory Architecture
STEP 7 reports three distinct memory regions that all matter when a project is downloaded:
| Region | Backing Store | Volatile? | Populated By | Used For |
|---|---|---|---|---|
| Load memory | Micro Memory Card (MMC), no integrated RAM on F-CPU 315-2 | No (when MMC is present and write-protected after download) | Project blocks, comments, symbols, SDBs, system data | Total program size; the MMC must be sized for this value |
| Work memory (code) | Integrated RAM | Yes (must be loaded from MMC at startup) | MC7 code of OB / FB / FC / DB blocks | Compiled executable code; counted in bytes |
| Work memory (data) | Integrated RAM | Yes | DB contents, local stack, bit memory, timers, counters | Runtime data including retentive and non-retentive areas |
The "Work memory" line in the online/offline path (accessible via PLC → Module Information → Memory in SIMATIC Manager or via Online & Diagnostics → Memory in TIA Portal) is the single value that decides whether the CPU will accept the program at download. The 183,418-byte figure reported by the source project is the relevant number, with the 225,216-byte total representing a slightly different reading of integrated work memory reservation including stack and SDB shadowing on some firmware versions.
4. Memory Specifications Comparison
The two CPU order numbers must be compared in three columns: integrated work memory, integrated load memory (if any), and the largest MMC accepted. The numbers below are reproduced from the Siemens S7-300 module data manual and from the product support pages; engineers must confirm the firmware-specific sub-revision they have on the shelf, because Siemens occasionally revises work memory upward within a release.
| Specification | 6ES7315-2EH13-0AB0 (FW V2.5) | 6ES7315-2EH14-0AB0 (FW V3.2) | Effect on the 321 KB Project |
|---|---|---|---|
| Integrated work memory (code + data) | 256 KB (262,144 bytes) | 256 KB (262,144 bytes) - typical, verify per shipped FW | Both CPUs accept 225,216 bytes (within budget; ~14% free) |
| Integrated load memory (RAM) | None - MMC required for operation | None - MMC required for operation | Project must reside on a separate MMC on both CPUs |
| Maximum MMC size accepted | 8 MB (verify against the FW you own) | 8 MB (some FW levels accept up to 32 MB; verify) | 321,242 byte project fits an 8 MB MMC on both |
| Bit memory (M) | 2,048 bytes | 2,048 bytes | No change required |
| S7 timers / counters | 256 / 256 | 256 / 256 | No change required |
| DB count and size | 1,023 DBs, DBs up to 16 KB each (depending on FW) | 1,023 DBs, DBs up to 16 KB each (depending on FW) | No DB-count risk for typical projects |
| OB priority classes | OB 1, 10-17, 20-23, 30-38, 40, 80-87, 100, 121-122 | Same set, plus additional diagnostic OBs in V3.x | Same OB usage; no recompile required if OBs are unchanged |
| PROFINET IO controller | Supported, limited to 64 IO devices (verify) | Supported, up to 128 IO devices on some FW V3.2 builds | Project must use <= the 2EH13 limit if it relies on the larger number |
The exact work memory figure for any individual module can be read on the CPU front panel under the Information / Memory menu, or pulled from the module's MLFB / serial number sticker. Do not rely on the catalog "typical" value alone when the difference between success and rejection of a download is a few kilobytes.
5. Compatibility Analysis for the Reference Project
Applying the figures from the user's STEP 7 memory report to the table above:
- Work memory check. 183,418 bytes (the integrated-RAM reading) is well below 262,144 bytes (256 KB), and 225,216 bytes is also below 262,144 bytes. Both target and source CPUs accept the program at the work-memory layer. The headroom is roughly 14% in the worst-case reading and 30% in the best-case reading.
- Load memory check. 321,242 bytes is approximately 314 KB, smaller than the smallest MMC that Siemens ships for the S7-300 (typically 64 KB up to 8 MB; 32 MB on some FW). An 8 MB MMC is the recommended safety stock for both CPUs.
- Code size check. 62,660 bytes of MC7 code is a small fraction of either CPU's code budget and is not a limiting factor.
- Data block count and average DB size. Not reported by the user, but with 41,798 bytes of DB data and typical 1,023-DB ceiling, the project is far from a DB-count or DB-size limit on either CPU.
- Firmware instruction support. The OP codes added in firmware V3.x (additional PROFINET diagnostics, expanded Web server functions, partial IPv6 support on some builds) are additive; downloading a V2.5-compiled project to a V2.5 CPU is by definition supported. The reverse direction (V3.2 compiled for V2.5) is the riskier case but does not apply here - the user's source is the V3.2 CPU and the target is the V2.5 CPU, so the project must be compiled to firmware V2.5 to avoid the "You have used instructions not supported in the target firmware" error at download.
Conclusion for this project: the program fits the 2EH13-0AB0 in all three memory dimensions. The replacement is feasible provided the project is recompiled against the target firmware.
6. Firmware Version Differences and Recompile Requirement
The 2EH14 ships with firmware V3.2; the 2EH13 with firmware V2.5. STEP 7 ties the block container to the firmware version, so a project compiled for V3.2 will normally refuse to download to a V2.5 CPU with diagnostic buffer entries such as:
-
0xE0FF- "Online: cannot download to module" -
0x01FF- "Internal error: download aborted" -
0x0E1F- "Firmware on the target does not match the project's expected firmware"
To move the project cleanly, follow this three-step rule:
- Open HW Config, double-click the CPU slot, and change the order number from
6ES7 315-2EH14-0AB0to6ES7 315-2EH13-0AB0, version V2.5. - Save and recompile (Station → Save and Compile or Project → Compile in TIA Portal).
- Re-check the memory report (PLC → Module Information → Memory for the offline view, or Right-click CPU → Properties → Memory in TIA Portal) before download.
SFB 104 (IP_Config) or PROFINET diagnostics SFCs that were introduced in V3.x, recompilation to V2.5 will fail or produce stub calls that return 0x0001 at runtime. Replace the offending blocks with their V2.5 counterparts before download.7. Step-by-Step Verification in SIMATIC Manager
The following procedure is the offline verification path that the SIMATIC Manager / STEP 7 V5.6 user can execute without physical hardware. It mirrors what the project does at download and what S7-PLCSIM simulates when used as a stand-in for the missing CPU.
- Open the project in SIMATIC Manager and double-click SIMATIC 300 Station → Hardware.
- In HW Config, right-click the CPU slot and select Object Properties.
- Change the order number to the target MLFB, e.g.
6ES7 315-2EH13-0AB0, and confirm with V2.5. - Save and compile the station. Watch the Compile Output window for warnings such as "Block FBxxx: used instruction not available in target firmware".
- Open PLC → Module Information while the project is offline; the Memory tab will show the work memory and load memory required for the current configuration.
- Compare the figures with the 2EH13 datasheet; if the work memory required is greater than 262,144 bytes, the download will be rejected.
- Install the S7-PLCSIM V5.4 SP5 (or newer) add-on and start a simulation of the 2EH13. Download the project to the simulated instance.
- Observe the diagnostic buffer after a STOP-to-RUN transition; the absence of
0x0E1Fand0xE0FFevents confirms the program runs on the older firmware.
8. Step-by-Step Verification in TIA Portal
If the project is maintained in TIA Portal V16 or newer, the verification path is shorter:
- Open the project and select Project Tree → Devices & Networks.
- Double-click the CPU; in Device View select the Properties → General tab.
- In the Catalog pane, navigate to SIMATIC S7-300 → CPU → CPU 315-2 PN/DP and drag the 2EH13 variant over the existing CPU; accept the device swap.
- Compile the project (Compile → Software (rebuild all)). TIA Portal will list every block that is incompatible with the target firmware.
- Open the CPU's Properties → Memory tab to view the calculated work and load memory footprint.
- If the values are within budget, download to a physical 2EH13 or to S7-PLCSIM V16+.
9. MMC and Load Memory Sizing
For a project with 321,242 bytes of load memory, the smallest MMC that fits the project and leaves headroom for diagnostic buffers, SDBs, and the SIMATIC Logon or recipe stubs (if used) is a 2 MB MMC. The 8 MB MMC is the de-facto spare part to keep on the shop floor. When ordering, use the following order numbers:
| Capacity | MLFB | Application Note |
|---|---|---|
| 2 MB | 6ES7 953-8LL20-0AA0 | Minimum headroom, suitable for the 321 KB project |
| 4 MB | 6ES7 953-8LM20-0AA0 | Comfortable; allows additional language comments and recipe DBs |
| 8 MB | 6ES7 953-8LP20-0AA0 | Recommended spare for S7-300 fleet |
Insert the MMC before power-up; the CPU 315-2 PN/DP will not retain a project through power-down without one. After download, set the MMC's write protection if the project is final and you want to protect it from accidental overwrites on the next download.
10. Edge Cases and Common Pitfalls
10.1 Bit Memory and S7 Timers Beyond the Limit
STEP 7 will allow configuration of more than 2,048 bytes of M or 256 S7 timers, but the excess is silently truncated at download. Always verify in the CPU's Properties → Memory tab that the configured values match the hardware ceiling.
10.2 OB 80 / OB 121 / OB 122 Time-Error and Programming-Error Handlers
If the V3.2 project uses OB 80, OB 121, or OB 122 to mask a recoverable error that V2.5 would treat as a hard stop, the new CPU will surface a different fault code. Test every error path on the 2EH13 in PLCSIM or on a bench unit before commissioning.
10.3 PROFINET Device Count and IRT
The 2EH14 supports a higher count of PROFINET IO devices and IRT. A V3.2 project compiled for IRT mode will fall back to RT at download to a V2.5 CPU, which can break isochronous applications. Re-design the network as RT-only if the target is the 2EH13.
10.4 Retentive Areas
Retentive M, retentive DB, and retentive timer/counter settings are stored in the MMC but the runtime backup is in the integrated work memory. With identical retentive configuration on both CPUs there is no change; with divergent settings, the 2EH13 will use the values compiled for the 2EH14 target, which can lead to unexpected re-initialization of the process image on the first restart.
10.5 Diagnostic Buffer Capacity
The 2EH13 has a smaller diagnostic buffer than the 2EH14. Events that the V3.2 CPU retained for forensic review may roll off the buffer on the V2.5 CPU. Plan for a faster dump of the diagnostic buffer (e.g. PLC → Save Service Data) when the project is running on the older hardware.
10.6 CP / FM / SM Module Compatibility
The signal modules (SM 321/322/331/332), function modules (FM 350/351/352), and communication processors (CP 340/341/342/343) listed in the V3.2 project hardware configuration are still compatible with the V2.5 CPU, but the GSD files referenced for the PROFINET IO devices must be re-imported if the IO device count drops below the V2.5 limit.
11. Field Commissioning Checklist
| Step | Action | Acceptance Criterion |
|---|---|---|
| 1 | Verify the target CPU's MLFB and firmware sticker | Reads 6ES7 315-2EH13-0AB0 / V2.5 on the front panel |
| 2 | Insert a clean MMC of ≥ 2 MB | CPU powers up in RUN with a valid project already on the card |
| 3 | Recompile the project to the V2.5 target | Compile ends with zero warnings related to instruction set |
| 4 | Download the project, online → STOP → RUN | Diagnostic buffer free of 0x0E1F and 0xE0FF events |
| 5 | Read PLC → Module Information → Memory | Work memory used ≤ 262,144 bytes; load memory used ≤ MMC size |
| 6 | Cycle OB 1; check scan time | Scan time within the same order of magnitude as the V3.2 baseline |
| 7 | Power-cycle the cabinet | CPU returns to RUN with all retentive data preserved |
| 8 | Pull and re-insert the MMC | CPU goes to STOP with diagnostic "No memory card inserted"; re-inserting returns the project |
12. Frequently Asked Questions
Can I download a STEP 7 program from a CPU 315-2EH14-0AB0 (V3.2) to a CPU 315-2EH13-0AB0 (V2.5) without recompiling?
No. The block container is tagged with the firmware version at compile time; a V3.2-compiled project is rejected by a V2.5 CPU with diagnostic events 0x0E1F or 0xE0FF. Open HW Config, change the CPU order number to the V2.5 2EH13, save, and recompile before download.
Is 256 KB of integrated work memory enough for a project that uses 183,418 bytes?
Yes. 183,418 bytes is approximately 179 KB, well below the 262,144-byte (256 KB) ceiling. A margin of at least 10% is recommended to leave room for runtime stacks; the user's project sits at roughly 70% utilization, which is acceptable. If the 225,216-byte total is the relevant reading, the project still fits at 86% utilization.
What MMC size do I need for a 321,242-byte project?
A 2 MB MMC (6ES7 953-8LL20-0AA0) is the smallest that comfortably fits 321 KB plus SDBs and diagnostic data. An 8 MB MMC (6ES7 953-8LP20-0AA0) is the recommended spare-part size for any S7-300 fleet.
Does the 2EH13 support PROFINET IRT the same way the 2EH14 does?
No. PROFINET IRT is a V3.x feature on most S7-300 CPU 315-2 PN/DP variants. The 2EH13 supports PROFINET RT only. If the source project uses IRT isochronous mode, the application must be re-engineered to RT or to PROFIBUS DP before it will run on the 2EH13.
How can I verify compatibility without owning a physical 2EH13?
Use S7-PLCSIM V5.4 SP5 (for SIMATIC Manager) or PLCSIM V16+ (for TIA Portal) to emulate the 2EH13 firmware. Compile the project to that target, download to the simulation, and inspect the diagnostic buffer. PLCSIM emulates the same memory ceilings, the same instruction set, and the same diagnostic codes as the physical CPU.