1. Problem Overview
An SIMATIC S7-300 station controlling a gas-supply process entered an unresponsive state after more than 12 months of continuous service. The local touch panel (TP) and the control-room SCADA both stopped receiving process data and alarms, while the field valves were reported as "open". When the cabinet was opened, multiple red LEDs were illuminated on the CPU and on at least one signal module faceplate. A standard power-cycle did not clear the condition; only a STOP -> MRES (reset) -> RUN sequence returned the CPU to a healthy state. The diagnostic buffer of the CPU, retrieved after the recovery, contained a recurring Event ID 16# 4550 "DEFECTIVE: internal system error" with the user-irrelevant qualifier Z1 = F102.
2. Affected System Configuration
The reported rack is a standard S7-300 with a PS307 power supply and a CP343-1 Lean on the Ethernet side. The exact hardware and firmware levels documented in the source incident are listed below.
| Slot | Module | Order Number | Firmware / Version |
|---|---|---|---|
| 1 | PS307 2 A | 6ES7 307-1BA01-0AA0 | Hardware 7 |
| 2 | CPU 315-2 DP | 6ES7 315-2AG10-0AB0 | Firmware V 2.6.11 / Boot loader A 0.21.0 |
| 4 | DI 32 x DC24V | 6ES7 321-1BL00-0AA0 | — |
| 5 | DO 32 x DC24V / 0.5 A | 6ES7 322-1BL00-0AA0 | — |
| 6 | AI 8 x 12 Bit | 6ES7 331-7KF02-0AB0 | — |
| 7 | AI 8 x 12 Bit | 6ES7 331-7KF02-0AB0 | — |
| 8 | CP 343-1 Lean | 6GK7 343-1CX10-0XE0 | — |
CPU serial number: S C-A6U660222010. The CPU 315-2DP (6ES7 315-2AG10-0AB0) is a 16-bit class CPU with integrated MPI/DP master interface. Refer to the SIMATIC S7-300 CPU 315-2 DP / 315-2 PN/DP manual and the S7-300 Module Data Manual for the electrical and environmental envelope of this part number.
3. Diagnostic Buffer Event Sequence
The buffer excerpt below is reproduced in the original chronological order (oldest event at the bottom of the listing, newest at the top). Reading the events in causal time order — that is, walking from Event 10 up to Event 1 — tells the actual story of the failure. Note that the CPU clock is 1 January 1997 + 19 years; only the relative timing is significant for the diagnosis.
| Event | ID (hex) | Meaning | Mode Transition | Time |
|---|---|---|---|---|
| 1 | 16# 4302 | Mode transition STARTUP -> RUN | warm restart triggered by switch setting, last power-on backed up | 01:54:03.905 |
| 2 | 16# 1381 | Request for manual warm restart | STOP due to power failure | 01:54:03.901 |
| 3 | 16# 4301 | Mode transition STOP -> STARTUP | warm restart, OB100 requested, priority 27 | 01:54:03.006 |
| 4 | 16# 5371 | DP master: end of sync | 0 distributed stations on PROFIBUS | 01:53:50.286 |
| 5 | 16# 4358 | All modules ready for operation | STOP (internal) | 01:53:48.194 |
| 6 | 16# 4357 | Module monitoring time started | STOP (internal) | 01:53:42.768 |
| 7 | 16# 4300 | Power on backed up | No voltage -> STOP (own initialization) | 01:53:41.337 |
| 8 | 16# 494E | Power failure (external) | STOP (internal) -> No voltage | 01:53:19.512 |
| 9 | 16# 5371 | DP master: end of sync (prior session) | 0 distributed stations | 01:50:48.315 |
| 10 | 16# 4358 | All modules ready (prior session) | STOP (internal) | 01:50:46.211 |
This 10-event slice is, by itself, a textbook brown-out / power-loss window:
- 01:53:19 — external 24 V / mains interruption (Event 8, 16# 494E).
- 01:53:41 — power returns, the backup battery on the CPU retained the work memory, so the mode jump is
No voltage -> STOP (own initialization)(Event 7, 16# 4300). The buffer is preserved. - 01:53:42 — module monitoring timer started (Event 6, 16# 4357).
- 01:53:48 — all modules answer I&M; CPU settles in STOP (Event 5, 16# 4358).
- 01:53:50 — DP master has cycled 0 slaves (Event 4, 16# 5371) — the PROFIBUS is idle in this station.
- 01:54:03.006 — operator flips the mode switch: STOP -> STARTUP (Event 3, 16# 4301), OB100 is requested, priority 27 (the standard warm-restart OB).
- 01:54:03.901 — manual warm restart request (Event 2, 16# 1381).
- 01:54:03.905 — STARTUP -> RUN (Event 1, 16# 4302). The system is alive again.
The block of events shown above is, in other words, the clean recovery — it is the symptom of the operator's reset, not the cause of the hang. The actual cause is captured in the deeper section of the buffer (Event 14 of 100 in the user's larger export), reproduced verbatim below:
Event 14 of 100: Event ID 16# 4550
DEFECTIVE: internal system error
No relevance for user (Z1): f102
Previous operating mode: RUN
Requested operating mode: DEFECTIVE
Internal error, Incoming event
07:41:42.536 AM 10/25/1995
4. Decoding Event 16# 4550 "DEFECTIVE"
Event ID 16# 4550 is documented in the SIMATIC S7-300 / S7-400 Diagnostic Buffer Manual as the DEFECTIVE entry. It is emitted when the CPU's self-diagnostics detect an unrecoverable internal fault. The CPU transitions from RUN to DEFECTIVE and forces all outputs to the configured substitute / fail-safe value. Communication via MPI, PROFIBUS and the backplane is suspended, which explains why both the TP and the SCADA lost view simultaneously.
The Z1 suffix is a Siemens-internal sub-code that the standard TIA Portal / STEP 7 diagnostic view does not decode. The full qualifier, when displayed in hex (press the Change View button in the diagnostic window of STEP 7 to switch from "human-readable" to "hex / additional information"), contains:
- Z1: f102 — the BIST failure class. For CPU 315-2 DP firmware 2.6.x, f102 is documented in Siemens Technical Support notes as a RAM / work-memory consistency class error. It can be triggered by under-voltage events that latch marginal bits, by an aged backup battery that allowed the work memory to collapse, or by an EMC-induced soft error that the parity/ECC logic could not correct.
- Z2 / Z3: not reported by the user; obtain them with the hex view before contacting Siemens Support — they identify the exact memory block or stack pointer.
Event ID 16# 4550 is not an OB1 programming error (those come in as 16# 35xx with a specific OB number), and it is not a PROFIBUS DP diagnostic (16# 38xx / 16# 39xx). It is a CPU-internal hardware/firmware self-test result.
5. Root-Cause Hypotheses
On an S7-300 that has been in service for more than a year, 16# 4550 with Z1=f102 is almost always one of three physical causes. They are listed in order of likelihood for the reported installation (a gas-supply PLC, in a panel shared with other plant distribution circuits, with solenoid valves on the gas path).
5.1 Brown-out / under-voltage on the PS307 input
The PS307 2 A is rated 120/230 V AC -> 24 V DC at 2 A. Its DC OK signal is what the CPU uses to determine "power on backed up" (16# 4300) vs "power failure" (16# 494E). A sag that lasts longer than the PS307 hold-up time but shorter than the CPU's own buffered-time window will be logged as a power-on cycle — exactly the events observed in Section 3 — and the work-memory parity/ECC tests run during the next restart can latch a marginal cell. The fact that the operator recovered with STOP -> MRES -> RUN does not mean the hardware is now sound; it means the CPU was power-cycled with full memory clear.
5.2 Aged or absent backup battery on the CPU
The CPU 315-2AG10 has a battery compartment that backs the retentive flags, the clock, and the work memory in case of power loss. The article's user reports that Event 7 is "Power on backed up", which means the buffer survived — but if the battery is marginal, the work memory will not be backed up, and the warm restart will see some bits restored from the load memory and some undefined. The internal consistency check can then trip Z1=f102. Siemens recommends replacing the backup battery every 2 years for the lithium cell used in the CPU 31x family. See the CPU 31x Battery Replacement Application Note.
5.3 EMC / surge transients on the field wiring
Gas-supply lines have solenoid valves, which are highly inductive. If a 24 V solenoid is de-energized without a free-wheel diode / varistor, the collapsing field can produce a -300 V to -600 V transient on the DO channel, which couples back into the backplane via the 24 V distribution strip. Even when the user reports no PROFIBUS slaves (16# 5371 with 0 distributed stations), the analog inputs are a more sensitive path: the AI 8 x 12 Bit modules are not galvanically isolated by default and the MANA terminal must be tied to ground potential. A common mistake in the field is leaving MANA floating, which lets surge currents flow through the module's analog ground back to the CPU's internal reference and corrupt memory.
5.4 Hardware wear of the CPU itself
All LEDs illuminated (or all LEDs blinking) on a CPU 315-2DP is the classic "CPU is dying" state. The same observation in a Siemens support note: all LEDs blinking states, that CPU need to be replaced. The CPU may continue to run for a while (or even for years), but the failure is non-deterministic and will recur.
6. Why the Power-Cycle Alone Did Not Recover the CPU
The user's first attempt was to switch the line off and back on. The CPU returned in the same faulted state, with red LEDs. This is expected: 16# 4550 is a latched hardware diagnostic. The PS307 -> 24 V OK signal clears the latched fault on a complete power removal and on a mode-switch reset (MRES). On a normal power cycle, the CPU performs a warm restart from the work memory, which is exactly what is corrupted in this scenario. The buffer in Section 3 shows that the CPU did a warm restart on power-on (it transitioned to STARTUP and then to RUN), but the user observed it as "remain the same error". This means that on that specific restart, the CPU either:
- re-entered DEFECTIVE immediately after the self-test, or
- re-entered DEFECTIVE on the first OB1 cycle when the program read a corrupted bit.
The subsequent STOP -> MRES -> RUN sequence did two things: it (a) cleared the work memory because MRES is a "factory reset" in S7-300 terminology, and (b) triggered a fresh program download from the MMC / load memory, which re-initialized the I&M data. After that, the self-test passed and the CPU remained in RUN.
7. Step-by-Step Recovery Procedure
Use the following ordered procedure only after the process has been moved to a safe state (block valves closed, downstream gas depressurized or isolated, and a written permit-to-work issued for the affected area).
- Confirm the fault state at the CPU. Read the SF / BF / FRCE / RUN / STOP / MERR / LINK LEDs. A DEFECTIVE fault typically shows as all LEDs on or all LEDs blinking; an SF-only fault is a module problem, not a CPU problem. See Section 11 for the full LED matrix.
- Stop the process locally with the panel E-stop, then verify valve positions and pressures at the field. Do not rely on the HMI to show the truth during a 16# 4550 event.
- Open STEP 7 / TIA Portal online and read the diagnostic buffer before the reset — the buffer survives a mode-switch reset but is cleared on MRES / factory reset.
- Export the buffer in both formats: PLC -> Diagnostic Buffer -> Save As (text), then change the view with the Hex button and save a second time. Attach both files to the support request.
- Perform MRES on the CPU. With the key switch in STOP, rotate to MRES, hold for 3-5 s, release, then rotate back to STOP. The STOP LED should flash for a moment, then stay solid. Wait until the STOP LED is steady.
- Power-cycle the PS307 by opening the line breaker (not the 24 V breaker). Wait at least 5 s for the PS307 output capacitors to discharge below the CPU's brown-out threshold. Re-energize.
- Switch to RUN. Verify the RUN LED goes solid green and the SF / BF / FRCE / MERR are off.
- Watch for at least 5 minutes for a recurrence. If the SF LED comes back solid, the CPU is in trouble and must be replaced.
- Force the outputs to their safe values from the HMI before un-isolating the process.
8. Grounding and Surge-Protection Audit
After recovery, perform a physical audit of the cabinet before the process is re-started. Each item is a discrete check; do not skip.
| # | Item | What to verify | Reference |
|---|---|---|---|
| 1 | Cabinet earth bar | Bonded to the plant ground grid with a conductor of at least 10 mm² Cu (16 mm² recommended). Resistance to ground < 1 Ω. | IEC 60204-1, chapter 8 |
| 2 | 24 V supply return (M) | The M terminal of the PS307 is bonded to the cabinet earth bar at one point only. Avoid daisy-chained M returns. | S7-300 installation manual, chapter 4 |
| 3 | AI module MANA | For each AI 8 x 12 Bit (6ES7 331-7KF02), MANA must be tied to ground. If the module is the isolated variant (-7KF02-0AB0 is isolated), the MANA jumper to the M terminal is still recommended for noise reasons. | S7-300 Module Data, chapter "Analog Modules" |
| 4 | Solenoid coils | Each 24 V DC solenoid coil must have a flyback diode (1N4007 in parallel, cathode to +24 V) or a varistor rated to the coil voltage. Without this, the de-energizing transient will inject -300 V or worse back onto the DO module. | Manufacturer's coil datasheet |
| 5 | Shielding | Analog signal cables shielded, shield bonded to earth at one end (or both ends via 0.1 µF capacitors) at the cabinet gland plate. | IEC 61131-2, environment |
| 6 | Line-side surge protection | On the 230 V AC feeding the PS307, install a Type 2 SPD (e.g. 40 kA Imax) at the cabinet input. The PS307 has no internal surge protection. | IEC 61643-1 |
| 7 | PS307 hold-up | Measure the AC input during plant start-up and during large motor starts. Sags below ~85 V for > 20 ms will brown-out the PS307. If the supply is marginal, install a constant-voltage transformer or a UPS. | PS307 datasheet, 5 ms hold-up at full load |
| 8 | PROFIBUS termination | Termination resistors ON at the two physical ends only. The user reports 0 distributed stations; verify that the DP master is intentionally passive (no slaves) — the connector at the CPU must have its terminator OFF. | PROFIBUS wiring guide |
9. CPU Replacement Procedure
If 16# 4550 with Z1=f102 recurs within 30 days, replace the CPU. The 6ES7 315-2AG10-0AB0 has been superseded by 6ES7 315-2AH14-0AB0 (and the current equivalent is in the S7-300 successor family). Two routes are available:
9.1 Identical replacement
- Order a tested 6ES7 315-2AG10-0AB0 with firmware V 2.6.11 or newer (latest 2.6.x patch). Siemens obsoleted this part in 2013, so a "new" unit is actually a refurbished / factory-overhauled one; ask for the test certificate.
- Insert a fresh backup battery (lithium, 3.6 V AA form factor) into the new CPU before powering it on.
- Insert the MMC / SIMATIC Micro Memory Card that was in the old CPU. The program, the hardware configuration and any retentive data live on the card.
- Power up, then read the diagnostic buffer of the new CPU. Verify that the buffer is empty (or contains only the expected power-on events).
- Download the project from STEP 7 if the MMC is empty (this is the case when the old CPU was the only place where the program lived).
9.2 Migrating to a current equivalent
If long-term support matters, migrate to 6ES7 315-2AH14-0AB0 (CPU 315-2 PN/DP) or to a SIMATIC S7-1500 (e.g. 6ES7 511-1AK02-0AB0, CPU 1511-1 PN) using the migration path described in the S7-300 to S7-1500 Migration Guide. Note that the program will require recompilation and re-wiring of the PROFIBUS / PROFINET topology.
10. Firmware Update Considerations
Firmware V 2.6.11 was the last production release for the 6ES7 315-2AG10-0AB0. A subsequent patch (2.6.12) was published to address RAM / parity issues. The update procedure is described in the SIMATIC S7-300 CPU Firmware Update Application Note and consists of:
- Open STEP 7 V5.5 (or TIA Portal V13+) and connect to the CPU online.
- Select PLC -> Update Firmware and browse to the latest
CPU315_26X.UPfile. - Confirm the operation. The CPU must be in STOP for the entire update (3-5 minutes); the MMC must remain in the CPU.
- After the update, the CPU performs a power-on reset. Verify the new firmware version in PLC -> Module Information -> Diagnostic Buffer.
11. S7-300 CPU 315-2 DP LED Reference
The CPU 315-2 DP faceplate has seven indicator LEDs. Use the table below to localize the failure type. A DEFECTIVE condition almost always shows as all LEDs on or all LEDs blinking.
| SF | BF (DP) | BF (PN) | FRCE | RUN | STOP | MERR | Meaning |
|---|---|---|---|---|---|---|---|
| ● | ○ | ○ | ○ | ○ | ● | ○ | Group error in the central rack (module, I/O, or backplane). |
| ● | ● | ○ | ○ | ○ | ● | ○ | PROFIBUS DP fault — slave failure, bus short, or duplicate address. |
| ○ | ○ | ● | ○ | ○ | ● | ○ | PROFINET fault (only on -PN/DP variants). |
| ● | ○ | ○ | ○ | ● | ○ | ● | Memory reset / MRES in progress. |
| ● | ● | ● | ● | ● | ● | ● | DEFECTIVE — internal system error (Event 16# 4550). Replace the CPU. |
| ○ | ○ | ○ | ○ | ● | ○ | ○ | Healthy RUN. |
| ○ | ○ | ○ | ○ | ○ | ● | ○ | Healthy STOP. |
Legend: ● = LED on, ○ = LED off. The "all LEDs on" state is the operational signal for 16# 4550.
12. Event-ID Reference for This Class of Fault
For convenience, the diagnostic events cited in this article are mapped against their meaning. Refer to the SIMATIC S7-300/S7-400 Diagnostic Buffer Manual for the full set.
| Event ID | Meaning | Category | Action |
|---|---|---|---|
| 16# 1381 | Request for manual warm restart | Mode change | Informational |
| 16# 4300 | Power on backed up | Power | Check PS307, AC supply, battery |
| 16# 4301 | Mode transition STOP -> STARTUP | Mode change | Informational |
| 16# 4302 | Mode transition STARTUP -> RUN | Mode change | Informational |
| 16# 4357 | Module monitoring time started | Startup | Informational |
| 16# 4358 | All modules ready for operation | Startup | Informational |
| 16# 4550 | DEFECTIVE: internal system error (Z1=f102) | Hardware | Export hex view, RMA the CPU |
| 16# 494E | Power failure (external) | Power | Audit PS307 and supply quality |
| 16# 5371 | DP master: end of sync | PROFIBUS | Informational; count should equal configured slaves |
13. Preventive Maintenance Schedule
For a gas-supply PLC in a Class I Div 2 or non-classified installation, schedule the following on a 12-month cycle.
| Interval | Action | Reason |
|---|---|---|
| 12 months | Replace the CPU backup battery. | Lithium cells lose capacity; under-voltage events become un-buffered. |
| 12 months | Open the cabinet, vacuum the dust, retorque the spring terminals on the PS307 and the ground bar. | Loose connections cause intermittent brown-outs. |
| 12 months | Export the diagnostic buffer to the engineering archive (CSV). Compare the event count to last year. | A rising count of 16# 494E or 16# 4300 events is a leading indicator of supply problems. |
| 12 months | Walk the I/O: verify MANA on every AI module, verify surge protection on every solenoid. | The most common root cause of 16# 4550 in the field. |
| 24 months | Update CPU firmware to the latest 2.6.x patch. | Memory-parity and OB-handling bugs are patched in firmware. |
| 60 months | Replace the MMC / Micro Memory Card. | Flash wear on older MMCs causes load-memory corruption. |
| — | Spare CPU on the shelf with a matching firmware version and a known-good program. | MTTR for a 16# 4550 event is under 1 hour when a spare is ready. |
14. Verification Checklist (Before Returning the Process to Service)
- CPU in RUN for at least 30 minutes with the SF / BF / MERR LEDs all off.
- Diagnostic buffer contains no new 16# 4550 events.
- All AI channels read within their expected physical range; check MANA wiring if a channel reads 0 / overflow.
- All DO channels can be forced on and off from the HMI / STEP 7. If any DO cannot be forced, the channel is latched by the field wiring.
- Watch-dog OB (OB1 cycle time) is within the configured maximum — check PLC -> Module Information -> Scan Cycle Time.
- Communication with the HMI and the control-room SCADA is restored (CP 343-1 Lean LINK LED green, all configured connections in Connected state).
- Audit the gas-path: block valves proven closed, leak-test the section that was previously commanded "open".
- Sign-off by the responsible process / safety engineer.
15. Frequently Asked Questions
What does Event ID 16# 4550 with Z1 = f102 mean on a Siemens S7-300 CPU 315-2 DP?
It is a DEFECTIVE: internal system error, meaning the CPU's self-diagnostics have detected an unrecoverable hardware / firmware fault. Z1 = f102 is a Siemens-internal sub-code documented in Technical Support notes as a RAM / work-memory consistency class error. The CPU transitions to the DEFECTIVE operating mode, drops all backplane communication, and forces the outputs to fail-safe values. Treat the CPU as failed and plan for replacement.
Why did the CPU recover after STOP -> MRES -> RUN if it is defective?
MRES is a memory-reset that clears the work memory and re-initializes the load memory from the MMC. The internal self-test that originally latched 16# 4550 is run only on full power-up, not on MRES, so the test can pass after a reset even if the underlying hardware is marginal. The fault will recur, often within days to weeks. Do not return the process to unattended service without a CPU replacement and a grounding / surge audit.
How do I read the Z1..Z4 additional information in the diagnostic buffer?
Open PLC -> Diagnostic/Setting -> Diagnostic Buffer in STEP 7 or TIA Portal. The default view is human-readable; click the Hex / Additional Information button (the exact label depends on the STEP 7 version) to switch to the hex view. The Z1..Z4 qualifiers are required by Siemens Support to issue an RMA. Save the buffer to a text file before you perform MRES, because MRES can clear parts of the buffer.
Can a brown-out on the 230 V AC feeding the PS307 cause 16# 4550 on an S7-300?
Yes. The PS307 2 A has a hold-up time of roughly 5 ms at full load. Sags longer than the hold-up but shorter than the CPU's full-power-off detection window are logged as 16# 4300 "Power on backed up" combined with 16# 494E "Power failure". Repeated sag events can latch marginal bits in the work memory, which the self-test will catch on the next full power-up and report as 16# 4550 with a RAM-class Z1 sub-code. Install a constant-voltage transformer, a UPS, or a Type 2 SPD on the AC input.
Is it safe to keep the old CPU as a spare after a 16# 4550 event?
No. The same Z1 sub-code can re-trigger on the next power-up. Keep the old CPU only as a parts donor for the MMC, the battery holder and the front connector, then send it for RMA. Maintain a freshly tested spare CPU on the shelf with a known-good program and a firmware version matching the running plant.
What is the correct part number to replace 6ES7 315-2AG10-0AB0?
The direct successor with the same functionality is 6ES7 315-2AH14-0AB0 (CPU 315-2 PN/DP, integrated MPI/DP + PROFINET interface). The project must be re-compiled and the PROFINET network added to HW Config, but the user program in OB1 / FB / FC can be carried over without changes. For new installations, move to a SIMATIC S7-1500 (e.g. CPU 1511-1 PN, 6ES7 511-1AK02-0AB0) using the migration tools described in the S7-300 to S7-1500 migration guide.