S7-300 MMC Memory Reset Resolving Stop LED Flash on CPU 313C-2DP

Overview

The SIMATIC S7-300 CPU family (313C-2DP, 314, 315-2DP, 315-2PN/DP) uses a Micro Memory Card (MMC) as the non-volatile load memory for hardware configuration, program blocks, and system data. When the CPU detects an internal inconsistency between the MMC contents and its own boot expectations, it requests a memory reset by flashing the STOP LED at approximately 0.5 Hz. The operator's standard recovery path is the MRES position of the mode selector switch. When that path fails (the STOP LED returns to fast flashing instead of steady ON), the CPU is signaling either an MMC that was last programmed on a different CPU family, a corrupted FAT on the card, or a residual configuration that the switch sequence cannot clear in a single pass.

This reference consolidates the field-proven reset procedure for SIMATIC S7-300 MMC cards, the documented Siemens MRES timing sequence, the specific failure mode observed when an MMC is moved from an ET 200S IM 151-8 PN/DP (6ES7151-8AB00-0AB0) to a CPU 313C-2DP/315-2DP, and the recovery steps using STEP 7 / SIMATIC Manager when the front-panel switch will not complete the sequence.

Problem Description

Symptoms reported on a CPU 313C-2DP (6ES7313-6CF00-0AB0 or 6ES7313-6CG00-0AB0) carrying a 512 KB MMC (6ES7953-8LJ00-0AA0):

• STOP LED flashes at 0.5 Hz immediately after power-on; no transition to RUN.
• Operator places the mode selector in MRES, holds, and releases per the documented sequence.
• STOP LED never settles to steady ON; instead it returns to fast flash (approximately 2 Hz), indicating that the reset was not accepted.
• Inserting the same MMC in a programming device (PG) and performing an erase through SIMATIC Manager allows the next CPU power-up to boot normally.
• Subsequent MRES operations on the same card, with the same CPU, then succeed.

The same symptom family has been reported on CPU 315-2DP (6ES7315-2AF00-0AB0) and CPU 315-2PN/DP (6ES7315-2EH00-0AB0) when the MMC was last written by an ET 200S IM 151-8 PN/DP station master.

Root Cause Analysis

The MMC retains its hardware configuration and the program blocks written by the last CPU that programmed it. When the card is moved to a different CPU family, two failure paths are possible:

1. Configuration mismatch. The MMC still contains the hardware configuration of the source CPU (for example, the IM 151-8 PN/DP I/O map, PROFINET device names, and DP slave addresses). On the target CPU 313C-2DP or 315-2DP, the boot loader cannot reconcile the source configuration with the locally detected module lineup and refuses to enter RUN, requesting a memory reset. The MRES sequence clears RAM, but the configuration on the MMC is not erased by the switch sequence alone — the next time the CPU attempts to load the configuration from the MMC it re-encounters the mismatch.
2. FAT or directory corruption on the MMC. If the card was ejected without an orderly stop, written by a non-Siemens reader, or exposed to an aborted download, the FAT16 file system of the card can be marked inconsistent. The boot loader reads only specific Siemens system blocks (SDBs, SFCs, OB1, the _LOG/active files), and a partial directory entry causes the loader to abandon the MRES sequence early, returning the CPU to fast flash.

The mode selector MRES sequence clears the working memory (RAM) and resets the retain/operating state counters, but it does not erase the MMC content. To wipe the MMC, the CPU must be in STOP and a download from STEP 7 / SIMATIC Manager (PLC → Delete/Format MMC) must be performed, or an external PG EPROM/MMC writer must re-initialize the card.

Prerequisites

Memory Reset via MRES Switch (Documented Procedure)

Per the Siemens S7-300 operating instructions (entry ID 12996906) and the FAQ "How do you reset a SIMATIC S7-300 CPU and MMC" (entry ID 15364447):

1. Set the mode selector to STOP (key vertical). Confirm STOP LED is steady ON.
2. Rotate the switch to MRES. Hold for at least 3 seconds (recommended 5 s for marginal cards) until the STOP LED transitions from steady ON to slow flash (0.5 Hz).
3. Release the switch so it springs back to STOP. Within 3 seconds, rotate again to MRES and release.
4. The STOP LED should now indicate steady ON while the CPU performs the reset, and the CPU is ready to download.

If, after step 3, the STOP LED returns to fast flash (2 Hz), the CPU has rejected the reset request. Field data shows this typically indicates one of the following:

• The card was last written by a different CPU family (cross-system migration).
• The mode switch contact bounce released the lever before the 3 s / 5 s timing window was observed.
• The MMC FAT is marked inconsistent.

Memory Reset via Programming Device

When the MRES switch path does not complete, the MMC must be erased through STEP 7 / SIMATIC Manager. This is the documented Siemens fallback and is the procedure that the original report confirmed as working.

1. Connect the PG to the CPU. For CPU 315-2DP use the MPI/PROFIBUS interface; for CPU 315-2PN/DP either PROFINET or MPI. For CPU 313C-2DP (MPI/PROFIBUS combination) use MPI for this step.
2. Open SIMATIC Manager. Choose PLC → Accessible Nodes to confirm online visibility. If the node does not appear, verify the MPI address (default 2), bus terminator, and baud rate (default 187.5 kbps).
3. Open the project containing the target hardware configuration, or create a new offline project with the correct HW Config for the destination CPU.
4. Place the CPU mode selector in STOP. Do NOT power-cycle.
5. Select PLC → Delete/Format MMC (German: Speicherkarte löschen). Confirm the prompt. This erases all blocks and SDBs on the MMC and re-creates a fresh FAT.
6. With the CPU still in STOP, choose PLC → Download to push the new HW Config and program to the now-empty MMC.
7. Rotate the mode selector to RUN. The CPU should now start. If the CPU still requests a reset, repeat step 5 before any further download attempts.

The PLC → Accessible Nodes path can also be used to inspect the MMC file system. If only system blocks (SDB0, SDB1, SDB2, OB1, SFC/OB100 family) appear and no user blocks are visible, the MMC has been re-initialized but the program has not yet been downloaded.

Cross-CPU Migration: IM 151-8 PN/DP → S7-300

This is the specific failure path in the source report. The ET 200S IM 151-8 PN/DP is an IO Device master, not a stand-alone CPU — but the system data blocks it stores on the MMC include PROFINET device names, I&M records, and slot mappings that the S7-300 CPU 31x loader cannot parse.

To migrate safely:

1. Power down the IM 151-8 station and remove the MMC.
2. Insert the MMC into the destination CPU 313C-2DP or 315-2DP while powered off.
3. Power on. Expect the 0.5 Hz STOP LED because the loader will recognize the foreign SDB set.
4. Connect the PG. Place the CPU in STOP. Use PLC → Delete/Format MMC in SIMATIC Manager.
5. Without cycling power, download the new HW Config for the S7-300 station. The CPU will boot with the new configuration on the now-clean MMC.

Once the CPU has performed one full download cycle, the MMC is re-marked with the S7-300 SDB signature. Subsequent MRES switch resets behave normally.

MMC Compatibility and Ordering Data

All S7-300 MMCs use the Siemens-proprietary FAT16 layout. Third-party SD-to-MMC adapters are not supported by STEP 7 and may produce the same symptom set as a corrupt FAT.

Troubleshooting Matrix

Common Operator-Side Errors

• Power-cycling between MRES actuations. Each power-up re-reads the MMC and re-issues the reset request. Do not power off between MRES steps.
• Returning the CPU to RUN immediately after a memory reset. A bare MRES leaves the MMC unchanged. Switching to RUN causes the CPU to re-load the same configuration that triggered the reset, putting the CPU back into slow flash. Place the CPU in STOP, download a valid configuration, then RUN.
• Using a generic SD card reader. Windows will offer to format the MMC if inserted into a USB reader; this overwrites the Siemens FAT with a Windows FAT and renders the card unreadable to the CPU. Use only the Siemens field PG or the STEP 7 MMC writer.
• MPI address collision. If the source IM 151-8 left a PROFINET device name or MPI address 2 on the MMC and the target CPU is also address 2, the PG may bind to the wrong node. Change the CPU's MPI address in HW Config or use "Accessible Nodes" to scan.

Verification

After completing the recovery sequence, verify in the following order:

1. LED state. STOP LED steady ON, no flashing. No SF/BF LED lit on the CPU or IM modules.
2. Accessible Nodes. SIMATIC Manager → PLC → Accessible Nodes shows the CPU with the correct MPI/PROFINET address.
3. Module Information. Online → CPU → Module Information → Memory tab shows the expected user blocks (OB1, FB/FCs, DBs) and the working memory utilization is non-zero.
4. Diagnostics buffer. Module Information → Diagnostics Buffer should not contain entries of type "Memory reset requested" or "Firmware/loader error" after a clean download.
5. RUN test. Rotate mode selector from STOP to RUN. STOP LED clears, RUN LED comes on within 1–2 seconds for a typical project.

Recommended Field Procedure (Summary)

1. Attempt the documented MRES sequence (5 s hold, 3 s release, 5 s hold).
2. If fast flash returns, repeat steps 1 two more times.
3. If still failing, connect the PG and use PLC → Delete/Format MMC.
4. Without powering off, place CPU in STOP and download the project.
5. Switch to RUN. Verify LEDs and diagnostics buffer.
6. Carry the field PG or a pre-imaged USB stick with the project to avoid repeat site visits — or keep a spare, pre-formatted 512 KB MMC (6ES7953-8LJ00-0AA0) on site.

Notes on Related Tooling

The S7-300 MMC is unrelated to the Microsoft Management Console (mmc.exe) or to embedded MMC/eMMC subsystems used in STM32 boards; those share only the acronym. Field engineers occasionally confuse the Windows MMC.exe prompts (for example, a Group Policy that blocks devmgmt.msc) with the Siemens MMC, but the two are independent stacks. The Siemens MMC is accessed exclusively through STEP 7 / SIMATIC Manager, TIA Portal, or the field PG MMC slot — not the Windows file system.