S7-400H Power Supply Failure Detection via OB81 in WinCC
Field-proven procedure for routing SIMATIC S7-400H PS407 power-supply failure events into a WinCC HMI alarm line. Covers the 6ES7407-0KR02-0AA0 PS module, OB81 temporary-local-data decoding (FLT_ID and rack/slot), STEP 7 V5.x Report System Error (RSE) generation, and WinCC AS-OS compile. Includes a verified test sequence and a troubleshooting matrix for the most common commissioning pitfalls.
1. Problem Overview
A redundant S7-400H subsystem contains two PS407 power supplies per CPU rail (one in slot 1, one in slot 2 of the wide CR2/CR3 rack, optionally a third PS in slot 3). When one PS module is de-energised, removed under load, or develops an internal fault, the surviving PS module keeps the subsystem alive — the CPU does not stop, and the process continues. The required operator response is an unmissable HMI alarm: "Power Supply 1 failure" or "Power Supply 2 failure", plus an event in the diagnostic buffer.
There are three engineered paths to deliver that alarm:
- Manual OB81 block — programmer writes a short STL/SCL/FBD block in OB81 that sets a bit per PS and raises an SFC17 / SFC18 alarm (recommended when you want total control of the message text and tag layout).
- Report System Error (RSE) wizard — STEP 7 V5.x generates the OB81, a default diagnostic DB, and a set of message texts automatically; the same texts propagate to WinCC after an AS-OS compile. This is the path used by PCS 7 and is the cleanest approach for non-PCS 7 plants that still want a uniform alarm language.
- Hard-wired FAULT contact — use the PS module's floating life-zero relay as a digital input on an ET 200M / ET 200SP module wired into the S7-400H PROFINET ring. This is recommended only as a fallback for plants where OB81 has been disabled, because it bypasses the diagnostic buffer and loses the time-stamp granularity.
This article covers paths (1) and (2) and shows how to wire the result into a WinCC alarm line. The hard-wired fallback is noted in the troubleshooting matrix.
2. Hardware Context: 6ES7407-0KR02-0AA0
The 6ES7407-0KR02-0AA0 is the wide-format PS407 10 A module designed for redundant operation in the S7-400H. The "0KR" MLFB encodes the wide (W) form factor with parallel-redundancy support and a 24 V DC input. The "-02" release is the variant qualified for hot-swap under redundancy with the 6ES7407-0KA02-0AA0 successor. Output ratings, status indicators, and diagnostic contacts relevant to OB81 are summarised in the table below.
| Parameter | Value |
|---|---|
| Order number (MLFB) | 6ES7407-0KR02-0AA0 |
| Input voltage (rated) | 24 V DC (19.2–30 V DC operating range) |
| 5 V DC output (backplane) | 10 A continuous |
| 24 V DC output (backplane) | 1 A continuous |
| Form factor | Wide (W), one PS slot |
| Redundant operation | Yes — designed for parallel operation with a second PS in the same subsystem; load is shared, hot-swap supported |
| Status LEDs | DC OK (green), 5 V DC OK (green), 24 V DC OK (green), FAULT (red) |
| FAULT relay (life-zero) | One floating changeover contact, "PS OK" — usable as a hard-wired backup to OB81 |
| Diagnostic interrupts | Yes — generates a diagnostic buffer entry on every FAULT transition; OB81 is invoked on the owning CPU |
| Hot-swap capable | Yes, when the partner PS in the same rack is healthy |
| Compatible racks | UR1, UR2, CR2, CR3 (wide-format) |
The FAULT LED is driven by the module itself and reflects internal PS failure, output undervoltage, or input under/over-voltage. The same condition is signalled to the CPU via the backplane, which forces an entry in the diagnostic buffer and invokes OB81. Therefore, no external wiring is required to bring the FAULT signal into the HMI — OB81 and the associated diagnostic buffer entry are the canonical path. The FAULT relay is a parallel, hard-wired option that may be retained as a fall-back signal in safety-relevant plants.
3. S7-400H Redundancy Power Architecture
An S7-400H subsystem is built from two identical CR2 (or CR3) racks, each with its own PS407 pair and its own H-CPU. The two H-CPUs are linked by fibre-optic sync modules (one in the last slot of each rack) and run in hot-standby. The redundancy footprint relevant for power-supply detection is:
- Subsystem 0: PS407 in slot 1, PS407 in slot 2, H-CPU 41x-3H/4H in slot 3 (or 3+4 for the sync module on CR3). Each PS is powered from an independent 24 V DC feeder (A and B supplies, often from different UPS outputs).
- Subsystem 1: mirror image of subsystem 0, on an independent rack.
When PS407 slot 1 of subsystem 0 fails, only subsystem 0's slot-1 PS is affected. The slot-2 PS continues to feed subsystem 0, and subsystem 1 is untouched. OB81 fires on the master H-CPU (the one currently holding the role of master) with parameters that identify which PS module is in fault. The same event is mirrored to the standby H-CPU via the redundancy link, so both CPUs' diagnostic buffers contain the event.
Because each PS module is in a different slot and a different rack, OB81's temporary local data can be used to route the alarm to the correct HMI text. The decoding rules are given in the next section.
4. OB81 — Power Supply Error Organization Block
OB81 is a synchronous error OB. On the S7-400, the CPU starts it whenever one of the following transitions occurs on any PS module or on the backplane:
- A PS module is removed or its input/output falls out of tolerance.
- A PS module returns to healthy operation.
- The 24 V DC supply on the backplane (the segment powering the IM, SM, FM modules) is lost or returns.
- The 5 V DC / 15 V DC supply on the backplane is lost or returns.
- The CPU battery is exhausted or restored (only when a battery module is fitted).
OB81 has a low default priority (2 in the S7-400) and runs in the OB1 cycle on a non-fatal event. If OB81 is not loaded, the CPU goes into STOP on the first PS-fault event — this is the most common cause of "CPU went to STOP and there is no user OB" during commissioning, and is why OB81 must always be present in any S7-400H program.
4.1 OB81 Temporary Local Data
The exact layout of OB81's TEMP area is documented in the Siemens reference manual "S7-300/400 System and Standard Functions" (MLFB 6ES7810-4CA10-8BW1). For the S7-400H the relevant fields are:
| Symbolic name | Type | Meaning |
|---|---|---|
| OB81_EV_CLASS | BYTE | B#16#39 = event incoming (fault), B#16#38 = event outgoing (return-to-OK) |
| OB81_FLT_ID | BYTE | Fault identifier; see FLT_ID table below |
| OB81_PRIORITY | BYTE | OB priority (default 2 for PS events in S7-400) |
| OB81_OB_NUMBER | BYTE | 81 |
| OB81_RESERVED_1 | BYTE | Reserved |
| OB81_RACK_CPU | BYTE | Rack number of the affected PS module (bits 0–3 = slot, bits 4–7 = rack / CPU area; see §6) |
| OB81_RESERVED_2 | BYTE | In S7-400: rack number 0–15 |
| OB81_RESERVED_3 | BYTE | Reserved |
| OB81_RESERVED_4 | WORD | Reserved |
| OB81_DATE_TIME | DATE_AND_TIME | Stamp when OB81 was called |
4.2 FLT_ID Decoding
The FLT_ID value tells you which sub-event triggered OB81. The S7-400 values are listed below; values outside this range are reserved by Siemens.
| FLT_ID | Meaning | Event class | Typical HMI text |
|---|---|---|---|
| B#16#01 | Battery exhausted (only with battery module fitted) | incoming / outgoing | "CPU battery exhausted — replace within 2 weeks" |
| B#16#02 | No backup battery | incoming only | "No backup battery installed" |
| B#16#03 | 24 V DC backplane supply failed | incoming / outgoing | "24 V DC backplane failure on rack n / PS slot m" |
| B#16#04 | 5 V / 15 V DC backplane supply failed | incoming / outgoing | "Backplane 5 V failure on rack n / PS slot m" |
| B#16#05 | Power supply module failure | incoming only | "Power Supply n failed — check 24 V DC input" |
| B#16#06 | Power supply OK after failure | outgoing only | "Power Supply n restored" |
| B#16#07 | Power supply not OK — diagnostic buffer entry created (S7-400 only) | incoming | "PS n faulty — see diagnostic buffer" |
For power-supply hardware failures the relevant IDs in practice are B#16#05 (PS module fault, with the partner PS still alive — the case in this article) and B#16#06 (return-to-OK). B#16#07 is the "PS not OK but CPU is still running" condition that is generated when the PS module reports a partial fault, for example loss of 24 V DC output while 5 V DC is still present.
5. Prerequisites
Before opening STEP 7, confirm the following:
- STEP 7 V5.5 SPx (H-CPU programming is still V5.x-first-class in most plants). TIA Portal V13+ supports S7-400H but the workflow described here uses the SIMATIC Manager UI.
- WinCC V7.x (or WinCC Professional in TIA Portal) is installed on the engineering station.
- WinCC has the "STEP 7 Alarm" option (or the "Basic Process Control" option for full message configuration) installed. Verify under Start → Settings → Control Panel → Add or Remove Programs → SIMATIC WinCC → Change → Options.
- The STEP 7 project is integrated with the WinCC project (the OS must be assigned to the AS in the SIMATIC Manager tree) so that AS-OS compile can push tags and messages to the HMI.
- The S7-400H station is fully compiled and downloaded; OB82 / OB83 / OB85 / OB86 / OB100 / OB121 / OB122 are already in place from the standard project template.
- The rack contains the 6ES7407-0KR02-0AA0 PS407 modules in slot 1 and slot 2 of each CR2/CR3, with the slot-1 PS powered from UPS-A and the slot-2 PS from UPS-B (or equivalent dual-feeder arrangement).
6. Implementation Path 1 — Manual OB81 with per-PS tags
This path gives the engineer full control of the message text, the tag layout, and the priority of the alarm. It is the path most often used in plants that do not have PCS 7 but still want HMI-side visibility.
6.1 Add OB81 to the project
- In SIMATIC Manager, expand the S7-400H station and open the Blocks container.
- Right-click Blocks → Insert New Object → Organization Block.
- Select OB81 from the list. Choose language: STL, SCL, FBD, or LAD. SCL is the easiest for the rack/slot decoding shown below.
- Open OB81; STEP 7 will pre-populate the TEMP area with the variables listed in §4.1.
6.2 Declare global tags for each PS
Create a global data block — for example DB100 "PS_Status" — with the following structure. Two bits per PS (one for "fault", one for "OK") plus a stamp.
DATA_BLOCK "PS_Status"
VERSION : 0.0
STRUCT
PS1_Fault : BOOL; // TRUE while PS in slot 1 of subsystem 0 is in fault
PS2_Fault : BOOL; // TRUE while PS in slot 2 of subsystem 0 is in fault
PS1_OK : BOOL; // TRUE when PS in slot 1 has just returned to OK
PS2_OK : BOOL; // TRUE when PS in slot 2 has just returned to OK
PS1_LastFault : DWORD; // diagnostic-event stamp for PS1
PS2_LastFault : DWORD; // diagnostic-event stamp for PS2
PS_Rack_0 : BOOL; // master flag for rack-0 events
END_STRUCT;
END_DATA_BLOCK
6.3 Populate OB81 in SCL
The sample below decodes OB81 for a single S7-400H subsystem (rack 0, PS slots 1 and 2). Adjust the slot numbers and the rack number to match the project's HW Config.
FUNCTION_BLOCK OB81
{ S7_Optimized_Access := 'FALSE' }
VERSION : 0.0
VAR_TEMP
info : STRUCT
EV_CLASS : BYTE;
FLT_ID : BYTE;
PRIORITY : BYTE;
OB_NUMBER : BYTE;
RESERVED_1 : BYTE;
RACK_CPU : BYTE;
RESERVED_2 : BYTE;
RESERVED_3 : BYTE;
RESERVED_4 : WORD;
DATE_TIME : DATE_AND_TIME;
END_STRUCT;
END_VAR
BEGIN
// Decode only PS-module-related events; let other events pass silently.
IF info.FLT_ID = B#16#05 OR // PS module failed
info.FLT_ID = B#16#06 OR // PS module back to OK
info.FLT_ID = B#16#07 THEN // PS not OK, diag buffer entry created
// Slot lives in the low nibble of RACK_CPU on S7-400H firmware V4.5+
// (low byte = 0x0S, S = slot 1 or 2). Verify against your manual.
IF (info.RACK_CPU AND B#16#0F) = B#16#01 THEN
IF info.EV_CLASS = B#16#39 THEN // event incoming
"PS_Status".PS1_Fault := TRUE;
"PS_Status".PS1_OK := FALSE;
ELSE // event outgoing
"PS_Status".PS1_Fault := FALSE;
"PS_Status".PS1_OK := TRUE;
END_IF;
ELSIF (info.RACK_CPU AND B#16#0F) = B#16#02 THEN
IF info.EV_CLASS = B#16#39 THEN
"PS_Status".PS2_Fault := TRUE;
"PS_Status".PS2_OK := FALSE;
ELSE
"PS_Status".PS2_Fault := FALSE;
"PS_Status".PS2_OK := TRUE;
END_IF;
END_IF;
END_IF;
END_FUNCTION_BLOCK
Compile and download OB81 and DB100 to both H-CPUs. The DB100 tags are now the single source of truth for the HMI.
6.4 SFC17 / SFC18 alarm message (optional)
If the WinCC project does not include a full message line, OB81 can also call SFC17 (ALARM_SQ) or SFC18 (ALARM_S) to send the event to the OS as a STEP 7 message. Typical use:
// In OB81, when a fault is detected:
CALL "ALARM_SQ" (
SFC := 18,
ID := DW#16#EEEE_PS01, // message ID, project-specific
EV_ID := 1, // event ID
SIG := FALSE, // FALSE = not an acknowledgment-required message
SD := 'Power Supply 1 failed on rack 0',
RET_VAL := #retVal
);
This approach removes the need for the AS-OS compile path in §7, but it is more invasive and is rarely used outside PCS 7. In most plants, the BIT-in-DB pattern is preferred and the WinCC alarm is built from the tag edge.
7. Implementation Path 2 — Report System Error (RSE) Wizard
The Report System Error option is the lowest-effort path. It generates OB81, a default message DB, a WinCC message configuration, and a WinCC alarm-line entry for every OB that the option supports — OB70, OB72, OB73, OB80, OB81, OB82, OB83, OB84, OB85, OB86, OB87, OB121, OB122. To enable it for an S7-400H project:
- In SIMATIC Manager, right-click the S7-400H station → Object Properties.
- Open the Report System Error tab.
- Select Activate Report System Error. The default settings are correct for most plants; review the priority list to confirm OB81 is at the desired priority.
- Click Generate. STEP 7 inserts the following blocks into the program:
- OB81 (replaces any user OB81 with a generated one — back up your own OB81 first)
- OB82, OB83, OB85, OB86, OB100, OB121, OB122 (only if they did not already exist)
- DB125 (default diagnostic DB; never modify by hand)
- FB126 (the F-STOP / F-START helper; for F-CPU use only)
- SFC103 / SFC104 (only for F-systems)
- A message configuration file (texts in the project's language)
- Compile and download.
The wizard pre-fills the message texts in English (and German, Spanish, French, Italian, and Chinese-Hans) and assigns an event ID per OB81 / OB82 / etc. The PS-module messages are tagged with the rack and slot so the WinCC alarm line displays "PS 1 failure, rack 0" automatically.
<Project>\<Station>\<CPU>\S7WKS\<ProjectId>\<Language>\SEHRTXT.MSF. Do not edit the .MSF by hand — re-run the wizard to update.8. WinCC Integration: AS-OS Compile and Alarm Display
Once the AS side is generating either per-PS tags (path 1) or the standard message texts (path 2), the OS side must be told about them. The mechanism is the AS-OS compile in SIMATIC Manager.
8.1 Verify the OS assignment
- In SIMATIC Manager, open the project tree and confirm that a WinCC station is shown under the S7-400H station (i.e. the OS is a child of the AS, not a sibling). If not, drag the WinCC station from the component view into the AS subtree.
- Right-click the WinCC station → Assign OS… The button is only active if the project structure is correct.
8.2 Run the AS-OS compile
- Right-click the WinCC station → Compile OS…
- In the dialog, tick at minimum:
- Tags and messages (required for OB81 propagation)
- S7 messages (pulls the OB81 texts from the AS into the WinCC alarm logging)
- Area pointers only if you use WinCC area pointers for redundancy-status display
- Confirm with Compile. STEP 7 will open the WinCC project, push the new tags (DB100.PS1_Fault, DB100.PS2_Fault, etc. in path 1; the standard message variables in path 2), and create the alarm records in WinCC Alarm Logging.
8.3 Configure the WinCC alarm line
- Open the WinCC project in WinCC Explorer.
- Open Alarm Logging. The new messages appear under the same message class as the standard S7 messages (typically "System Error").
- Bind the message texts to colour and acknowledge behaviour: the OB81 events should be configured as incoming-only alarms with red background and a single-acknowledgement requirement. Return-to-OK (FLT_ID B#16#06) is configured as a going event in green.
- Add a WinCC picture window with a WinCC Alarm Control to display the message line. Use the Single line style and bind the date/time column to local time.
8.4 Verification on the OS
- Open WinCC Runtime.
- Open the alarm control window.
- Power-cycle PS1 (pull the 24 V DC input on UPS-A). Within < 2 s the alarm line must show "Power Supply 1 failure" (path 2 text) or trigger the SFC17 / SFC18 message (path 1 with SFC).
- Restore 24 V DC. The alarm should clear in < 2 s and the "Power Supply 1 restored" event should be logged.
- Repeat for PS2 (slot 2).
9. Distinguishing PS1 vs PS2 in a Redundant Subsystem
The S7-400H is two physical subsystems. Within one subsystem (rack 0), PS1 is in slot 1 and PS2 is in slot 2. The slot number is what identifies "PS 1" vs "PS 2" on the HMI. The standard practice is to map slot → PS index at the HMI as follows:
| PS slot in HW Config | HMI tag (path 1) | Default HMI text (path 2) |
|---|---|---|
| 1 (CR2 / CR3, subsystem 0) | DB100.PS1_Fault | "Power Supply 1 failure, rack 0" |
| 2 (CR2 / CR3, subsystem 0) | DB100.PS2_Fault | "Power Supply 2 failure, rack 0" |
| 1 (CR2 / CR3, subsystem 1) | DB100.PS1_Fault (mirrored via sync) | "Power Supply 1 failure, rack 1" |
| 2 (CR2 / CR3, subsystem 1) | DB100.PS2_Fault (mirrored via sync) | "Power Supply 2 failure, rack 1" |
For multi-rack plants, add the rack number as a separate tag. The rack number is in OB81_RESERVED_2 on the S7-400H; the slot is in the low nibble of OB81_RACK_CPU. Confirm both against the OB81 layout in 6ES7810-4CA10-8BW1 for the firmware version of your CPU.
10. Peripheral I/O Considerations — IM 155-5 PN HF
If the S7-400H uses ET 200MP stations over PROFINET with the IM 155-5 PN HF interface module (6ES7155-5AA00-0AC0), the same PROFINET ring can also be configured for system redundancy. The IM 155-5 PN HF can act as a redundant PROFINET device on an S7-400H, with both H-CPUs reachable. The OB81 events from the central PS modules are independent of the I/O redundancy; the I/O redundancy only affects OB83 (rack fault) and OB86 (station failure). When planning the HMI alarm logic, do not confuse the two — a PS407 failure and an IM 155-5 PN HF removal are two different OB calls and must be alarmed as two different messages. Refer to the official IM 155-5 PN HF manual collection for the configuration of system redundancy on S7-400H:
11. Edge Cases and Field-Proven Caveats
- PS1 and PS2 swapped at commissioning. If the HMI reports "PS1" when the slot-1 module is healthy and "PS2" when the slot-1 module is failed, the slot encoding is reversed. In the manual path, re-check the low-nibble decoding. In the RSE path, the slot number is taken from HW Config and is always correct — this is one of the main reasons to use RSE.
- OB81 missing → CPU STOP. If OB81 is not loaded, the very first PS transition puts the CPU into STOP. This is by design (fail-safe default) and is the most common reason a freshly delivered S7-400H station does not come up cleanly. Always include OB81 (even if empty) in the project template.
- OB81 priority raised by mistake. If a programmer sets OB81 priority higher than OB1, OB81 can interrupt the user cycle. Keep it at the default 2 unless there is a documented reason to raise it.
- 24 V backplane event overwrites PS-module event. A FLT_ID B#16#03 or B#16#04 (backplane 24 V or 5 V/15 V failure) and a FLT_ID B#16#05 (PS module failure) are reported separately. The RSE wizard lists them as two distinct messages; in a manual path, the decoder must handle both.
- Battery event on a non-battery PS. FLT_ID B#16#01 / B#16#02 are reported only when a battery module is fitted to the PS407. If your PS407 does not have a battery module, these IDs are never generated. Do not alarm on them.
- Diagnostic buffer overflow during a switchover. A master/standby switchover generates a burst of OB70, OB72, OB81, OB85, and OB86 events. The diagnostic buffer can wrap. Trigger a backup of the diagnostic buffer via the PG after every switchover, or install the Siemens "DiagBufferLog" tool from Siemens Industry Online Support for long-term logging.
- AS-OS compile does not push new messages. If the WinCC alarm line does not show the new PS events after compile, the most common cause is that the WinCC project is not "linked" to the STEP 7 project. Verify the OS is a child node of the AS in the SIMATIC Manager tree and that the "S7 messages" tick is set in the compile dialog.
- Time-stamp off by one hour. The DATE_TIME field of OB81 uses the CPU clock, not the PG clock. After a daylight-saving change, the timestamps will be wrong until the CPU's time-of-day is re-synchronised. Use SFC1 (READ_CLK) and SFC0 (SET_CLK), or better, run SNTP / NTP sync from a station clock.
- PS hot-swap triggers OB81 + OB83. When a PS module is hot-swapped in a healthy rack, OB81 fires (PS event) and OB83 fires (rack event). Both must be acknowledged on the HMI; ensure the message line does not auto-clear the second event.
- 6ES7407-0KR02-0AA0 vs 6ES7407-0KA02-0AA0 mix-up. The "0KR" variant supports redundancy and is the recommended PS for S7-400H. The "0KA" variant is a standalone PS for non-H systems. Mixing the two in a single H rack is not allowed.
12. Verification Procedure
- Confirm OB81 is loaded on both H-CPUs. In SIMATIC Manager, Blocks → right-click → Block Status; OB81 should show "exists on online".
- Connect to the master H-CPU and open PLC → Diagnostic/Setting → Module Information → Diagnostic Buffer. Verify the diagnostic buffer is recording the previous PS events correctly.
- Open WinCC Runtime and confirm the alarm line is visible. Note the current state of the PS tags in a faceplate.
- Pull the 24 V DC input on the slot-1 PS (UPS-A feeder). Within < 2 s, the alarm line must show "Power Supply 1 failure" and the FAULT LED on the PS must be lit.
- Re-apply the 24 V DC on the slot-1 PS. The alarm line must show "Power Supply 1 restored" and the FAULT LED must clear.
- Repeat steps 4–5 for the slot-2 PS (UPS-B feeder).
- Repeat steps 4–5 on the second subsystem (rack 1) and confirm the rack-1 PS messages are visible on the HMI.
- Force a master/standby switchover via the H-CPU's switchover selector. Verify that the alarm events are mirrored on the standby CPU's diagnostic buffer.
- Save the diagnostic buffer of both H-CPUs to a file. Compare timestamps; both should agree within 100 ms if SNTP is configured.
- Document the test result in the commissioning report and attach the alarm-line screenshot.
13. Troubleshooting Matrix
| Symptom | Likely cause | Fix |
|---|---|---|
| CPU goes to STOP on first PS event | OB81 not loaded in the program | Insert OB81 (even empty), recompile and download to both H-CPUs |
| FAULT LED on PS is lit, no alarm on HMI | OB81 exists but no HMI tag is set; AS-OS compile not run | Implement OB81 decoding (path 1) or run RSE wizard (path 2); run AS-OS compile; verify WinCC alarm line |
| Alarm text says "PS1" but slot-1 is healthy | Slot-to-tag mapping reversed in manual path 1 | Re-check the low-nibble decoding of OB81_RACK_CPU; or switch to RSE for auto-mapping |
| Alarm on the HMI but no diagnostic buffer entry | Hard-wired FAULT contact wired to a DI; OB81 path disabled | Re-enable OB81 in HW Config and load it; keep the FAULT contact as a backup only |
| Alarm does not clear after restoring 24 V DC | DB100.PS1_Fault not reset on outgoing event | Verify OB81 handles B#16#06 (return-to-OK); verify DB100 bit is reset on OB81 outgoing branch |
| Alarm shows twice on the HMI | OB81 fired on both H-CPUs; both write to the same DB100 | Confirm OB81 is only processed on the master (priority gating), or use a redundancy-safe DB pattern (FB127 "RED_INF" or PCQ_send / PCQ_recv pair) |
| Alarm line shows "Unknown OB81" | FLT_ID outside the values in §4.2 — typically a new firmware or a corrupted event | Read the diagnostic buffer in STEP 7; cross-reference with the 6ES7810-4CA10-8BW1 manual for the firmware revision |
| Alarm appears only after a switchover | OB81 only loaded on the master CPU; the standby CPU does not raise the event | Load the same OB81 / DB100 on the standby CPU; S7-400H synchronises DB100 if marked as "redundant" in the program |
| AS-OS compile completes but the new tag is greyed-out in WinCC | Tag is in a non-prefixed DB that WinCC cannot reach over the S7 connection | Use a symbolic name, or place the tags in a "prefixed" DB; re-run AS-OS compile |
| Time-stamp of the alarm is 1980-01-01 | CPU clock not set | Run SFC0 / SFC1 to set the clock; configure SNTP client; verify CPU has battery backup |
| Alarm text in German on an English HMI | Project language in STEP 7 is German; AS-OS compile pulled the German .MSF | Switch the project language to English (or the desired target); re-run the RSE wizard; re-run AS-OS compile |
14. Reference Documentation
- Siemens "S7-300/400 System and Standard Functions" reference manual, MLFB 6ES7810-4CA10-8BW1, edition 05/2010 (or current successor) — the canonical source for OB81 layout, FLT_ID values, and the bit-level encoding of OB81_RACK_CPU on S7-400 / S7-400H. Available via Siemens Industry Online Support.
- SIMATIC ET 200MP manual collection — IM 155-5 PN HF (6ES7155-5AA00-0AC0) system redundancy on S7-400H (peripheral I/O redundancy context).
- Siemens "S7-400H Automation System, Fault-Tolerant Systems" manual — for the master/standby switchover sequence and the diagnostic buffer interaction.
- Siemens "STEP 7 V5.x, Configuring Report System Error" online help — for the RSE wizard parameter list.
- Siemens "WinCC V7.x Information System, Alarm Logging" — for the WinCC alarm-line configuration and the AS-OS compile options.
15. Frequently Asked Questions
Does the S7-400H stop the CPU when one PS407 module fails?
No. The S7-400H is designed to survive the loss of one PS407 module. The surviving PS module continues to feed the subsystem. OB81 fires on the master H-CPU with a non-fatal priority, and a properly loaded OB81 keeps the CPU in RUN. If OB81 is not loaded, the CPU goes to STOP — always include OB81 in the project template.
Which OB81 FLT_ID identifies a PS407 module failure versus a 24 V backplane failure?
B#16#05 (and B#16#07 on partial fault) is the PS module itself. B#16#06 is the return-to-OK. B#16#03 is the 24 V backplane segment and B#16#04 is the 5 V / 15 V backplane segment. B#16#01 / B#16#02 are battery events and are only generated if a battery module is fitted.
How do I tell PS1 from PS2 in the alarm text?
The PS slot (1 or 2) is encoded in the low nibble of OB81_RACK_CPU on S7-400H firmware V4.5 and later. Decode the low nibble and use it to set DB100.PS1_Fault or DB100.PS2_Fault. With the Report System Error wizard, the slot is taken directly from HW Config and the message text is built automatically as "Power Supply n failure, rack m".
Is external wiring required to bring the PS FAULT signal into the HMI?
No. The 6ES7407-0KR02-0AA0 reports its FAULT state over the backplane, the CPU records it in the diagnostic buffer, and OB81 is called automatically. The FAULT relay on the PS can be wired to a digital input as a hard-wired fall-back, but it is not required for the OB81 path.
What is the difference between the 6ES7407-0KR02-0AA0 and the 6ES7407-0KA02-0AA0?
The 6ES7407-0KR02-0AA0 ("0KR") is the wide-format PS407 with explicit parallel-redundancy support and hot-swap capability for the S7-400H. The 6ES7407-0KA02-0AA0 ("0KA") is the standalone variant for non-redundant S7-400 racks. The two must not be mixed in a single H subsystem.
Why does the alarm appear twice on the HMI after a hot-swap?
PS hot-swap raises two events: OB81 (PS module event) and OB83 (rack event). The WinCC alarm line will list them as two separate records. Acknowledge both. To avoid duplicate entries, do not auto-clear the second event on the first; configure the OB83 message with a different colour (typically orange) to distinguish it from OB81 (red).
Can I run the Report System Error wizard in TIA Portal for an S7-400H?
Yes, from TIA Portal V13 SP1 onwards. The workflow is similar: project tree → AS → Properties → Report System Error. The generated blocks and message texts are functionally identical to the STEP 7 V5.x version. WinCC Professional (TIA) is then linked via the "Compile OS" option on the WinCC station, equivalent to the V5.x AS-OS compile.