Selecting a Depletion-Mode FET for the AD421 Loop Driver

Brian Holt7 min read
Other ManufacturerProcess ControlTechnical Reference
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The AD421 needs an external depletion-mode FET that can conduct enough current at zero gate-source bias. When the listed DN25D, ND2020L, and ND2410L devices are unavailable, select a substitute by guaranteed minimum Idss, operating voltage, dissipation, thermal limits, and pinout—not by the headline drain-current rating.

Reject the usual quick substitutions

Do not start by ordering the first FET with a current rating above 24 mA. That rating normally describes allowable drain current under specified thermal and bias conditions; it does not prove that a device will conduct the required current with its gate tied to its source.

An enhancement-mode FET is also the wrong functional substitute. It normally requires applied gate bias before it conducts. A depletion-mode device is normally on at zero gate-source bias, which is the behavior this application requires.

Quick substitution Why it fails Required check
FET rated for more than 24 mA Drain-current rating is not minimum Idss. Find a guaranteed minimum Idss in the electrical table.
Enhancement-mode FET It may be off when Vgs is zero. Confirm depletion-mode operation and channel type.
Any available depletion FET Voltage, heat, package, or pinout may be unsuitable. Complete the full electrical and mechanical comparison.
Part with a typical 24 mA value A typical value does not guarantee every production unit. Require a minimum rating of at least 24 mA at the applicable test conditions.

Pass this check only when the candidate is explicitly depletion mode and its datasheet gives a guaranteed minimum Idss of 24 mA or more.

Set the zero-bias current screen

Idss is the drain current measured at zero gate-source voltage under the drain-voltage and temperature conditions defined by the FET manufacturer. Those conditions matter. Two devices showing the same number may have been characterized at different Vds values or temperatures.

Search tools often omit Idss, so use them only to produce a candidate list. Open each datasheet and inspect the electrical-characteristics table. Search within the document for Idss, “zero gate,” “zero bias,” or the stated condition Vgs = 0. Reject parts whose datasheets provide only a typical curve or typical value when the application requires a guaranteed minimum.

Use this screening rule:

Accept current criterion only if:
minimum Idss at the stated test conditions >= 24 mA

Do not convert a graph by eye into a guaranteed limit. Curves help predict behavior, but production screening must use the minimum value in the tabulated specification. The check is complete when the candidate has a documented minimum, its test conditions are known, and that minimum meets 24 mA.

Check voltage, power, and temperature limits

Passing Idss is necessary but not sufficient. The external FET also sees voltage and dissipates heat while the loop driver regulates current. Read the AD421 application circuit and operating conditions to determine the maximum voltage that can appear across the FET. Then compare that value with the candidate’s drain-to-source rating, using the project’s required design margin rather than operating at the absolute maximum.

Calculate the operating dissipation at each relevant loop condition:


Use the voltage across the FET, not the total supply voltage, and use the actual drain current for that condition. Repeat the calculation at the supply and load combinations that produce the greatest FET voltage. Convert the resulting power to junction-temperature rise with the thermal data for the selected package and board arrangement. Absolute-maximum power figures are not a substitute for a junction-temperature calculation.

Item Where to obtain it Decision
Maximum FET voltage AD421 circuit and installation supply/load limits Must remain below the candidate’s rating with the required margin.
FET dissipation Calculated from Vds x Id Must fit the package and board thermal path.
Junction temperature Calculated with datasheet thermal data Must remain within the device limit across ambient range.
Safe operating area Candidate datasheet The complete operating point must be permitted.

Stop this stage if the installation’s maximum supply, load range, ambient temperature, or thermal path is unknown. Measure or document those inputs before selecting the part; pass the check when the worst operating point fits the voltage, thermal, and safe-operating-area limits.

Match the package and terminal assignment

Do not treat an electrical replacement as a drop-in replacement. Verify the drain, gate, and source terminal assignment from the candidate datasheet against the PCB footprint. Different packages—and parts in apparently similar packages—can assign terminals differently.

Check package dimensions, mounting orientation, creepage requirements defined by the project, and the board’s ability to remove heat. If a different package is the only stocked option, use a controlled adapter or revise the PCB rather than bending leads into an undocumented arrangement. Long gate wiring can also pick up noise, so keep the replacement layout close to the intended circuit geometry.

Before applying power, use continuity checks and the schematic to confirm that no terminal is swapped and that the gate is not shorted to an unintended node. Pass this stage only after a second comparison of the footprint, package drawing, and schematic net connections.

Commission the replacement in a controlled sequence

Get the loop running under current-limited bench conditions before returning it to the full installation. A current limit protects the candidate and board while wiring, polarity, or selection errors are still possible.

  1. Inspect orientation, solder joints, and the drain, gate, and source connections with power removed.
  2. Connect a representative loop load and instruments that can read loop current and voltage across the FET.
  3. Set the supply to the application’s documented commissioning condition and apply a conservative current limit appropriate to the circuit.
  4. Command the AD421 through its required output range. Check the low end, intermediate points, and the 20 mA endpoint.
  5. At each point, record loop current, voltage across the FET, and supply voltage. Watch for current limiting, loss of regulation, oscillation, or excessive heating.
  6. Repeat the test at the documented supply and load extremes that produce the highest FET voltage and dissipation.

If the output cannot reach 20 mA, check whether the loop has run out of voltage headroom before blaming Idss. Measure the voltage across the load, wiring, driver, and FET; their drops must fit inside the applied loop supply. Pass commissioning when the current remains controlled across the commanded range without supply limiting or abnormal temperature rise.

Prove the end-to-end installation

Bench operation does not prove operation with the installed cable, receiving load, ambient temperature, and supply tolerance. Reconnect the field loop and repeat the range test while measuring at the transmitter and receiver ends. Compare commanded current with received current and investigate any difference before release.

Run the system long enough to reach a stable operating temperature at the condition producing the greatest calculated FET dissipation. Recheck the voltage across the device and calculate its power from the measured values. Confirm that the thermal result still fits the candidate’s datasheet limits and the project margin.

Record the manufacturer’s full part designation, minimum Idss, its test conditions, voltage rating, package, pinout, calculated worst-case power, measured operating point, and approved sourcing information. Do not record only “equivalent to DN25D”; that description cannot control future substitutions. Release the loop only after it reaches the commanded endpoints, remains stable with the installed load, and passes the hot operating check.

FAQ

How do I find an AD421 replacement FET when distributor filters omit Idss?

Filter for depletion-mode candidates, then open each manufacturer datasheet and search the electrical table for Idss, zero-gate current, or Vgs = 0. Accept only a guaranteed minimum of at least 24 mA at documented test conditions.

How do I know whether a 24 mA drain-current rating is enough?

A general drain-current rating does not satisfy the requirement. The datasheet must specify minimum Idss of 24 mA or more; voltage, safe operating area, power, and junction temperature must also pass.

How do I test a candidate depletion-mode FET before installing it?

Use the manufacturer’s stated Idss test method and a current-limited supply. Do not improvise the test voltage: read the specified Vds, Vgs, and temperature conditions from that candidate’s datasheet.

How do I diagnose an AD421 loop that cannot reach 20 mA?

Measure the supply and the voltage drops across the load, wiring, driver, and FET while commanding 20 mA. If the voltage budget is exhausted, correct the loop headroom problem; if headroom remains, recheck the FET’s minimum Idss, pinout, and operating temperature.

When should I stop substituting parts and contact support?

Stop if no candidate has a guaranteed minimum Idss of 24 mA, if the maximum FET voltage or thermal conditions cannot be established, or if the circuit remains unstable after wiring and headroom checks. Do not release a part selected only from a typical curve. Escalate the circuit conditions and candidate datasheet to official Analog Devices support.

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