Selecting Motor Drive Current Measurement Topologies

Daniel Price6 min read
Motor ControlOther ManufacturerTechnical Reference
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A current measurement request starts at the motor-control algorithm, passes through the ADC and sampling trigger, crosses the current sensor, and ends at a conductor carrying phase, DC-link, or bridge-leg current. Follow that path before selecting hardware. The measurement point determines whether the controller receives phase current directly or must reconstruct it from PWM state and switching timing.

Where can motor-drive current be measured?

Three placements are practical: sensors in two or three motor phases, one sensor in the DC link, or shunts in the negative bridge legs. They observe different currents and therefore require different acquisition paths.

Placement Measured quantity Reconstruction Main constraint
Two phase sensors Two phase currents Calculate the third phase when i_a + i_b + i_c = 0 Assumes a three-wire motor with no independent zero-sequence current path
Three phase sensors All three phase currents Not required for normal phase feedback More sensors, ADC channels, calibration values, and wiring
DC-link sensor Instantaneous current entering the inverter bridge Map samples to phase currents using PWM switch states Some PWM states provide no unique phase-current observation
Negative-leg shunts Current through conducting low-side bridge devices Select valid shunt readings from the switching state The ADC can observe a phase only while its negative leg provides a valid path

Layer one first. Verify sensor polarity, conductor routing, isolation boundary, amplifier input range, common-mode capability, bandwidth, and ADC range before debugging reconstruction software. A saturated or common-mode-disturbed analog channel cannot be repaired mathematically.

How does the measurement data reach the controller?

With phase sensors, the control loop requests a sample, a PWM timer triggers the ADC, and the ADC reads currents that already correspond to motor phases. Two-sensor feedback calculates the unmeasured phase as i_c = -(i_a + i_b), with phase labels changed to match the two installed sensors. This is a simple arithmetic operation and requires little stored state beyond offsets, gains, and recent samples.

A DC-link sensor sees the current common to the inverter input, not a continuously identifiable motor phase. The controller must know the switching vector at the sampling instant and associate the link-current sample with the phase or phase combination connected to the DC bus. During switching states that do not expose a unique phase current, reconstruction has no useful observation. The modulator may need to move sampling instants or alter pulse placement while preserving the commanded average voltage.

Negative-leg shunts shorten the analog path and reference the measurement near the bridge return, but their visibility also depends on switch state. A shunt reports useful phase information only when its low-side device conducts and the measurement has settled after switching. The ADC trigger, PWM compare events, dead time, blanking interval, amplifier settling, and conversion time therefore form one timing chain. Read each value from the selected power stage, gate driver, amplifier, ADC, and controller documentation rather than assigning generic timings.

Which criteria separate the approaches?

Criterion Phase sensing DC-link sensing Negative-leg sensing
Current observability Direct over most of the electrical cycle Dependent on PWM state Dependent on low-side conduction
Control software Low reconstruction burden Highest reconstruction and trigger coordination burden Moderate to high trigger coordination burden
ADC demand Two or three simultaneous or closely aligned channels One fast, precisely triggered channel Multiple precisely triggered channels
Calibration Channel-to-channel gain and offset matching One signal chain, plus switching-state validation Gain and offset matching across shunts
Low-modulation operation Generally favorable May have narrow or missing observable windows May have restricted conduction windows
Memory use Offsets, gains, and samples Offsets, gains, PWM state, validity flags, and reconstruction state Per-channel calibration, validity flags, and selection state
Power loss Sensor-dependent Sensor-dependent Each shunt dissipates P = I_RMS²R while carrying current

Memory is rarely the deciding resource. Reconstruction uses a small, fixed set of samples, calibration coefficients, switch-state indicators, and validity flags. ADC throughput, deterministic interrupt latency, synchronized sampling, and available computation time usually constrain the design first.

Sensor location does not directly set motor or inverter efficiency. Resistive shunts add conduction loss, isolated sensors consume auxiliary power, and poor feedback can increase current ripple or force conservative control limits. Compare total sensor-chain loss and thermal rise at the actual RMS current; do not compare topology names as if each implied one sensor technology.

Which current-sensing topology should you select?

Use two phase-current sensors as the default for a three-wire motor when accurate closed-loop current control and straightforward commissioning matter most. The third current follows from Kirchhoff's current law, so a third sensor is not required for basic feedback. Choose three sensors when independent current cross-checking, zero-sequence detection, or continued measurement during one invalid channel justifies the extra hardware and calibration.

Select DC-link sensing when minimizing sensor count outweighs added modulation and reconstruction complexity. It fits controllers that can schedule ADC conversions from PWM events and mark unobservable samples invalid. Do not pass a stale or invalid reconstruction into the current regulator without an explicit handling rule.

Select negative-leg shunts when the power-stage layout supports low-side measurement and the controller can place conversions inside valid conduction windows. This arrangement can simplify analog referencing, but high duty cycles, short pulses, dead time, and switching transients can reduce the usable window.

How should sampling and reconstruction be implemented?

  1. Draw the current path for every PWM switching state. Mark which phase or link current reaches each sensor.
  2. Define a validity map that connects switching state, conducting device, and usable ADC channel. Treat zero or ambiguous vectors as non-observable where they do not identify a phase current.
  3. Calculate the available sampling window from the applied PWM pulse width. Subtract dead time, transient blanking, analog settling, acquisition time, and conversion time using component documentation.
  4. Trigger the ADC from the PWM timer at a stable point inside the valid window. Avoid free-running conversions whose phase drifts relative to switching edges.
  5. Measure offset with the power stage in a defined zero-current condition. Store gain and polarity per channel, then apply calibration before reconstruction.
  6. For two phase sensors, calculate the third current from i_a + i_b + i_c = 0. For link or leg sensing, combine the calibrated sample with the exact switching state captured for that conversion.
  7. Attach a validity flag to every reconstructed result. Define whether the regulator retains the last valid value, modifies PWM placement, or enters a controlled fault response when valid samples are unavailable.

How do you verify the selected measurement path?

Test the analog and timing paths separately before closing the current loop. Inject or command a controlled current condition, confirm polarity and gain on every channel, and inspect raw ADC counts for clipping and switching-edge contamination.

Check Expected result Failure points to inspect
Zero-current offset Stable corrected reading near zero Ground shift, amplifier offset, ADC reference noise
Phase-current sum i_a + i_b + i_c remains near zero for a three-wire motor Polarity, gain mismatch, sample skew, leakage path
PWM-state correlation Each sample changes sign and phase assignment according to the captured switch state Trigger source, state latency, channel mapping
Sampling margin Conversion completes inside the marked valid window Short pulse, dead time, blanking, settling, ADC acquisition
Operating-range sweep No unexplained discontinuity as duty cycle and current change Unobservable vectors, saturation, stale samples, reconstruction boundary

Finish by logging raw samples, reconstructed phase currents, PWM state, trigger instant, and validity flags during an operating-range sweep. Accept the design only when the logged samples remain inside valid windows and an independent current measurement agrees within the accuracy budget.

FAQ

What happens if only two motor phases are measured?

For a three-wire motor, calculate the third current with i_c = -(i_a + i_b). Gain error, offset, or sample skew in either measured channel appears directly in the reconstructed current.

What happens if the DC-link sample occurs during an unobservable PWM state?

The sample cannot identify the required phase current. Mark it invalid, then use the control design's defined fallback or adjust PWM and ADC timing to create a valid observation window.

What happens if a negative-leg shunt is sampled near a switching edge?

Switching transients and incomplete amplifier settling can corrupt the conversion. Move the trigger inside the valid conduction interval after the documented blanking and settling requirements, then verify the margin in the captured timing data.

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