Siemens LOGO! Sequential Light Control with UDF Pattern

Overview

This technical reference implements a sequential lighting control application on a Siemens LOGO! logic module (6ED1052 series, firmware FS04 or later) programmed with LOGO! Soft Comfort V8.x. The specification mirrors a common industrial HMI / control-panel requirement:

• Five indicator lamps H1..H5 illuminate one after the other.
• The interval between adjacent lamps is 2.0 s.
• Switch S_FWD drives the sequence in the forward direction (H1 → H2 → H3 → H4 → H5).
• Switch S_REV drives the sequence in the reverse direction (H5 → H4 → H3 → H2 → H1).
• Each lamp, once lit, must extinguish automatically 10 s after it was turned on — independent of the rest of the sequence.

Three viable implementation strategies are presented below: a cascaded timer network, a shift-register driven network, and a User Defined Function (UDF) approach. The UDF method is the recommended path because it keeps the calling program short, encapsulates the per-stage logic, and lets the same block drive both directions.

Prerequisites

Functional Specification in I/O Terms

Before opening the editor, freeze the I/O contract. A clear table avoids wiring mistakes on the bench.

Strategy 1 — Cascaded On-Delay Timers

The classic technique. A clock pulse (2.0 s) drives the input of stage 1; each stage's output feeds the next stage and simultaneously latches its own output through a parallel OR. Five on-delay blocks (T1..T5) produce the staircase.

Block List (FBD, in program order)

1. B001 — Asynchronous pulse generator: TH = 2.0 s, TL = 0.0 s, parameter "Pulse" mode. Output = M1 (clock).
2. B002 — AND: inputs M1 + EN, output M2.
3. B003 — On-delay (rising edge): Ta = 2.0 s, trigger = M2, output = M3 (stage 1 latched).
4. B004 — OR: inputs M3 + (Q1 feedback), output M4.
5. B005 — On-delay: Ta = 2.0 s, trigger = M4, output M5 (stage 2).
6. Repeat the OR/On-delay pair for stages 3..5.
7. Five Off-delay blocks (B020..B024), Ta = 10.0 s, trigger = M3..M_final, output = Q1..Q5.

The structure produces 5 rungs and is the fastest to commission by hand, but it does not scale: ten stages cost ten more rungs and the diagram becomes unreadable. This is the "mess" the original poster was trying to escape.

Strategy 2 — Shift Register Driven

LOGO! 8 exposes a true shift register block (B008 in Soft Comfort, "Shift register"). A single 1 Hz clock generator (or the 2 s asynchronous pulse generator from Strategy 1) clocks a 1-bit shift register of length 5. The lowest-order bit becomes H1, the highest-order bit becomes H5.

Parameter Settings

Reverse direction is implemented by reading the bits in reverse order and re-mapping them to Q1..Q5, or by pre-loading the shift register with a 1 in bit 5 and shifting left on the same clock. A separate shift register must be instantiated; LOGO! Soft Comfort does not let you read a single SHR backwards in a single block.

Strategy 3 — User Defined Function (Recommended)

The UDF (User Defined Function) is a LOGO! Soft Comfort V8 feature that lets the engineer package a sub-diagram with named inputs and outputs. The UDF compiles into a single block on the calling program. The same UDF can be called five times — one for each stage — with different parameter values. Both forward and reverse sequences are obtained by changing the wiring of the UDF inputs, not the UDF body.

3.1 UDF Inputs and Outputs

LOGO! Soft Comfort allows up to 8 inputs and 4 outputs per UDF, so the 4/2 split above is within limits.

3.2 UDF Internal Diagram

1. B101 — On-delay (rising edge), Ta = 2.0 s. Input = STAGE_EN. Output = M_ON.
2. B102 — Off-delay, Ta = 10.0 s. Input = M_ON. Output = LAMP (UDF_OUT1).
3. B103 — SR flip-flop. S = M_ON. R = (NOT MASTER_EN) OR (NOT M_ON held 10 s after enable off). Q = M_LINK.
4. B104 — 2-to-1 MUX (or simply an AND with DIR: LINK_OUT = (NOT DIR AND M_LINK AND LINK_IN) OR (DIR AND M_LINK). This routes the chain in the chosen direction.

The body is roughly 12 blocks. After compilation, the calling program sees a single block with 4 pins on the left and 2 on the right. Five instances consume the same on-board resources as five free-standing networks but read as a single rung each.

3.3 Calling Network (FBD, top-level)

 +------+      +------+      +------+      +------+      +------+
 | UDF1 |--->| UDF2 |--->| UDF3 |--->| UDF4 |--->| UDF5 |
 +------+      +------+      +------+      +------+      +------+
   | |           | |           | |           | |           | |
   Q Q           Q Q           Q Q           Q Q           Q Q
   | |           | |           | |           | |           | |
   H1 LINK       H2 LINK       H3 LINK       H4 LINK       H5 LINK
   |             |             |             |             |
   +-->Q1        +-->Q2        +-->Q3        +-->Q4        +-->Q5

 For reverse order, wire LINK_OUT of UDF5 into LINK_IN of UDF4, etc.
 DIR pin on all UDFs = I1 (FWD)  // 0 for FWD, 1 for REV

Reverse Direction (H5 → H1)

Two robust methods are used in production:

10-Second Off-Delay — Why It Is Non-Trivial

The specification says "each lamp extinguishes 10 s after it was turned on" — not "10 s after the last lamp came on". A single off-delay on the entire chain is therefore wrong. Each stage needs its own timer. The off-delay block in LOGO! Soft Comfort is B005 (Off-delay) with parameter Ta = 10.0 s.

Behaviour summary of B005 in LOGO! Soft Comfort V8:

Edge-triggered variant: if the spec requires "10 s after the last rising edge of the lamp signal", use Edge-triggered off-delay (B006 in Soft Comfort). It ignores re-triggers during the timing phase, which prevents the off-time from being extended if the lamp flickers.

Multi-Page Organisation with Off-Page Links

LOGO! Soft Comfort supports sub-routines and off-page connectors (the "scissors" tool). For a 5-stage application this is overkill, but as the program grows, multi-page helps:

1. Put the UDF library on Page 1.
2. Put the calling sequence on Page 2.
3. Use a pair of off-page connectors named LAMP_BUS to carry the five lamp signals to the I/O mapping on Page 3.

Open the tool, place an off-page connector, right-click → Edit → Scissors, and a wire passing through it is split into two named halves on different pages. This is the off-page link feature referenced in the field discussion — it does not change execution, only the visual presentation.

Parameter Table for the Full Solution (UDF Method)

Commissioning Procedure

1. Connect the LOGO! base module to 24 V DC on terminals L+ and M.
2. Wire I1 to S_FWD, I2 to S_REV, I3 to MASTER_EN (or strap I3 to L+ for permanent enable during testing).
3. Open LOGO! Soft Comfort, File → New → LOGO! 8.
4. Open the UDF Editor, build the stage UDF as in section 3.2, and save it as STAGE_UDF.lma.
5. On the main FBD page, drag five STAGE_UDF instances into a single horizontal row.
6. Wire LINK_OUT of UDF1 to LINK_IN of UDF2, and so on. For reverse test, re-wire UDF5 → UDF4 → … → UDF1.
7. Set all DIR pins to a flag M_REV (0 = FWD, 1 = REV) driven by I2.
8. Map UDF1..UDF5 LAMP outputs to Q1..Q5 in the I/O list.
9. Click Simulation → Start and verify the staircase on the virtual outputs.
10. Click PC → LOGO!, choose Ethernet or USB, and download.
11. Run with the lamps connected; verify each Q output with a multimeter and observe the 10 s off behaviour with a stopwatch.

Verification Checklist

Troubleshooting Matrix

Edge Cases and Field Notes

• Power-up restart. All UDF timers in this design are non-retentive. A power cycle resets the chain; a brown-out does the same. Add retentivity only if the application explicitly requires resume-from-stage-N.
• Long sequences. The same UDF scales to 32 stages (the LOGO! shift register maximum); for longer chains, use a counter (B010 — Up/down counter) and a comparator, with the counter value selecting which lamp is on.
• Analog variants. If "10 seconds" must be operator-tunable, expose a LOGO! variable VW0 (LOGO! Soft Comfort: Parameter VM mapping) and connect it to the off-delay Ta input. The LOGO! onboard display or TDE will then let the operator edit the value without a PC.
• Web server. LOGO! 8 exposes a built-in web page. The five LAMP flags can be added to the user-defined web dashboard for remote visualisation; right-click any flag → Web server → Show on user page.
• Lamp inrush. If the lamps are LED clusters, inrush is negligible and a single Q output drives them. If they are incandescent 24 V panel lamps, inrush is 6×–10× the steady current; derate Q output to 0.3 A or interpose an external relay.

Comparison of Strategies

References to Siemens Documentation

The UDF, shift register, and asynchronous pulse generator blocks are documented in:

• LOGO! 8 System Manual (6ED1050-xxx08-0BA1) — chapters 4.4 (UDF), 4.3 (timers), 4.3.3 (off-delay).
• LOGO! Soft Comfort V8.3 Online Help — search "UDF" and "Shift register".
• LOGO! product page — for current catalog numbers and firmware status.