Siemens S5-115U CPU942 EPROM Transfer: Memory Full Fix

Problem Overview

The SIMATIC S5-115U central processing unit 6ES5 942-7UB11, fitted with the EPROM memory submodule 6ES5 375-0LA21 and an analog plus six digital I/O cards, intermittently crashes minutes after each restart. With STEP5 v7.17 the program can be uploaded, but the download aborts with a memory full error. The Overall Reset procedure only restores the green RUN LED when the EPROM is removed, and the program is never executed once the submodule is reinstalled. The machine was built in Germany and no offline backup of the program exists, so every step must protect the only remaining copy of the firmware image stored in UV-erasable silicon.

The behavior is reproducible across power cycles and is not caused by transient mains events. The fault pattern - RUN for a few minutes, then STOP, with the same time interval each time - is the classic signature of an S5-115U program memory that is being read with increasing single-bit errors. The CPU 942 does not copy the EPROM into RAM; it executes the EPROM address space in place. When the silicon cell charge has drifted below the sense-amp threshold, a read error halts the cycle and the CPU enters STOP. This article documents the diagnosis, EPROM recovery, and STEP5 v7.17 memory-management procedure for this specific failure mode, with cross-references to official Siemens support material.

Hardware Identification and Memory Architecture

Before any download or reset, confirm the exact hardware variants and the memory model that applies. The order numbers in use determine the available memory submodule options and the diagnostic flow.

The S5-115U memory model differs from the S5-100U and S5-95U models in a single, decisive way. The plug-in memory submodule on the S5-115U is an extension of the address space, not a backup that is copied into the internal RAM at startup. The internal 10 kB of CPU 942 RAM is used by the system program for data blocks (DBs), flags (M, F), timers (T), counters (C), the process image (PII / PIQ), and the cyclic scratch area. The OB, PB, FB, SB, and FX code blocks are executed directly from the EPROM (or RAM submodule, or EEPROM submodule) address window. There is no shadow copy.

Root Cause Analysis

Four failure modes commonly produce the symptoms above. Diagnose in this order, cheapest test first, most invasive last.

1. UV erasure of the EPROM window

The S5-115U rack is open-frame to allow forced-air cooling through the card cage. The same airflow path transmits light. If the EPROM's quartz window is left uncovered, ambient UV - even from a single office fluorescent tube - gradually bleeds the floating-gate charge over months or years. The failure curve is not linear: cells near the edge of the window or under a partially-crumpled light-shielding label lose charge first. The first symptom is occasional single-bit errors during block checksum verification, which the CPU catches and turns into a STOP with the red ST or BAU LED pattern. The diagnostic is visual: lift the light-shielding label covering the EPROM window and inspect for partial erasure, sticker slippage, or stickers that were never applied at all. If the silicon die is visible through the window without a die-imprint pattern (you should see the printer's logo or the Siemens part number etched into the die), the cell array may already be erased.

2. Low or missing backup battery

A weak or missing lithium backup cell in the CPU (or in the memory submodule for RAM/EEPROM types) erases retentive flags, timers, counters, and any DB contents marked as retentive. The CPU 942 uses a single 3.6 V primary lithium cell, typically Siemens 6ES5 971-0AA11 (Tadiran TL-5104, Saft LS-14500, or equivalent). When the battery voltage falls below approximately 3.0 V, the BATF LED on the CPU front lights, and on the next power-down the retentive data is lost. The CPU may enter STOP with a "BATTF" or "RAM parity" stop code on the next restart. Per Siemens SiePortal guidance on S5 CPU keeping stop mode, the first diagnostic step is to "check the battery, it may be low". Replace the battery with the power on to preserve retentive data, then proceed with the verification sequence.

3. PIW/PQW access to non-installed hardware

If the program reads or writes process-image words (PIW / PQW) for an I/O slot that is empty, swapped, or addressed differently from the hardware constants in DX0 / DX2, the cycle can fault when the bus-mastered access times out. S5-115U cards in slots 0 to 7 of the central rack occupy fixed process-image areas; a misconfigured DX0 changes the analog addressing, and a missing or swapped digital card produces a bus error on the first read. The fastest isolation technique is to insert // comments in front of suspect PIW / PQW lines in the program source and re-download. If the CPU stays in RUN with those lines masked, the addressed I/O does not exist or is misconfigured in the hardware constants. Restore the original I/O access once the slot is corrected.

4. Memory fragmentation producing "memory full" errors

STEP5 does not overwrite an existing block with the same name on download. It marks the old block as invalid (the block header's invalid bit is set) and appends the new block to the first free address in the address window. After several upload/download cycles the RAM fills with invalid (orphaned) blocks. A memory full error during download is the symptom. The fix is to compress the PLC memory, which physically removes the invalid blocks and re-packs the valid blocks at the start of the address space.

Pre-Work: Backing Up the EPROM Before Anything Else

With no source backup, every operation risks destroying the only program copy. Before any reset, compress, or download, get a stable read of the EPROM and persist it to disk.

1. Connect the PG or PC running STEP5 v7.17 to the CPU 942 via the AS-511 (TTY 20 mA current loop) or MPI interface using the appropriate Siemens cable (6ES5 734-1BD20 for AS-511, 6ES7 901-0BF00-0AA0 for MPI).
2. Select PLC > Upload to PG (German: AG > Laden auf PG). The dialog prompts for a project file. Save it with the machine serial and the date in the file name, e.g. MACHINE_4711_2024-01-15.S5D.
3. Perform a second upload immediately and diff the two .S5D projects with a hex editor or the STEP5 cross-reference generator. If the two uploads are byte-for-byte identical, the EPROM is read-stable. If they differ, the EPROM has marginal cells and the upload is non-deterministic; the silicon needs replacement.
4. After upload, export the block list (File > Export > Block List) and the cross-reference (Options > Cross-Reference) to plain text for human review.

CPU Health Verification

Before chasing the EPROM, isolate the CPU itself. With the EPROM removed, the CPU 942 should start, run an empty cycle, and remain in RUN indefinitely. The verification sequence is the official Siemens overall-reset procedure for the S5-115U family.

1. Power down the PLC by switching off the line filter or rack supply. Wait 30 seconds for the backplane voltages to discharge below 5 V.
2. Open the CPU card cage and remove the EPROM submodule 6ES5 375-0LA21 from its socket. Place it on a conductive foam mat, window-side up, away from fluorescent light and direct sunlight.
3. Hold the spring-loaded reset switch (recessed in the CPU front panel, marked RES) down with one hand using an insulated tool such as a ceramic screwdriver.
4. With the other hand, cycle the RUN/STOP toggle switch three times: STOP → RUN → STOP → RUN → STOP → RUN. Each cycle is one complete toggle motion; the third cycle ends in RUN.
5. Release the reset switch. The red STOP LED should extinguish and the green RUN LED should illuminate within 2 seconds.
6. Leave the CPU in RUN with the EPROM removed for at least 10 minutes. Confirm the RUN LED does not blink and the CPU does not restart.

Pass criterion: The green RUN LED stays on indefinitely, the red STOP LED stays off, and the CPU does not restart. If the CPU still faults, the CPU module or the backplane is suspect, not the EPROM. Swap the CPU with a known-good 6ES5 942-7UB11 (any -7UBxx variant is electrically compatible within the S5-115U family); if the replacement also faults, the backplane or power supply is at fault and the EPROM is innocent. Send the suspect CPU to an S5 refurbishment lab for EPROM/flash replacement and board-level repair.

How to Transfer the EPROM Program to CPU RAM on an S5-115U

Direct block-by-block EPROM-to-RAM transfer is not a built-in function of STEP5 for the S5-115U family. The two practical paths are listed below, ordered by operator preference.

Path A - Upload to PG, then download back to PLC

1. Perform the upload described in the Pre-Work section; persist the .S5D project to PG disk.
2. Reinstall the EPROM in the CPU socket with the power off; power the PLC back on.
3. Open the saved project in STEP5 v7.17 and select PLC > Download (German: AG > Laden in AG). STEP5 writes the blocks into the internal RAM area in addition to the EPROM-resident copies.
4. STEP5 marks the existing EPROM-resident blocks with the same name as invalid and writes the new block to the first free RAM address. To reclaim the address space, run PLC > Compress PLC Memory (next section).

Path B - Read the EPROM with a Siemens PG or third-party EPROM programmer

The classic S5 PG (PG 615, PG 635, PG 685, PG 710, PG 720, PG 730, PG 750, PG 770) carries an EPROM programming socket on its rear or side. Insert the 6ES5 375-0LA21, read it with the PG's EPROM utility, and save the image to floppy as a binary file. The binary image is then downloadable through any S5 AS-511 or MPI port into the target CPU's internal RAM using STEP5. Third-party EPROM programmers can also read the 6ES5 375-0LA21 because it is functionally a 27C256 (256 kbit / 32 kB) UV-erasable EPROM in a 28-pin CERDIP package. Verify the byte order with a known-good dump first; the S5 stores code blocks in little-endian 16-bit words, and the EPROM image is byte-swapped relative to a raw 27C256 read on some programmers.

Resolving the "Memory Full" Error During Download

STEP5 never overwrites an existing block. It flags the existing block as invalid (header invalid bit) and writes the new block to the first free address. After several upload/download cycles the internal RAM fills with invalid blocks; subsequent downloads fail with a memory-full message even though the program size is small. The fix is the compress command.

1. In STEP5 v7.17, choose PLC > Compress PLC Memory (German: AG > AG-Speicher verdichten). The keyboard shortcut is Ctrl+Shift+F2 in STEP5 v7.x; older v6.x and v5.x use the menu path only. The keyboard shortcut varies by STEP5 version; the menu path is stable across all versions.
2. Confirm the prompt when STEP5 asks to perform the compression. STEP5 stops the CPU briefly, removes the invalid blocks, re-packs the valid blocks at the start of the RAM address window, and re-starts the CPU.
3. Re-attempt the download. It should now succeed with a Download complete message.

For larger programs, switch to a 64 kB (32 k statement) EPROM such as the 6ES5 375-0LC21. Verify that the CPU 942 firmware revision supports the larger submodule; the -7UB11 variant does support 8/16/32/64 kB submodules, while earlier -7UAxx variants are limited to 32 kB. If the program is larger than 64 kB and the application is critical, the path forward is a migration to S7-300 with an S5-to-S7 converter; the CPU 942 cannot address more than 64 kB of code in a single submodule.

Step-by-Step Block Download Procedure

If compression does not resolve the issue, or if the upload still mismatches the running program, perform a block-by-block download as recommended by Siemens SiePortal for S5 PLC error conditions. The block-by-block approach isolates the offending block when there is a logic fault or a corrupted block header.

1. Power off the PLC for at least 10 minutes to fully discharge the backplane and clear any residual RAM charge. This is longer than the typical 30 seconds because some capacitor-backed circuits on the analog card retain state for several minutes.
2. Power on. Perform an overall reset (cycle RUN/STOP three times as in the CPU verification section).
3. Download all DBs first, one DB at a time. After each DB, observe the RUN LED for 5 seconds. Note any DB that causes the CPU to drop to STOP; that DB is the leading candidate for the fault.
4. Download PB, FB, and OB blocks one at a time. Pause 3 seconds between blocks and observe the RUN LED. If the CPU drops out of RUN after a specific block, that block is the fault origin. The OB1 (cyclic main) and OB21/OB22 (restart) blocks are the most common culprits because they are executed at every cycle and at every restart.
5. Do not download all blocks at once during a recovery operation. A cascading fault across multiple blocks makes root-cause isolation impossible.
6. Once all blocks are downloaded and the CPU is in RUN, perform a final compress to clean up the address space.

EPROM UV-Damage Verification and Recovery

Once the program is safely backed up to the PG, verify the EPROM itself. Read it in the PG's EPROM socket (or in a third-party 27C256-compatible programmer) and compare against the saved image byte-for-byte. Any mismatch confirms partial erasure; a fully erased EPROM reads as 0xFF in every byte.

Recovery options for an erased or partially erased EPROM

• Re-blow a new EPROM: Use a Siemens PG EPROM utility or a third-party programmer (EPROM type 27C256, access time 150 ns or faster, in the 6ES5 375-0LA21 pinout) to program a fresh 6ES5 375-0LA21 or a compatible blank 27C256. Apply a fresh light-shielding sticker over the new EPROM's window before installation. Siemens ships new EPROMs with the sticker already applied; if the sticker is missing, replace it with a 10 mm x 10 mm piece of opaque electrical tape.
• Migrate to EEPROM (6ES5 375-1LA21): Electrically erasable, no UV window, no erasure risk. Verify the CPU firmware revision supports EEPROM submodules of that size; the CPU 942 -7UB11 does. The EEPROM is pin-compatible with the EPROM in the CPU 942 socket and uses the same STEP5 download path.
• Apply a UV-opaque cover: For temporary operation while a replacement is sourced, cover the EPROM window with electrical tape and reduce ambient fluorescent light exposure. The cover is a stopgap; the silicon is still losing charge and will eventually fail again.

Battery Replacement Procedure

The CPU 942 uses a single 3.6 V primary lithium cell, located in a holder on the CPU front panel. The cell is hot-swappable: replacing it with the PLC powered on preserves the retentive data in internal RAM.

1. Verify the BATF LED state on the CPU front. If lit, the battery is below the warning threshold.
2. Open the battery compartment on the CPU front. The cell is a single AA-sized lithium thionyl chloride cell (Siemens 6ES5 971-0AA11, Tadiran TL-5104, or Saft LS-14500). Observe the polarity markings on the holder; the positive terminal is typically marked + on the right side of the holder as viewed from the front.
3. Remove the old cell and insert the new cell with the polarity matching the holder marking. The BATF LED should extinguish within 30 seconds if the new cell voltage is above 3.4 V.
4. Mark the install date on the new cell with a permanent marker. Replace every 3-5 years as preventive maintenance.

PIW/PQW Diagnostic Procedure

To isolate a process-image access fault, perform a targeted PIW/PQW search in the STEP5 source and mask the suspect lines.

1. In STEP5 v7.17, open the saved .S5D project.
2. Use Options > Cross-Reference (or the keyboard shortcut Ctrl+Alt+F7) to generate a cross-reference. Filter on PIW and PQW to list every process-image access in the program.
3. For each PIW/PQW address, identify the corresponding I/O card slot. The address-to-slot mapping is in DX0 (digital) and DX2 (analog). The S5-115U default mapping places slot 1 at PIW 0, slot 2 at PIW 4, and so on for digital cards, and the analog card at PQW 256 for the first analog output channel.
4. Open the block that contains the suspect PIW/PQW. Insert // at the start of the line to comment it out. Save the block.
5. Download the modified block to the CPU. If the CPU stays in RUN, the masked PIW/PQW was the fault origin. If the CPU still drops to STOP, the fault is in another block or in the hardware constants.
6. Restore the original line, address the missing I/O correctly (re-seat the card, replace the card, or update DX0/DX2), and re-download.

Cable and Communication Settings

The CPU 942 has two communication interfaces: a 20 mA TTY current-loop interface for the AS-511 protocol (used by the classic S5 PGs and by STEP5 v7.17 with the 6ES5 734-1BD20 cable) and an MPI interface (used by STEP7 and by STEP5 v7.x with the 6ES7 901-0BF00-0AA0 cable, depending on firmware revision). The COM port settings on the PG side are 9600 baud, even parity, 8 data bits for AS-511, or the MPI defaults of 187.5 kbaud for MPI.

For a serial COM port on a modern PC without a native RS-232 or TTY port, use a USB-to-TTY adapter with the FTDI FT-X series chip set. Configure the COM port number in STEP5 under Options > Set PG/PC Interface to match the COM port assigned by the adapter driver.

Diagnostic Decision Matrix

Preventive Measures for Operating S5-115U Systems

• Replace the lithium backup battery every 3-5 years; mark the install date on the cell with a permanent marker, and log the date in the maintenance record.
• Cover all EPROM windows with the factory light-shielding label; replace labels that curl, peel, slip, or were removed for diagnostics. Use electrical tape as a field replacement if the original label is unavailable.
• Maintain at least one offline backup of the project, exported as a STEP5 .S5D file plus a hex dump of the EPROM image. Store the backup on at least two media (PG disk plus network share, or PG disk plus USB stick).
• Run PLC > Compress PLC Memory before every planned download session on a CPU with a long edit history. The compress operation is non-destructive to running programs but does cause a brief STOP-RUN transition.
• Add an Operator Panel Reorganize prompt only if the deployment site demands it; a panel-driven reorganization during a running process can drop the CPU into STOP if the panel is connected to the same interface and the reorganization conflicts with the cyclic OB1.
• Document the block list and the cross-reference in a printed machine manual. S5 documentation is increasingly rare; a paper copy is the only insurance against disappearing support resources.

Verification Procedure After Repair

1. With the EPROM (or replacement EPROM/EEPROM) installed, perform a full overall reset (cycle RUN/STOP three times as in the CPU verification section).
2. Download the saved .S5D project from PG to PLC. Observe the compress warning if it appears; accept and continue. The download should complete in under 60 seconds for a 32 kB EPROM.
3. Power cycle the PLC. The CPU should come up to RUN within 5 seconds and stay there.
4. Force a few I/O points via STEP5 Force dialog (or via the operator panel if one is present); verify the force value in the process image and on the field wiring with a multimeter or scope.
5. Leave the machine in automatic for at least 30 minutes; older UV damage sometimes only manifests as cycle-time errors after a long thermal run. Monitor the cycle time with PLC > Information > Cycle Time; a creeping cycle time indicates a marginal EPROM cell.
6. Document the final block list and the date of the new EPROM/EEPROM installation in the machine manual.

Inline Diagnostic Flowchart

Memory Architecture Diagram (S5-115U CPU 942)

Related Siemens Documentation

For deeper reference on the S5 family stop-mode behavior, block-by-block recovery procedure, and the CPU 928B architecture used in the S5-135U/155U, the following official Siemens resources apply directly.

• Siemens SiePortal: S5 CPU keeping stop mode - first-action guidance for battery, panel, and reorganization causes of persistent STOP.
• Siemens SiePortal: S5 PLC error - block-by-block download procedure and 10-minute power-off recommendation.
• Siemens Industry Online Support: S5-135U CPU 928B Programming Guide (PDF) - in-place-execution memory model and restart/error block structure shared with the S5-115U family.
• Siemens Industry Online Support portal at support.industry.siemens.com for STEP5 v7.17 manuals, CPU 942 datasheets, and spare-parts ordering for the 6ES5 971-0AA11 lithium cell.

Frequently Asked Questions