Siemens STEP 7: Converting STL Networks to LAD - Complete Guide

Overview

Statement List (STL, also called AWL) and Ladder Diagram (LAD) are two of the three IEC 61131-3 languages supported by Siemens SIMATIC S7-300, S7-400, S7-1200, and S7-1500 controllers. STL is a textual, accumulator-oriented instruction set optimized for compact code, indirect addressing, and bit-level RLO manipulation. LAD is a graphical, contact-and-coil representation that engineers use for intuitive diagnostics on plant floors. STEP 7 V5.x (SIMATIC Manager) and TIA Portal both allow programmers to view and edit any block in either language, and both ship a Source <-> LAD/FBD converter that materializes graphical boxes from textual statements.

That converter is not lossless. When STEP 7 encounters STL constructs that have no graphical equivalent - or that depend on language features LAD cannot safely represent - it leaves the network in STL and marks it with the editor comment // NETWORK : STL. The block continues to compile, the code executes correctly, and the rest of the block may render cleanly in LAD, but the affected networks stay textual. This is a common field experience: most of OB1 converts, network 1 and network 14 stay STL, and a handful of FC1 networks remain STL. The user can debug the program, but cannot view the entire block graphically.

This article explains every category of STL that refuses conversion, the editor settings that gate implicit type promotions, and the exact restructuring steps that produce a clean 100% LAD view of OB1, FC, and FB blocks on S7-300/400/1200/1500 controllers.

Prerequisites

Before attempting conversion, verify the following:

• Tooling: STEP 7 V5.5 SP4 or later for S7-300/400, or TIA Portal V15 or later for S7-1200/1500 targets. The LAD/FBD editor in earlier versions lacks the type-check toggle described below.
• Project state: target FB/FC/OB open in editable state, not in read-only or monitored-only mode. Online editing on a running CPU does not allow view-as-LAD while the block is locked by the test mode.
• Symbolic resolution: the symbol table compiled without errors; all symbolic names resolve to valid addresses. Unresolved symbols cause the converter to fall back to STL.
• Block consistency: all referenced DBs (DB40, DB41 in the canonical example) exist in the project and are not flagged as inconsistent. Check block consistency under the program folder must return zero errors.
• Reference data: reference data generated (PLC > Generate Reference Data in STEP 7 V5.x, or Project > Compile > Software (rebuild) in TIA Portal) so jump labels and address usage can be cross-checked.
• Backup copy: export the source via File > Export > Source Files and save the .scl or .awl file outside the project. This is your recovery point if the rewrite breaks a parameter binding.

Categories of Non-Convertible STL

The conversion tool checks each STL instruction against a finite allowlist of graphical operators. Five conditions commonly cause a network to stay in STL.

1. Calls with parameter-style arguments that mix symbolic and absolute addressing in ways the LAD box generator cannot reconstruct. The editor produces a box only when the parameter list fits its internal parser schema; one malformed entry forces the whole network to fall back to STL.
2. Conditional jump labels (JC, JCN, JCB, JNB, JU). LAD expresses flow control as enable rails and EN/ENO boxes, not as JC M001 + M001: NOP 0 pairs.
3. Indirect memory access using pointer arithmetic, area-crossing, or OPN DB n followed by DBX/DBW/DBD with offsets computed in AR1/AR2.
4. Word-level bit operations that depend on the implicit accumulator - the classic L #IN0 / L 1 / ==I / = M 0.4 pattern. With the strict type check on, the editor refuses the BYTE-to-INT widening; with it off, the network converts but the project becomes fragile.
5. Instructions with no LAD/FBD equivalent: INVI (16-bit ones-complement invert), CAW, CAD, RLD, RRD, RLDA, RRDA, plus the conversion family DTR, ITD, BTI, ITB, DTB, BTD.

The canonical STL example from the field includes all five categories in just two blocks:

// OB1, Network 1 - CALL with parameter arguments + conditional jump
CALL FB 101 , DB40
IN0 :=DB41
IN1 :=TRUE
OUT2:=MW34
OUT3:=MW36
A DB40.DBX 9.1
JC M001

// OB1, Network 14 - Jump target / second CALL
M001: NOP 0
CALL FB 101 , DB40
IN0 :=DB41
IN1 :=FALSE
OUT2:=MW38
OUT3:=MW40

// FC1, Network 1 - Word comparison + assignment
L #IN0
L 1
==I
= M 0.4

Network 1 combines a multi-instance CALL with a RLO-driven JC. Network 14 is a jump label that anchors the target. FC1 Network 1 uses a BYTE-vs-INT comparison that the strict type checker refuses to render in LAD.

Pre-Conversion Audit

Run this audit before editing:

1. Identify every jump - JC, JCN, JCB, JNB, JU - in the block. For each, locate the matching label Mxxx: or CASx:. These pairs must be restructured before the converter will accept the surrounding network.
2. Identify every CALL FB/FC with parameter-style arguments. Single-instance calls without parameters convert to a simple box. Multi-instance calls with INxx := and OUTxx := may or may not convert depending on the editor version and the parameter types of the called block.
3. List every L / T / ==I / <>D / >=R chain. These require the type-check to be relaxed or the operands to be moved into a temporary INT first.
4. Search for INVI, CAW, CAD, RLDA, RRDA. These instructions have no LAD/FBD equivalent in the standard library.
5. Check for OPN DB n + computed DBX[AR1/AR2]. This pattern is unconvertible in every Siemens release to date and is the strongest signal that the engineer should accept STL for that block and stop trying.

Save the audit as a worksheet; you will use it to plan the rewrite. The Siemens Industry Online Support entry ID 16726454 - STL to LAD conversion is the canonical reference for the limitations list and should be bookmarked before you start.

Editor Configuration: Type Check of Address

The Type Check of Address toggle controls whether the editor enforces strict data-type compatibility in LAD/FBD boxes. It is the single most useful setting for partial-conversion recovery, and the only setting that determines whether FC1 Network 1 above converts or stays STL.

STEP 7 V5.x (SIMATIC Manager) Path

1. Open the block in the LAD/STL/FBD editor.
2. Menu: Options > Customize...
3. Tab: LAD/FBD (in older releases: Editor > LAD/FBD).
4. Checkbox: Type Check of Address - uncheck to allow byte/word operands to feed INT/DINT compare boxes.
5. Click OK, then re-open the block.

TIA Portal Path

1. Open the block in the program editor.
2. Menu: Options > Settings.
3. Expand PLC programming > LAD/FBD.
4. Uncheck Type check of addresses.
5. Apply and re-open the block.

When the toggle is on (default), the editor rejects the FC1 Network 1 pattern because #IN0 (declared as BYTE in the IN interface) is loaded into ACCU1 and compared against the constant 1 (INT). With the toggle off, the editor accepts the implicit BYTE→INT widening and renders the network in LAD as a CMP==I box with the byte operand on the left and the integer constant on the right.

// Preferred LAD equivalent of FC1 Network 1
// Assumes TEMP_INT declared in FC1's TEMP area
LAD Network 1:
  [ MOVE  ]
   EN      := TRUE
   IN      := #IN0              // BYTE input
   OUT     := #TEMP_INT         // INT temp (declared in TEMP)
  [ CMP==I ]
   EN      := TRUE
   IN1     := #TEMP_INT
   IN2     := 1
   OUT     := %M0.4

The MOVE widens BYTE to INT explicitly. With the type check back on, the editor accepts the compare, the source remains strict-typed, and the converted LAD view survives subsequent refactors.

Restructuring Conditional Calls and Jumps

Multi-instance calls with input and output parameters convert to a CALL box in LAD with the parameter list rendered inside the box, provided the called FB itself is convertible. The converter may leave the network in STL when:

• The CALL sits inside a JC/JCN condition (the RLO dependency is not graphically representable as a box wiring).
• The output parameters use MW ranges that overlap with the input parameters (aliasing across the box boundary).
• The IN/OUT parameter is itself a multi-element array passed by symbolic name.

Fix Pattern: Extract the Conditional Call

Refactor the parent network so that the contact that drove the JC now drives the EN input of the CALL box. This is the canonical LAD idiom for conditional execution and is what the converter expects.

// Original OB1 Network 1 (STL)
CALL FB 101 , DB40
IN0 :=DB41
IN1 :=TRUE
OUT2:=MW34
OUT3:=MW36
A DB40.DBX 9.1
JC M001

Becomes:

// OB1 Network 1 (LAD after restructuring)
[   ]   DB40.DBX9.1
|--| |--+----[ CALL FB101, DB40 ]--
        |    IN0  := "DB41"
        |    IN1  := TRUE
        |    OUT2 := %MW34
        |    OUT3 := %MW36

// Networks 2..13 (the jumped-over logic) - no M001 label needed

// OB1 Network 14 - executes unconditionally as the second scan path
[ CALL FB101, DB40 ]
    IN0  := "DB41"
    IN1  := FALSE
    OUT2 := %MW38
    OUT3 := %MW40

Execution parity is preserved: when DB40.DBX9.1 is true, the EN input is high and the first CALL runs. When it is false, the second CALL runs in the next network. The JC M001 and M001: NOP 0 pair are eliminated entirely.

Four-Step Jump Conversion Procedure

LAD does not have unconditional jumps. Every JC, JCN, JCB, JNB, JU must be re-expressed.

1. JC label (jump if RLO=1): put the body of the conditional-call in series with the condition; the label box is placed at the original jump target.
2. JCN label (jump if RLO=0): invert the condition with a normally-closed contact.
3. JCB label (jump if RLO=1 with BR): use the same wiring; the BR bit is implicit in LAD EN/ENO propagation.
4. JU label (unconditional): replace with the label box only - LAD execution falls through naturally.

The jump label Mxxx: NOP 0 becomes a label box [ Mxxx ] in TIA Portal, or is omitted entirely in STEP 7 V5.x when the restructured CALL pattern is applied. The label is a placeholder; once the EN-driven CALL replaces the JC, the label is unreachable code and should be deleted.

Replacing Non-Convertible Instructions

The following STL instructions have no direct LAD/FBD box. For each, create an FC that wraps the operation, then call that FC from the network - the call box converts cleanly. This is the technique Siemens itself recommends in FAQ 16726454.

Each replacement FC is a 3-line STL block:

// FC_INVI_WORD - STL wrapper for the INVI instruction
// Input:  IN  (WORD)
// Output: OUT (WORD)
L  #IN
INVI
T  #OUT

Once compiled, the call sites convert to standard LAD boxes. Mark each wrapper FC with the comment // STL-wrapper for <instruction> so the next engineer understands the indirection.

Step-by-Step Conversion Procedure

1. Export the source: File > Export > Source Files and save a .scl/.awl copy outside the project.
2. Open the block in the LAD/STL/FBD editor.
3. Configure the editor (Options > Customize > LAD/FBD > Type Check of Address: OFF).
4. Switch the view to STL: View > STL. Read every network. Build the audit worksheet described above.
5. Restructure network-by-network:
   1. Replace each JC/JCN with contact-driven EN logic.
   2. Replace each L #IN0 / L 1 / ==I / = M 0.4 chain with a MOVE + CMP==I pattern in a temp.
   3. Replace each INVI with a call to FC_INVI_WORD.
6. Switch the view to LAD: View > LAD. If a network still shows as STL, drill into it, identify the offending instruction, and apply the corresponding fix from the table above.
7. Compile the block. Resolve any remaining syntax errors. The compiler reports line numbers tied to the STL view; the conversion report appears in the diagnostic buffer.
8. Cross-check the symbol table for any addresses that lost their symbolic binding during the MOVE refactor.
9. Re-enable the type check after conversion if you used the relaxed setting, then re-compile and re-fix any network the strict checker now rejects.
10. Save and download to the target PLC. Monitor the block to confirm execution parity with the original.

Verification and Validation

Converted code is functionally equivalent only if you verify three properties.

1. Execution parity: connect online and observe the same outputs in the same scan order. Use Monitor/Modify in STEP 7 V5.x or the Watch table in TIA Portal to step through the first 50 cycles. The output MW34, MW36, MW38, MW40 in the running example must trace the same values as the original STL.
2. Timing parity: the RLO-driven CALL with EN input executes once per scan when EN is true, identical to the original A+JC pattern. The only risk is if the original used JC to skip a CALL that had side effects in its instance DB; in that case, the converted call would fire erroneously. Cross-check the FB's instance DB against the original by inspecting DB40 contents before and after the call.
3. Type parity: with the type-check toggle OFF, the converter may accept operations that overflow or truncate silently. For each relax-typed network, manually substitute a MOVE+compare or MOVE+arithmetic pattern, then re-enable the toggle and re-compile. The strict-typed compilation must succeed with zero warnings before the conversion is considered production-ready.

Reading STL Directly

When full conversion is impossible (for example, the block uses extensive indirect addressing, or wraps legacy code that no one is willing to refactor), the most efficient alternative is to learn the STL primitives. The IEC 61131-3 standard guarantees that any language can express any algorithm; STL is the lowest-level S7 language and is the most direct match for the CPU's native instruction set.

Useful references:

• S7-300/400 Programming with STL/FBD/LAD - the canonical STEP 7 V5.x reference.
• STEP 7 Basic/Professional V15.1 in TIA Portal - the modern TIA Portal programming manual.
• SIMATIC S7-1500 System Manual - S7-1500 instruction set and address model.
• Entry ID 16726454 - STL to LAD conversion FAQ - the conversion limitations list.

The STL reference card in the SIMATIC documentation covers L, T, A, O, AN, ON, X, XN, =, S, R, JC, JCN, JU, JCB, JNB, JL, LOOP, CALL, CC, UC, INVI, CAW, CAD, RLDA, RRDA, and the full bit/word/DWord instruction set. Knowing these 30 opcodes is enough to read 95% of field-deployed STL.

Additional local documentation is installed with STEP 7: in SIMATIC Manager, the Documentation directory under the Start menu contains First Steps with STEP 7 and Working with STEP 7, which walk through FB, FC, and DB usage in the context of converting legacy programs.

Best Practices

• Always keep a .scl/.awl source export for every block; the editor's view as LAD never replaces the source.
• Use the relaxed type check only for one-shot conversion work, never as a project-wide default.
• Prefer MOVE-into-temp for type promotions; the resulting code is portable between STEP 7 V5.x and TIA Portal.
• When wrapping a non-convertible instruction in an FC, mark that FC with the comment // STL-wrapper for <instruction> so the next engineer understands the indirection.
• Reserve STL for the bottom 5% of any program: indirect addressing, pointer arithmetic, and atomic bit operations. Write the rest in LAD, FBD, SCL, or GRAPH.
• Document every JC label with a comment describing the state of the RLO at the jump point; a converted LAD program loses the implicit RLO chain and the comment is the only link to the original semantics.
• Run a final consistency check (PLC > Check Block Consistency in STEP 7 V5.x, or Project > Compile > Software in TIA Portal) after every conversion pass. The compiler reports type mismatches and unresolved symbols that the visual converter silently accepts.

FAQ