Siemens STEP 7 STL to LADDER Conversion: Methods and Limitations

Statement List (STL) and Ladder Diagram (LAD) are both IEC 61131-3 programming languages supported by STEP 7 (SIMATIC Manager V5.x) on the S7-300 and S7-400 platforms. While the editor provides a one-click toggle between views, STL programs frequently fail to convert when they contain indirect addressing, pointer arithmetic, or accumulator-based logic that has no direct graphical equivalent. This reference explains the exact procedure for forcing a conversion, lists every instruction category that the compiler rejects, and provides field-tested workarounds for the most common blocking constructs.

1. STL, LAD, and FBD Language Profiles in STEP 7

STEP 7 stores every program block (OB, FB, FC, DB) in a single internal SCL/STL representation. The view toggle (View > LAD, View > FBD, View > STL) does not transform logic — it asks the compiler to render the same instructions in a graphical form. The render fails silently for any segment whose instruction mix has no graphical primitive.

Because LAD and FBD share the same allowed instruction subset, converting STL to either is governed by one rule set. The remainder of this document refers to LAD, but FBD follows identical selection logic.

2. Prerequisites

Confirm the following before attempting conversion:

1. STEP 7 V5.4 SP5 or later installed, with the S7-SCL optional package if SCL blocks are present.
2. Project access offline — open the project in SIMATIC Manager and double-click the block to enter the editor. Online blocks downloaded from the CPU cannot be re-edited in LAD; they must first be uploaded to the offline project via PLC > Upload Station to PG.
3. Source file (optional but recommended) — if the project contains .s7p / .s7l STL source files, regenerate the blocks before conversion. STL source is the canonical text and recompiles cleanly.
4. No active online connection to the CPU while editing; otherwise the editor opens read-only.
5. Know the program structure: count segments with Edit > Go To > Segment Number and identify any that use the instructions listed in Section 4.

3. The One-Click Toggle and Why It Fails

Clicking View > LAD (or pressing Ctrl+K shortcut, then selecting LAD) initiates a per-segment parse. Each STL segment is examined in isolation:

1. The first instruction must map to a power rail (LAD) or a signal input pin (FBD).
2. The logic chain must be expressible with contacts, comparators, SR/RS flip-flops, timers, counters, arithmetic boxes, and jump boxes.
3. Branch operations must form an ordered tree — not a parallel/parallel-on-parallel-of-parallel net that exceeds the editor nesting depth.

If any segment fails the parse, STEP 7 leaves the entire block in STL — it does not partially convert. This is the most common cause of the symptom reported by users who click Display LAD and see nothing change.

4. Instructions That Cannot Be Converted to LAD

The following STL instruction categories have no graphical equivalent and will silently block conversion of the containing segment:

5. Step-by-Step STL to LADDER Conversion Procedure

1. Open the block in the editor. In SIMATIC Manager, navigate to S7 Program > Blocks, right-click the target block (FB/FC/OB) and choose Open Object, or double-click it.
2. Verify the editor is in STL. The bottom-right status bar reads STL. If it reads LAD or FBD, switch to STL first via View > STL so you can see what the compiler is rejecting.
3. Inspect each segment. Use the segment navigator on the left margin. For each segment, mentally check against the Section 4 list. Segments that obviously contain pointer loads or indirect addressing are guaranteed conversion blockers.
4. Split offending segments. Place the cursor at the end of the first non-blocker line, press Ctrl+Enter or use Insert > Segment, and move the blocking instructions into the new segment(s). Repeat until every segment contains only convertible STL.
5. Switch to LAD. With the block open, click View > LAD (or press F9 in some keyboard maps; the standard shortcut is View > LAD). The compiler parses segment-by-segment.
6. Watch the status bar. A successful conversion keeps the cursor inside the graphical view; the segment header shows ladder rungs. If the editor reverts to STL, the offending segment retains its original text and the cursor jumps to it — fix that segment and retry.
7. Save and compile. File > Save, then PLC > Consistency Check to validate the block.
8. Download to the CPU via PLC > Download if the program structure has changed.

6. Splitting Complex Networks for Conversion

The cleanest way to split a complex STL block is to preserve program behavior exactly. The classic technique is to materialize an intermediate bit or memory word between two sequences that would otherwise share an accumulator value.

Before (STL, single segment, will not convert):

A   I 0.0
L   MW 10
+   1
T   MW 12
A   M 1.0
=   Q 4.0

After (LAD, two segments):

// Segment 1
A   I 0.0
JCN _SKIP
L   MW 10
+   1
T   MW 12
_SKIP: NOP 0

// Segment 2
A   M 1.0
=   Q 4.0

The first segment uses JCN (jump if RLO = 0) plus a NOP 0 label as a sink, which LAD renders as a --(\label) box. The JCN instruction itself converts to a graphical jump coil (--("label")) at the end of a rung. NOP 0 at the label target is invisible to LAD and required only so the assembler does not flag the label as undefined.

Pattern: Split-and-Materialize for Multi-Coil Logic

STL allows parallel assigns from one RLO. LAD does not. Use this rewrite:

// STL (won't convert):
A   I 0.0
A   I 0.1
=   Q 4.0
=   M 1.0
=   DB1.DBX 2.0

// LAD-friendly:
// Segment 1
A   I 0.0
A   I 0.1
=   M 0.0    // intermediate flag

// Segment 2
A   M 0.0
=   Q 4.0

// Segment 3
A   M 0.0
=   M 1.0

// Segment 4
A   M 0.0
=   DB1.DBX 2.0

The extra scan-time cost is negligible (single-bit RLO read) and the result is graphically convertible, IEC-61131-3 compliant, and easier to maintain.

7. Manual Conversion Patterns and Workarounds

7.1 Pointer loads (L P#x.x)

Pointer literals are almost always used as inputs to indirect memory access or to initialize address registers for loops. Replace the pointer literal with an inline constant in the destination instruction if the address is static:

// STL (pointer-driven):
L   P#M 10.0
LAR1
L   MW [AR1,P#2.0]
T   MW 20

// LAD-friendly equivalent (static address):
L   MW 12        // = MW (10.0 byte-offset 2 = MW12)
T   MW 20

If the offset is truly dynamic, keep the segment in STL and isolate it inside its own FC. Comment it as // STL: indirect addressing — cannot render in LAD and place it at the end of the FC after all convertible segments so the rest of the block still renders.

7.2 Indirect loads (L IW [AR1,P#2.0])

Indirect addressing is sometimes replaceable with an indexed DB access using the S7 DB[DI] mechanism. If not, leave the segment in STL — this is a permanent limitation, not a bug. Document the segment with a comment block so future readers understand why.

7.3 Loop (LOOP) and backward jumps

Replace LOOP with a counter-down + conditional jump pattern that the editor can render:

// STL LOOP:
L   MW 100        // loop counter
BACK: T   MW 100
... body ...
L   MW 100
LOOP BACK

// LAD-friendly:
// Segment 1: initialize
L   L#0
T   MD 100

// Segment 2: counter check & body
A   M 0.0         // run enable
JCN ENDLP
L   MD 100
L   L#1
+D
T   MD 100
... body ...
ENDLP: NOP 0

Use JC (jump if RLO = 1) to skip the body when the loop is complete, which LAD renders as a coil element.

7.4 Master Control Relay (MCR)

MCR is deprecated. Siemens recommends replacing every MCR(/)MCR block with an enable flag (A M 0.7) gating the affected assignments. This both converts cleanly to LAD and avoids the dependency on the MCR bit behavior on modern firmware.

8. Handling the Download Step

If the conversion changed the block's source representation, you must download to the running CPU:

1. Establish an online connection — PLC > Display Accessible Nodes, then PLC > Connect to Target System. The yellow online indicator in the status bar must be lit.
2. Stop the CPU if the block is used in OB1 — PLC > Operating Mode > Stop. For FBs/FCs called from cyclic OBs, a download in RUN is supported (S7-300/400 "Download in RUN") only if PLC > Download offers it; otherwise stop is mandatory.
3. Drag the converted block from offline Blocks folder to the online CPU folder, or use PLC > Download from the editor.
4. Confirm the dialog — STEP 7 will warn if the block interface changed. Click OK only after verifying no instance DBs reference the changed FB with mismatched IN/OUT/STAT signatures.
5. Restart the CPU (cold restart OB100 or warm restart OB101) only if the modification requires re-initialization. A pure view change in STL↔LAD does not require restart — the compiled machine code is identical.

9. Verification After Conversion

Confirm the conversion produced behaviorally identical code:

1. Consistency Check: PLC > Consistency Check (or Edit > Check Block Consistency) reports unresolved labels, invalid jump targets, or interface mismatches.
2. Cross-reference: Options > Reference Data > Display and search the converted block. Every operand in the original STL must appear exactly once in the cross-reference (or N times if the same tag was used N times in the original).
3. Program Status test: Connect online, Debug > Monitor (or click the eyeglass icon). Cycle through the segments and observe RLO, STA, and the operand values. Power-flow lines on the ladder must light up identically to the equivalent STL evaluation.
4. Stack / BR test: If the original STL relied on BR (binary result) bit for chaining calls (e.g., UC FB1 followed by A BR), manually insert --(SAVE) coils at the right place after conversion. LAD hides the BR-handling pattern in the compiler, so verifying with Monitor is essential.
5. Force / watch tables: Open Insert > S7 Block > Variable Table (VAT), define the test I/Q/M tags, force inputs, and walk through every ladder rung with the table open.

10. Troubleshooting Common Conversion Errors

11. When to Leave the Block in STL

Forcing every block into LAD is not a goal. The IEEE/IEC 61131-3 standard explicitly endorses mixed-language projects: STL where indirect addressing is required, LAD where scan-flow clarity matters, SCL where structured data and loops dominate. The Siemens programming guideline Programming and Operating Manual SIMATIC S7-300 and the S7-400 reference manual both treat the three editors as interchangeable rendering modes for compatible subsets, not as targets.

Practical rule: if a block is documented, version-controlled, and uses STL for legitimate reasons (dynamic DB selection, pointer arithmetic, mid-scan arithmetic cascades), keep it in STL. Reserve LAD for relay-style discrete logic, safety circuits, and HMI-tagged I/O. Reserve SCL for math, array processing, and recipe handling.

12. Quick Reference: STL-to-LAD Compatibility Matrix

FAQ