Troubleshooting S7-1200 CPU 1212FC Q0.0 Q0.1 Outputs Not

Problem Description

On a SIMATIC S7-1200 CPU 1212FC DC/DC/DC (MLFB 6ES7212-1AF40-0XB0), four of the six onboard digital outputs switch correctly, but Q0.0 and Q0.1 remain inactive. The output LEDs stay off even after a forced write from the PLC's watch table, and the field-side terminal measures 0 V DC where 24 V DC is expected. Outputs Q0.2, Q0.3, Q0.4, and Q0.5 continue to function normally, which rules out a power supply or common-MISS fault and narrows the fault to either the two output channels themselves or the function blocks that are taking exclusive control of them.

This failure pattern is one of the most reported output anomalies on the S7-1200 platform, and in the vast majority of cases the cause is not hardware damage but a PTO/PWM resource assignment inside the TIA Portal hardware configuration. The onboard pulse generators (PTO1 through PTO4, PWM1 through PWM4) physically bind to the first two high-speed output pairs of the CPU, and once a pulse generator is enabled, those output points are reserved for motion or PWM use and cannot be driven by the standard process image or the %Q0.x output address.

Affected Hardware and Firmware

The troubleshooting procedure in this document applies to the SIMATIC S7-1200 fail-safe compact CPU family listed in the table below. Confirm the exact MLFB and firmware version on the side label of the CPU before applying any of the steps.

The fail-safe designation (FC) adds the yellow label regions and PROFIsafe support, but the digital output map and PTO/PWM resource layout are identical to the standard S7-1200 CPU 1212 in this form factor. Always reference the official CPU 1212FC DC/DC/DC data sheet (PDF) and the Siemens product support page for 6ES7212-1HF40-0XB0 for the latest firmware compatibility statement before commissioning or upgrading.

Output Architecture of the CPU 1212FC

The CPU 1212FC DC/DC/DC exposes six 24 V DC sourcing (high-side) outputs on terminals Q0.0 through Q0.5. They share a common 24 V sensor supply feed and return on the M terminal block. Output pairs Q0.0 / Q0.1 and Q0.2 / Q0.3 are the high-speed channels; they can be used as ordinary outputs, as 100 kHz PTO outputs, or as PWM outputs at the same frequency range. The on-board wiring is documented in the CPU 1212FC wiring diagrams in the TIA Portal cloud docs.

Key electrical parameters for the digital outputs on a 1212FC DC/DC/DC:

Root Cause: PTO / PWM Resource Claim on Q0.0 and Q0.1

The most common reason Q0.0 and Q0.1 stop responding on an S7-1200 is that the CPU's PTO1 / PWM1 generator has been enabled in the device configuration. When PTO1 or PWM1 is enabled, TIA Portal automatically assigns the generator to Q0.0 and Q0.1. The user program no longer controls those bits; instead, the hardware PTO/PWM engine toggles them at the programmed frequency and duty cycle. From the outside the channel looks dead because the LED is driven by the PTO engine and it only lights during the active portion of the pulse train — at very low duty cycles that flash is invisible to the eye.

PTO/PWM assignment is project-wide and survives a STOP/RUN transition, a warm restart, and a download of the same project. It is only cleared by editing the device configuration, recompiling, and downloading the hardware configuration back to the CPU. A factory reset of the CPU is not required and should not be the first step, because the configuration will reload as soon as the project is downloaded again.

To confirm that PTO/PWM is the cause, perform the following quick checks before changing anything:

1. Open the project in TIA Portal and double-click Devices & networks.
2. Open the CPU 1212FC device view.
3. Inspect the Properties > System and clock memory area, and the Properties > Pulse generators (PTO/PWM) section.
4. If the project contains a CTRL_PTO, MC_MoveAbsolute, MC_MoveRelative, MC_MoveVelocity, PWM_RUN, or any motion technology object, PTO1 is almost certainly enabled.

Solution 1: Disable PTO / PWM in the Device Configuration

This is the correct fix when the user program does not actually use PTO or PWM on Q0.0 and Q0.1.

1. In TIA Portal, open Project tree > Devices & networks and select the CPU 1212FC.
2. Switch to the Device view tab.
3. In the lower inspection pane, expand PTO / PWM.
4. For every PTO1 through PTO4 and PWM1 through PWM4 entry, set Use this PTO / PWM to Disabled. If the project intentionally uses PWM2 on Q0.2 / Q0.3, leave that entry enabled and disable the others.
5. Right-click the CPU in the device view and choose Compile > Hardware (rebuild all).
6. Right-click the CPU and choose Download to device > Hardware configuration. Tick Overwrite all if TIA Portal asks for confirmation.
7. Wait for the CPU to return to RUN, then test Q0.0 and Q0.1 from a watch table or from the program.

Solution 2: Reassign the Pulse Generator to a Different Output

If the application genuinely needs PTO or PWM on the high-speed outputs but does not need it on Q0.0 / Q0.1, the cleaner solution is to move the generator to a signal board (SB) or a different PTO/PWM channel that does not conflict with the bit you actually need.

1. Open the device configuration and navigate to PTO / PWM.
2. Set PTO1 to Use this PTO and select the address that maps to a free high-speed output, for example Q0.2 / Q0.3 or the output of a digital signal board.
3. If the design uses a signal module (SM) or signal board with additional fast outputs, the assigned address is shown directly in the properties dialog.
4. Recompile and download the hardware configuration.

For a CPU 1212FC DC/DC/DC the maximum PTO/PWM channel count is four (PTO1–PTO4 or PWM1–PWM4), limited by the firmware. See the data sheet for 6ES7212-1AF40-0XB0 for the exact count by firmware revision.

Solution 3: Remove Pulse Instructions from the User Program

Even when the device configuration shows PTO/PWM as Disabled, a stray motion instruction in the user program can re-enable the generator at runtime. Search the project for the instructions below and remove or guard them.

• CTRL_PTO / CTRL_PTO2 / CTRL_PTO3 in the S7-1200 Motion Control library.
• Technology objects of type TO_PTO, TO_PWM, TO_SpeedAxis, TO_PositioningAxis.
• MC_Power, MC_Reset, MC_MoveAbsolute, MC_MoveRelative, MC_MoveVelocity, MC_Home.
• Legacy PWM_RUN, PWM_RUN_SUB, PTO_RUN from the PWM/PTO instruction set (S7-200 style legacy code imported into S7-1200 projects).

If any of these blocks are present but not needed, delete the technology object from the project tree, recompile, and download the hardware configuration. The freed output returns to standard process-image control immediately.

Solution 4: Inspect Wiring and Field-Side Conditions

If PTO/PWM is definitively disabled and the outputs still do not switch, the wiring or the output stage itself is the next suspect. With the CPU in STOP, measure each output point with a multimeter on the 24 V DC range:

1. Confirm that the 24 V sensor supply (terminal L+ / M on the bottom connector) is present and that M is tied to the same reference ground as the loads.
2. With the CPU in RUN and a forced TRUE on Q0.0, measure terminal Q0.0 to M. You should see ≥ 23 V DC at no load.
3. Repeat for Q0.1 to Q0.5. If Q0.2 through Q0.5 read 24 V DC and Q0.0 / Q0.1 read 0 V DC, the high-side switch on the failed channels is open.
4. Disconnect the load wiring from Q0.0 and Q0.1. If the outputs now switch and the diagnostic LEDs light, the failure was a shared over-current or short that latched off the channel. Power-cycle the CPU to clear the latch.

Solution 5: Factory Reset of the CPU

Use the factory reset only as a last resort, for example when the project is unknown, the TIA Portal source is missing, or a previous integrator left a configuration on the CPU that cannot be edited. The procedure below wipes all retentive data, the IP address, the project, and the hardware configuration.

1. Power on the CPU.
2. Insert a SIMATIC memory card (optional, recommended) into the CPU card slot.
3. Set the mode selector to STOP. The STOP LED must be solid yellow.
4. Press and hold the MRES button for at least 3 seconds until the STOP LED begins to flash slowly.
5. Release MRES, then press it again within 3 seconds for at least 3 seconds.
6. The STOP LED stays solid yellow when the reset is complete. The CPU is now in factory default state.

After the reset, download a blank project (a project that contains the CPU 1212FC with all PTO/PWM channels disabled and a single rung that sets Q0.0) to confirm output functionality before loading the real application. If Q0.0 and Q0.1 still do not switch in a blank project, the output stage is electrically damaged and the CPU must be replaced.

Verification Procedure

Run the following verification sequence after each fix attempt:

1. Open Online & diagnostics > Watch table.
2. Add the bits %Q0.0, %Q0.1, %Q0.2, %Q0.3, %Q0.4, %Q0.5 and the system byte %QB1000 (or the system clock byte for your firmware).
3. Click Monitor all to confirm the CPU is in RUN.
4. Right-click %Q0.0 and choose Modify to 1. The Q0.0 LED on the CPU must light within 100 ms and the field terminal must read ≥ 23 V DC.
5. Repeat for %Q0.1.
6. If the LED lights but the field voltage is still 0 V DC, the load wiring or the load itself is open. Check the 24 V feed to the load and the load's ground return.

Troubleshooting Matrix

Preventive Measures

To keep Q0.0 and Q0.1 available for general use in future projects:

• Reserve the high-speed outputs for genuine motion or PWM tasks. Do not enable PTO/PWM channels "just in case."
• When motion is needed, add a dedicated technology object rather than enabling the raw PTO channel; this keeps the assignment auditable in the project tree.
• Document the high-speed output map in the project header so that a future maintainer does not re-enable PTO1 by accident.
• Use a signal board (SB) for additional high-speed outputs when the application has more than two pulse channels. The signal board keeps Q0.0 and Q0.1 free for standard I/O.

Field-Proven Caveats

• LED is not a load test. The CPU 1212FC's output LED is driven from the high-side switch, not from the field terminal. A working LED with 0 V DC at the terminal indicates an open load, a broken wire, or a missing 24 V feed to the load — not a working output.
• Forced writes are not enough. Forcing %Q0.0 := 1 from a watch table does not override a PTO assignment. The forced value is masked by the hardware PTO engine. Disable the engine in the device configuration first.
• Firmware upgrades can re-enable PTO. When upgrading a CPU 1212FC from V4.2 to V4.7 (or similar major bump), always re-check the device configuration. A new firmware version can change default assignments or expose additional PTO channels that were hidden in older revisions.
• F-CPU special case. On the fail-safe CPU 1212FC, the yellow-highlighted terminal regions in the wiring diagram are fail-safe I/O. Q0.0 and Q0.1 are standard (non-F) outputs; F-outputs are on the F-DO module, not on the CPU itself. Do not mistake the F-DO for the failed channel.

FAQ