Troubleshooting S7-416-2DP EXTF and BUS2F X2 PROFIBUS Faults
Engineer field notes for diagnosing a SIMATIC S7-416-2DP CPU that powers up in RUN, accepts HW Config, but immediately raises EXTF and BUS2F with a recurring "Interface error entering state" diagnostic buffer event originating on the X2 DP port. The article captures the complete isolation procedure, from the first LED reading through RMA to the Siemens service center.
1. Problem Summary
After a memory reset and a minimal HW Config download to a spare S7-416-2DP CPU (rack 0, slot 3, with PS 407 and CP 443-1) the CPU transitions to RUN but the EXTF and BUS2F LEDs latch ON. The diagnostic buffer records a repeating event "Interface error entering state" referring to IF2 (PROFIBUS DP, X2 socket). The fault is reproducible after every STOP->RUN, every memory reset, and every new HW Config download; it cannot be cleared by MRES, by deleting the system data, or by removing the DP master system from NetPro.
This pattern, on the SIMATIC S7-400 platform, is the canonical signature of a degraded or failed second PROFIBUS interface. The X1 (MPI/DP) port continues to operate normally; only the X2 socket raises the fault. The remainder of this article walks through the engineering procedure used to isolate the X2 interface, confirm the hardware fault, and route the unit to Siemens repair.
2. Affected Hardware and Identifier Ranges
| Component | MLFB / Order Number | Role in Failure Path |
|---|---|---|
| CPU 416-2 DP, early | 6ES7 416-2XK02-0AB0 | Affected unit; firmware V4.x |
| CPU 416-2 DP, mid | 6ES7 416-2XL04-0AB0 | Spare-pool variant |
| CPU 416-2 DP, current | 6ES7 416-2XN05-0AB0 | Replacement candidate |
| CPU 416-3 PN/DP | 6ES7 416-3XL04-0AB0 | Successor with PROFINET |
| PS 407 10A | 6ES7 407-0KA02-0AA0 | Power supply in test rack |
| CP 443-1 | 6GK7 443-1EX11-0XE0 | Industrial Ethernet CP |
| PROFIBUS DP connector, 90 deg | 6ES7 972-0BA12-0XA0 | Standard with PG socket |
| PROFIBUS DP connector, 35 deg | 6ES7 972-0BB12-0XA0 | Low-profile variant |
| PROFIBUS active terminator | 6ES7 972-0DA00-0AA0 | Active terminator with 3 sockets |
Reference: SIMATIC S7-400 CPU 416-2 DP Manual on Siemens Industry Online Support. The two PROFIBUS sockets on the CPU 416-2DP face plate are 9-pin D-sub female (X1 left, X2 right) per IEC 61158. Both are isolated to 500 V AC from the backplane per EN 61131-2.
3. LED Decoding on the CPU 41x-2 Front Panel
| LED | Color | Meaning | Diagnostic Implication |
|---|---|---|---|
| INTF | Red | Internal fault (program/cycle) | Not raised in this scenario |
| EXTF | Red | External fault - class 1/2 error pending | Raised; pairs with BUS2F |
| FRCE | Yellow | Force is active | Should be OFF in clean config |
| CRST | Yellow | Cold restart request buffered | Should be OFF |
| BAF | Red | Battery exhausted or missing | Should be OFF after battery check |
| BUSF1F | Red | Bus fault on interface 1 (X1) | Should be OFF when X1 is healthy |
| BUS2F | Red | Bus fault on interface 2 (X2) | Raised; source of EXTF |
| RUN | Green | CPU in RUN | ON in this scenario |
| STOP | Yellow | CPU in STOP | OFF in this scenario |
The combination of EXTF + BUS2F with RUN green is the classic indicator that the DP interface is in the OFF or WAIT-PRM state because the CPU cannot bring the segment to OPERATE. The DP finite-state machine has either failed to enter the active state, or it has entered and immediately exited, posting "Interface error entering state" to the diagnostic buffer.
4. Diagnostic Buffer Event Mapping
Open the diagnostic buffer in STEP 7 via "PLC -> Online -> Diagnostics -> Diagnostic Buffer" (SIMATIC Manager) or "Online & Diagnostics -> Diagnostic Buffer" (TIA Portal). The events to look for on the S7-416-2DP with this fault are:
| Event ID (hex) | Event ID (dec) | Symbolic Text in STEP 7 | Meaning |
|---|---|---|---|
| 0x3901 | 14593 | "Operating mode change" | Mode transition logged (e.g. STOP->RUN) |
| 0x3902 | 14594 | "Interface state change" | DP interface entered a new state |
| 0x3903 | 14595 | "Interface error entering state" | DP interface entered a fault state |
| 0x3904 | 14596 | "Interface error leaving state" | DP interface recovered |
| 0x3921 | 14625 | "DP master: bus fault" | Token-pass or frame error on master |
| 0x3922 | 14626 | "DP master: bus OK" | Master recovered |
| 0x38B1 | 14513 | "Distributed I/O: station failure" | A configured slave is missing |
| 0x38B2 | 14514 | "Distributed I/O: station return" | A slave has returned |
| 0x38B4 | 14516 | "Distributed I/O: station incorrect" | Station present but mis-configured |
The recurring "Interface error entering state" event (0x3903) with no paired "leaving state" event (0x3904) confirms that the X2 DP interface has entered a fault state and has not been able to leave it. Each time the CPU re-attempts to bring the bus up, a new 0x3903 entry is appended.
For the full event reference, see the STEP 7 Online Help under "System and Standard Functions -> Diagnostic Events".
5. Root Cause Tree
For an S7-416-2DP that shows EXTF + BUS2F immediately after a clean MRES, the candidate causes reduce to three branches. The diagnostic procedure in section 6 separates them in order of cost (low to high).
- Configuration-side cause: A DP master system is configured on IF2 with no slaves, no terminator, and no active bus. The CPU raises BUS2F because it expects to find DP slaves on the segment. This is the most common cause and the first to rule out.
- System data corruption: The SDBs in the load memory are inconsistent with the freshly compiled HW Config. This is rare after a clean MRES but can persist if the MMC is degraded or the project was edited offline without recompiling NetPro.
- Hardware fault on the X2 interface: The PROFIBUS RS-485 transceiver, the bus ASIC, the connector backshell, or the backplane routing to the X2 socket is degraded. This is what the source case ultimately confirmed when the unit was sent to Siemens.
6. Step-by-Step Isolation Procedure
The following ordered sequence is the field-proven isolation path. Run each step only after the previous step has been recorded as "pass" or "fail".
Step 6.1 - Confirm the Minimum Configuration
The minimum HW Config for an S7-416-2DP test bench is:
- Rack 0, slot 1: PS 407
- Rack 0, slot 3: CPU 416-2DP (6ES7 416-2X...)
- Rack 0, slot 4: CP 443-1 (optional, for Ethernet routing)
In HW Config, the CPU's Properties -> Interface -> IF2 must be set to one of:
- "MPI" (default at first download) - use this for the first pass
- "DP master" or "DP slave" - only after the IF2 has been validated healthy
Step 6.2 - Set IF2 to MPI as a Stress Test
- Open HW Config for the S7-416-2DP station.
- Open the CPU properties -> Interfaces tab.
- For IF2, change "Interface type" from "DP master" to "MPI" and assign MPI address 2 (default).
- Compile and download the HW Config (target system: PC internal -> PLC).
- Perform a STOP -> RUN transition.
- Read the diagnostic buffer.
Expected result on a healthy CPU: EXTF and BUS2F go OFF; the interface enters the MPI active state; no further "Interface error" events are posted.
Failure indicator: EXTF and BUS2F remain ON, or they cycle ON for approximately 1 s and OFF for approximately 3 s. The diagnostic buffer continues to log "Interface error entering state" with the event attribute "IF2" or "DP". This rules out the configuration-side cause and isolates the fault to the X2 hardware.
Step 6.3 - Rebuild System Data
If Step 6.2 still shows BUS2F, delete and rebuild the SDB container:
- In SIMATIC Manager, select the S7-400 station.
- Right-click -> "PLC -> Save/Save As..." to back up the offline project.
- Open HW Config and select "Station -> Save and Compile" (Ctrl+S). This forces regeneration of SDBs 0, 1, 100, 1000, etc.
- Open NetPro and verify there are no orphaned DP master systems or subnets still referencing IF2.
- In the project tree, right-click the CPU and select "PLC -> Compile and Download Objects -> Reset SDBs".
- After successful download, perform STOP -> MRES -> RUN.
If the system data was corrupted, this procedure restores a clean SDB set and the BUS2F is cleared. If BUS2F remains, the X2 interface hardware is degraded.
Step 6.4 - Cross-Check the X1 Port
To confirm the CPU's backplane and CPU core are healthy, configure IF1 (X1) as DP master and connect a known-good slave (e.g., a Siemens ET 200S 6ES7 151-1AA04-0AB0 or a DP/DP coupler). If the X1-based DP master system runs without EXTF and without BUSF1F, the CPU's DP core is functional. The fault is then localized to the X2 socket's transceiver, line driver, or connector.
This step is essential because it eliminates the possibility of a CPU-level DP controller failure that would affect both ports.
Step 6.5 - Replace the PROFIBUS Connector
A damaged or incorrectly wired PROFIBUS connector can present as BUS2F. Test with:
- A new 6ES7 972-0BA12-0XA0 connector
- A new 6ES7 972-0BB12-0XA0 connector
- A 9-pin D-sub backshell with PG socket disconnected
If a single connector swap does not clear BUS2F, the fault is not in the connector.
Step 6.6 - Terminate and Loop the Segment
If a PROFIBUS segment is configured but not physically present, attach a 9-pin D-sub termination plug (terminator ON, slaves removed) to the X2 socket. Some PROFIBUS DP controllers raise BUS2F when they see a segment with no termination and no activity for the bus-parameter watchdog.
If a terminator alone clears BUS2F, the issue was segment integrity, not the X2 hardware.
Troubleshooting Matrix
| Symptom | LEDs | Diagnostic Buffer | Likely Cause | Action |
|---|---|---|---|---|
| EXTF + BUS2F on first RUN after MRES | RUN green, EXTF red, BUS2F red | "Interface error entering state" on IF2 | IF2 = DP master, no slaves, open segment | Set IF2 -> MPI, or add slaves |
| EXTF + BUS2F after IF2 -> MPI | RUN green, EXTF red, BUS2F red | "Interface error entering state" on IF2 | X2 hardware fault | RMA to Siemens |
| EXTF + BUSF1F (not BUS2F) | RUN green, EXTF red, BUSF1F red | "Interface error" on IF1 | X1 hardware fault | RMA to Siemens |
| EXTF only (no BUSF) | RUN green, EXTF red | "Station failure" on a slave | Configured slave offline | Check cable, terminator, slave power |
| INTF only | STOP yellow, INTF red | "Programming error" | OB121/OB122 not loaded | Load error OBs in HW Config |
| EXTF + BUS2F after CPU replacement | Same as above | Same as above | DP configuration wrong on new CPU | Recompile HW Config, re-download |
| BAF only | Any state, BAF red | "Backup battery exhausted" | Backup battery dead or missing | Replace battery on CPU backplane |
7. HW Config and NetPro Rebuild
The rebuild procedure that the field engineer ran on this unit was:
1. Project tree -> S7-400 station -> highlight CPU
2. PLC -> Save/Save As... (backup)
3. HW Config -> Station -> Save and Compile (Ctrl+S)
4. NetPro -> verify subnet memberships (no orphan subnets on IF2)
5. PLC -> Download -> to Target System -> "Reset SDBs"
6. After download: PLC -> STOP -> MRES -> RUN
7. Read diagnostic buffer; expect no "Interface error" events
When "Reset SDBs" is selected, STEP 7 deletes the SDBs in load memory and writes the freshly compiled SDBs from HW Config and NetPro. This resolves the SDB-corruption class of fault.
The full SDB container for an S7-416-2DP includes:
| SDB | Content | Source |
|---|---|---|
| SDB 0 | System data header | Generated |
| SDB 1 | CPU parameters | HW Config |
| SDB 100 | DP master system parameters (IF1) | HW Config |
| SDB 1000 | DP master system parameters (IF2) | HW Config |
| SDB 2000+ | Slave parameters | HW Config |
If SDB 1000 is missing or malformed, IF2 raises "Interface error entering state" on every cycle. Always verify SDB 1000 is present with the "PLC -> Module Information -> System Data" view in STEP 7.
Common SDB Corruption Symptoms
- "Interface error entering state" on IF2 immediately after recompile, with the symptom persisting across MRES
- SDB 1000 missing or stale in module information (Module Information -> System Data shows last-written timestamp from before the recompile)
- DP slaves intermittently show "Station incorrect" (0x38B4) without the cable being disturbed
- Reset SDBs fails with SF on CPU, indicating the load-memory write was rejected by the MMC
- After a firmware update, the old SDB layout does not match the new CPU firmware signature
8. Physical Layer Verification on X2
PROFIBUS DP physical layer is defined by IEC 61158 / EN 50170. The relevant checks for the X2 socket are:
| Parameter | Specification | Test |
|---|---|---|
| Line voltage on idle bus | 1.1 V DC differential (typ 2.0 V) | BT 200 bus tester or oscilloscope |
| Termination resistance | 220 ohm between A and B at each end | Ohmmeter, power OFF |
| Fail-safe bias | 390 ohm pull-up to +5 V, 390 ohm pull-down to GND | Ohmmeter, power OFF |
| Cable shield continuity | less than 1 ohm from connector shell to cabinet PE | Visual + ohmmeter |
| Connector pinout | Pin 3 = B (red), Pin 8 = A (green) | Visual + multimeter |
| Common-mode voltage on shield | less than 1 V AC to cabinet PE | DMM with shield reference |
For cable length vs baud rate, the PROFIBUS guideline defines:
| Baud Rate | Max Segment Length |
|---|---|
| 9.6 kbps | 1 200 m |
| 19.2 kbps | 1 200 m |
| 93.75 kbps | 1 200 m |
| 187.5 kbps | 1 000 m |
| 500 kbps | 400 m |
| 1.5 Mbps | 200 m |
| 3 Mbps | 100 m |
| 6 Mbps | 100 m |
| 12 Mbps | 100 m |
Reference: PROFIBUS & PROFINET International (PI) installation guidelines.
DP State Machine on the S7-416-2DP Master
The X2 interface runs the standard PROFIBUS DP master finite-state machine defined by IEC 61158:
- Power-On / OFF: Interface is not active; no token passing; BUS2F is on if a DP master is configured.
- LISTEN-TIME-OUT: Master is listening for the token but not actively passing it; default state after power-up.
- ACTIVE: Master is passing the token and polling slaves; segment is in the active state.
- PASSIVE: Master detected another active master on the segment; it has yielded to avoid token collision.
When the X2 transceiver is degraded, the FSM cannot transition from OFF to LISTEN-TIME-OUT. The CPU interprets this as "Interface error entering state" and raises BUS2F. There is no firmware workaround; only a hardware repair can clear it.
9. Confirming a Hardware Fault
A hardware fault on the X2 interface is confirmed when all of the following are true:
- [x] MRES has been performed.
- [x] The freshly compiled HW Config has been downloaded.
- [x] "Reset SDBs" has been run from STEP 7.
- [x] IF2 has been reconfigured from "DP master" to "MPI" - and BUS2F remains.
- [x] IF1 (X1) has been verified healthy by running a known DP slave.
- [x] The PROFIBUS connector has been replaced with a known-good unit.
- [x] A terminator has been installed at the X2 socket.
- [x] The diagnostic buffer shows "Interface error entering state" (0x3903) with no "leaving state" event (0x3904).
- [x] The diagnostic buffer event is attributed to IF2 (X2), not to a configured slave.
When all nine conditions are met, the X2 interface hardware is degraded. The X2 line driver, the bus termination inside the CPU, or the bus ASIC has failed. There is no field repair path; the unit must be returned to Siemens.
The diagnostic decision flow is:
10. Repair, RMA, and Replacement Path
The procedure to return a CPU 416-2 DP to Siemens:
- Open a support request on the Siemens Industry Online Support portal at support.industry.siemens.com.
- Create a "Service Request" (SR) and attach the diagnostic buffer export (right-click in the buffer -> "Save As Text").
- Quote the MLFB (e.g., 6ES7 416-2XK02-0AB0) and the serial number from the front panel.
- Provide the firmware version (read from HW Config -> CPU -> Properties -> Diagnostics/Clock).
- Note the operator's location and the desired return-or-replace decision.
The CPU is shipped to a Siemens regional service center (in the source case, the Serbian Siemens representative routed the unit to Nuremberg, Germany). Typical turnaround:
| Outcome | Typical SLA |
|---|---|
| Repair under warranty | 4-6 weeks |
| Repair out of warranty | 6-8 weeks plus parts cost |
| Replacement with new unit | Quoted per case |
| Loaner from Siemens (priority cases) | 2-3 business days, subject to availability |
While the unit is in service, the engineering team can continue to use IF1 (X1) for the same DP master function, since the X1 port is fully independent of the X2 socket at the hardware level. Note that on a CPU 416-2DP, IF1 can be set to "DP master" with up to 32 slaves per segment, the same as IF2. The functional loss is the loss of the second independent DP segment, not the loss of DP master capability.
If a replacement CPU is required immediately, the field-tested drop-in is the 6ES7 416-2XN05-0AB0 (or 6ES7 416-3XL04-0AB0 for PN/DP). Verify the project program is portable by re-targeting in HW Config; the user program is firmware-compatible across the 416-2 family, but SDB 1000 may need to be regenerated if the firmware major version changed.
11. Prevention and Spare-Part Validation Checklist
When commissioning a spare S7-400 CPU, run the following five-minute validation before shelving it:
- Insert in test rack with PS 407 and CP 443-1.
- Memory reset (MRES).
- Download minimum HW Config (PS, CPU, CP).
- Set IF2 to MPI; verify BUS2F stays OFF.
- Set IF2 to DP master; attach a known ET 200S; verify slave online and IO exchange.
- Set IF1 to DP master; repeat step 5 on X1.
- Set IF1 back to MPI; download; verify clean RUN.
- Read the diagnostic buffer; expect empty or only "Operating mode change" events.
- Apply a label with date, MLFB, firmware version, and signature of the test engineer.
Common Pitfalls in S7-400 Spare Management
- Skipping the IF2 -> MPI test during commissioning - this is the single most common reason a degraded spare is not detected before deployment.
- Storing the CPU in a non-climate-controlled environment; humidity above 80% RH accelerates corrosion on the backplane pins.
- Re-using an old PROFIBUS connector with damaged insulation displacement; the connector becomes the weakest link in the segment.
- Failing to record the firmware version on the spare label, leading to version-mismatch issues when the spare is later deployed.
- Not testing the X1 socket independently with a known slave; without this, a degraded X1 is masked by a working X2.
- Assuming a fresh MRES clears the BUS2F LED; the LED is hardware-level and is not cleared by a software reset.
12. FAQ
What do EXTF and BUS2F together mean on an S7-416-2DP?
EXTF (external fault) is the CPU's class-1 fault summary, and BUS2F is the specific indicator for the second PROFIBUS interface (X2, IF2). The pair means the DP interface on X2 has entered a fault state and the CPU is reporting it as an external fault. The diagnostic buffer will list the event as "Interface error entering state" (event ID 0x3903) with an attribute pointing to IF2.
Can I clear BUS2F by a memory reset on the S7-416-2DP?
No. A memory reset clears the user program and the retentive data, but it does not clear the hardware-level PROFIBUS state machine. If the X2 transceiver is degraded, BUS2F returns within seconds of every RUN transition, and "Interface error entering state" re-appears in the diagnostic buffer.
Is the X2 PROFIBUS interface field-replaceable on a CPU 416-2DP?
No. The X2 line driver, bus termination, and bus ASIC are integrated onto the CPU's main board and are not field-replaceable. A failed X2 interface requires the entire CPU to be returned to Siemens for repair or replacement.
How do I read the diagnostic buffer for an S7-400 from STEP 7?
In SIMATIC Manager, right-click the online CPU and select "PLC -> Online -> Diagnostics". In STEP 7 Professional / TIA Portal, navigate to "Online & Diagnostics -> Diagnostic Buffer". The buffer is a circular log of 100-500 events; sort by date and look for events attributed to IF2 (X2). Each entry has an associated event ID in hex and a plain-language description; export the buffer with right-click -> "Save As Text" for the Siemens support request.
What is the difference between BUSF1F and BUS2F on the CPU 41x-2 front panel?
BUSF1F reports bus faults on the first interface (X1, MPI/DP), and BUS2F reports bus faults on the second interface (X2, DP master or DP slave). On a CPU 416-2DP the two interfaces are independent at the hardware level, so a fault on X2 will not propagate to X1, and vice versa. The X1 socket can be used to validate the CPU's core DP logic while the X2 socket is being investigated or returned for service.