Wiring a Radwag WLC Precision Balance 4-20mA Output to a Siemens S7-300 CPU 313C
A Radwag WLC series precision balance (e.g., WLC 6/A2) is frequently integrated into S7-300 batching, filling, and dosing skids. The standard RS-232 port is intended for configuration and dialogue with the manufacturer's proprietary software, not for real-time process control. The robust industrial path is the optional POWER LOOP OUTPUT (current-loop output) accessory, which delivers the net weight as a 4-20 mA signal that can be read directly by the analog input of a SIMATIC CPU 313C. This article documents the wiring, hardware configuration, scaling, and diagnostics required for that integration.
1. Problem Definition and Solution Selection
The integrator faces two viable paths to bring the weight value into the PLC:
| Path | Hardware | Pros | Cons |
|---|---|---|---|
| 4-20 mA analog | Radwag "Power Loop Output" accessory + CPU 313C onboard AI | Single twisted pair, noise-immune, intrinsically safe option, no protocol parsing, deterministic 1 sample / scan | One value per loop; lower resolution than the balance's internal ADC; no remote tare/calibration from PLC |
| RS-232 serial | CP 340 / CP 341 communications processor | Full bi-directional protocol (tare, cal, print, status), no D/A conversion loss | Proprietary Radwag protocol, requires frame parsing FB, occupies rack slot, MPI port must remain free for PG |
For most process-control integrations where the PLC only needs to read net weight and the balance is dedicated to the loop, the 4-20 mA current loop is preferred: it is galvanically isolated by the loop, immune to ground-loop voltage offsets, and uses the CPU's built-in AI so no extra slot is consumed. Reserve the CP 340/CP 341 route for skids that must remotely trigger tare, calibration, or product-change over the balance RS-232 port.
2. Prerequisites
2.1 Hardware
-
PLC: SIMATIC S7-300 CPU 313C, MLFB
6ES7313-5BF03-0AB0(or compatible -AB0/-AB1/-AC0 variants) with integrated 24 DI / 16 DO / 4 AI / 2 AO / 1 Pt100 / 3 HSC. - Balance: Radwag WLC 6/A2 (or WLC 1/A2, WLC 10/A2, WLC 60/A2, WLC 120/A2, WLC 220/A2, WLC 310/A2, WLC 620/A2, WLC 1230/A2, WLC 1500/A2, WLC 3000/A2, WLC 6000/A2 - the current loop accessory is common across the series).
- 4-20 mA accessory: Radwag "WYJŚCIE PĘTLI PRĄDOWEJ" / "POWER LOOP OUTPUT" / "Current loop output AP2-1" module (per the Radwag WLC 6/A2 product page).
- Cable: Shielded twisted pair, e.g., Belden 8761 or Lapp UNITRONIC LiYCY 2x0.34 mm²; shield bonded at PLC end only.
- 24 V DC: Loop power supply; the loop can be powered either by the balance (passive output) or by the PLC's AI (active). Confirm in the Radwag accessory datasheet whether the module is sourcing or sinking.
2.2 Software
- STEP 7 V5.5 + SP2 (or TIA Portal V13+ with S7-300 HSC support pack).
- CPU 313C GSD/HSP installed.
- Optional: Radwag "RADWAG Connect" or balance keypad menu access to set the 4-20 mA range.
3. Radwag WLC 4-20 mA Output Module Specifications
The Radwag current-loop output accessory maps the balance's displayed net weight to a proportional 4-20 mA current. The mapping is linear:
I_out (mA) = 4 + 16 × (W - W_min) / (W_max - W_min)
where W is the current measured weight and W_min, W_max are the user-defined range endpoints configured through the balance menu (typically W_min = 0 and W_max = Max).
| Parameter | Value |
|---|---|
| Signal | 4-20 mA (linear with net weight) |
| Loop voltage | Typically 12-30 V DC loop supply required |
| Loop type | Passive (current sink) on most WLC AP2-1 variants - confirm with Radwag datasheet |
| Resolution | Effective 14-16 bits after PLC conversion |
| Update rate | Synchronous with balance A/D (typ. 10 Hz, model-dependent) |
| Fault indication | 3.6 mA typical underrange / 21 mA typical overrange (per Radwag convention) |
| Galvanic isolation | Provided by current loop itself |
4. S7-300 CPU 313C Integrated Analog Input Specifications
The CPU 313C integrates four analog inputs on the front connector X2 (40-pole). Per the S7-300 CPU 313C manual (entry ID 8859629) and the CPU 31xC technological functions manual:
| Parameter | Value |
|---|---|
| Channels | 4 AI, single-ended, optically isolated to logic |
| Input ranges (per channel) | ±10 V, 0-10 V, ±5 V, 0-5 V, ±2.5 V, 0-20 mA, 4-20 mA, ±3.2 mA, ±10 mA, 0-10 mA, Pt100 / Ni100 (ch 0 only) |
| Resolution | 13 bits (voltage) / 12 bits (current) + sign |
| Integration time | 2.5 / 16.67 / 20 ms selectable (60 Hz / 50 Hz rejection) |
| Input impedance (current) | ≈ 50 Ω |
| Diagnostic | Wire-break detect for 4-20 mA only; group fault LED SF |
| Address area | PIW 752-759 (default, hardware-configurable) |
The CPU 313C does not supply loop power - the AI is a passive current-sensing resistor (250 Ω would be standard for HART; the S7-300 uses 50 Ω and converts to a voltage that is digitized). Because the balance loop module is also typically passive (sink), an external 24 V DC supply is required to drive the loop. Confirm polarity: balance (+) → supply (+) → PLC AI+ → PLC AI- → balance (-).
5. Wiring the 4-20 mA Current Loop
5.1 Front Connector X2 Pinout (CPU 313C, AI Channels 0-3)
| Pin | Signal | Pin | Signal |
|---|---|---|---|
| 1 | AI 0 + | 2 | AI 0 - |
| 3 | AI 1 + | 4 | AI 1 - |
| 5 | AI 2 + | 6 | AI 2 - |
| 7 | AI 3 + | 8 | AI 3 - |
| 9-12 | AO 0/1 + / - | 13-20 | Reserved / 24 V sense |
5.2 Loop Wiring Diagram
+24 V DC supply (+)
|
|
+--------- Radwag balance "I OUT +" (terminal A1)
|
| (shielded twisted pair, shield to PE at PLC end)
|
+--------- CPU 313C front connector X2, AI 0+ (pin 1)
|
| (50 Ω internal sense resistor)
|
+--------- CPU 313C front connector X2, AI 0- (pin 2)
|
+--------- Radwag balance "I OUT -" (terminal A2)
|
+--------- 24 V DC supply (-)
5.3 Wire-Break Detection Enable
The 4-20 mA range supports wire-break detection on the CPU 313C. Wire-break is flagged by a current < 3.6 mA (radically below 4 mA). Activate it in HW Config (see Section 6).
6. STEP 7 Hardware Configuration
- Open SIMATIC Manager > your S7 project > HW Config.
- Insert the CPU 313C from the catalog (path: SIMATIC 300 > CPU 300 > CPU 313C > 6ES7 313-5BF03-0AB0).
- Double-click the AI 4x13Bit submodule on the CPU.
- For Channel 0, set:
- Measurement type:
4DMU(4-wire transmitter, current, 4-20 mA). Use2DMUonly if the balance already supplies its own loop power; the CPU 313C's "2-wire transmitter" mode assumes an external transmitter with its own loop supply. - Measuring range:
4 to 20 mA - Integration time:
20 ms(50 Hz mains rejection) - Diagnostics: enable
Group diagnostics+Wire break
- Measurement type:
- Repeat for any spare channels being used.
- Record the start address: typically PIW 752 for AI 0.
- Save and download to the CPU.
7. Scaling the Weight Value
The raw AI value at PIW 752 is an integer 0 to 27648 corresponding to 4 to 20 mA. The scaling from raw integer to engineering units (kg, g, or lb) is:
Weight (W_min + (W_max - W_min) × (PIW - 0) / 27648)
The simplest implementation is the standard Siemens FC105 SCALE function from the STEP 7 standard library:
CALL "SCALE" // FC105
IN := PIW752 // raw AI word 0..27648
LO_LIM := 0.0 // W_min in kg
HI_LIM := 6.0 // W_max in kg (matches WLC 6/A2)
BIPOLAR:= FALSE // unipolar 4-20 mA
RET_VAL:= MW200 // scale error word
OUT := MD204 // REAL weight in kg
If you need explicit visibility of the loop health or to detect underrange / overrange, read the diagnostic bytes (PIW 752 / PQW 752 area): the FC105 output saturates at HI_LIM when current exceeds 20 mA but does not flag it. For NAMUR-style fault detection, add:
// Underrange: current < 4 mA but > 3.6 mA
L PIW752
L 0 // 0/27648 * 16 + 4 mA = <3.998 mA
<I
S M 210.0 // "Underrange" flag
// Wire break: PIW = 32767 (decimal) on 4-20 mA range when diagnostic active
L PIW752
L 32767
==I
S M 210.1 // "Wire break" flag
SPA END
BIPOLAR = FALSE for a 4-20 mA loop. Setting BIPOLAR = TRUE will return a scaled value centered on 0 with negative weights for currents below 12 mA - a common commissioning mistake.8. Alternative: Serial Communication via CP 340 / CP 341
When the application requires remote tare, calibration, or reading the full Radwag protocol frame (status bits, units, stability flag), use a CP 340 RS-232 module. The CP 340-1 (6ES7340-1AH02-0AE0) supports ASCII; the CP 341 (6ES7341-1AH02-0AE0) supports ASCII, 3964(R), and RK 512 with loadable driver.
| Step | Action |
|---|---|
| 1 | Set Radwag RS-232 parameters in balance menu (default 9600 / 8N1 / no handshake; long printout = continuous "SI 6.000 kg\r\n") |
| 2 | Install CP 340 in the rack; configure port for ASCII, 9600, 8 data bits, even parity optional |
| 3 | Use FB P_SEND (FC P_RCV) from "CP 340" library (CP 340 PtP Param, FB P_SEND, FB P_RCV) |
| 4 | Buffer received frame in DB; parse with STRNG_ I / STRNG_DI / FC 38 (STRING conversion) to extract numeric weight |
| 5 | Implement stability filter: ignore frames where the SI (stability) flag is absent |
Reserve the MPI port of the CPU 313C exclusively for the programming device (PG/PC). It cannot be shared with the balance RS-232 port because the MPI and RS-232 are electrically different protocols - the RS-232 accessory on the balance is a point-to-point DTE interface, while the CPU 313C's X1 MPI port is an RS-485 multi-drop. Connecting them directly will damage the balance output stage.
9. Verification and Commissioning
- Loop continuity test: with the balance powered, disconnect the +24 V and measure loop resistance from balance (+) to (-). Expect 50 Ω (PLC internal) + a few ohms cable resistance. An open loop (> 1 kΩ) indicates broken cable or wrong terminals.
-
Zero test: with no load on the pan, force
PIW752 = 0. Verify balance menu reads 0.000 kg and the loop current (measured with a multimeter in series) reads 4.000 ± 0.010 mA. - Span test: apply a calibrated mass equal to W_max (e.g., 6 kg on WLC 6/A2). Expect PIW ≈ 27648 and current ≈ 20.000 mA.
- Linearization check: apply 25 %, 50 %, 75 % of W_max. PIW should read 6912, 13824, 20736 ± 10 LSBs.
-
Watchdog: in STEP 7 online, force
MD204and confirm FC105 output reacts within one OB1 cycle. - Diagnostic check: disconnect the +24 V supply to simulate wire break. PIW should latch at 32767 (decimal) and SF LED on the CPU should illuminate (assuming diagnostics are enabled in HW Config).
10. Troubleshooting Matrix
| Symptom | Probable Cause | Corrective Action |
|---|---|---|
| PIW reads 32767, SF LED on | Wire break / open loop / reversed polarity | Verify 4 mA at balance terminals with meter; check shield not carrying signal; confirm pin 1 / pin 2 on X2 |
| PIW reads 0, current 4 mA, but no weight on HMI | FC105 not called, or wrong input address | Cross-check PIW address in HW Config vs symbol table; monitor MD204 online |
| Weight noisy (±0.05 kg at zero load) | 50 Hz mains interference, integration time too short, shield not bonded | Set integration time to 20 ms; bond shield to PE at PLC end only; route cable away from VFDs |
| Reading frozen at 6.000 kg regardless of load | Balance loop module configured for fixed output or balance in calibration mode | Exit balance calibration menu; re-set W_min / W_max in balance configuration |
| Reading jumps between 0 and full scale | Loop power supply failing under load | Measure supply under current; replace with ≥ 30 V / 50 mA-rated PSU; confirm balance sink current < 20 mA |
| Reading off by 4 % low (span error) | W_max in PLC does not match balance configuration | Update HI_LIM in FC105 to match balance menu |
| Negative weight shown with no load | FC105 BIPOLAR = TRUE incorrectly set | Set BIPOLAR = FALSE for unipolar 4-20 mA |
| Weight slowly drifts up over hours | Thermal EMF at terminal connections / unshielded cable | Use crimped ferrules, tighten terminals; replace cable with twisted-pair shielded |
11. Field-Commissioning Notes
- The CPU 313C's 4-20 mA input is passive: it only senses current via the internal 50 Ω shunt. An external loop supply (typically 24 V DC) is mandatory.
- The 4-20 mA signal on the WLC series is galvanically isolated only from the balance electronics, not from earth. If the balance chassis and the PLC ground are at different potentials, the shield should be bonded at the PLC end only to avoid a ground loop through the shield.
- For multi-balance installations (e.g., 4-head checkweigher), stagger the A/D integration start times in HW Config to avoid simultaneous conversion noise from the power supply.
- The Radwag 4-20 mA accessory typically lacks HART - if remote diagnostics on the loop are required, install a HART multiplexer (e.g., Phoenix Contact FL HART) on a spare AI.
- 4-20 mA is universally accepted across industrial PLCs (per the Digi-Key 4-20 mA reference and the Fluke 4-20 mA current loop primer); the same wiring scales to Allen-Bradley, Beckhoff, or Wago if the PLC is later replaced.
Why use 4-20 mA instead of the balance's RS-232 port?
4-20 mA is single-loop, noise-immune, galvanically isolated, requires no protocol parsing, and uses the CPU 313C's built-in AI - no extra rack slot. RS-232 requires a CP 340/CP 341, frame parsing, and exposes the integrator to proprietary Radwag protocol changes. Reserve RS-232 for remote tare/calibration needs.
Does the CPU 313C supply loop power for the 4-20 mA module?
No. The CPU 313C's analog inputs are passive current-sense resistors (≈ 50 Ω). An external 24 V DC supply must drive the loop. In HW Config, use measurement type 4DMU (4-wire transmitter) for this configuration; 2DMU assumes the transmitter provides its own loop voltage and is typically wrong for a Radwag sink output.
What raw value should PIW read at 4 mA and 20 mA?
At 4 mA, PIW = 0. At 20 mA, PIW = 27648. At wire-break with diagnostics enabled, PIW = 32767 (decimal). Use Siemens FC105 (SCALE) with BIPOLAR = FALSE to convert to engineering units.
Can I trigger tare or calibration over the 4-20 mA loop?
No - the 4-20 mA output is read-only net weight. Tare, zero, calibration, and unit selection must be performed at the balance keypad or over RS-232. For PLC-initiated calibration, fit a CP 341 and use the Radwag protocol FB suite.
How do I detect a broken cable or failed balance output?
Enable wire-break diagnostics in HW Config (only available on the 4-20 mA range). A loop current below ≈ 3.6 mA latches PIW to 32767 and lights the CPU SF LED. In the user program, compare PIW against 32767 to set a "loop fault" flag and force the HMI weight to a safe default.