Configuring a Siemens LOGO! PI Controller for Twin Water Booster Pump Sets

Twin water booster pump sets with VFD-controlled motors are one of the most common PID/PI control applications in the field. A single Siemens LOGO! 8 logic module is usually more than capable of driving the whole sequence, but the way the PI controller block is wired to the second pump determines whether the controlled pressure stays flat or oscillates. This reference consolidates the working architectures, parameter values, and tuning practice for a LOGO!-based twin-pump system where each pump is driven by an inverter (VFD) and the process variable (PV) is a 0–10 V or 4–20 mA pressure transmitter.

1. Problem Definition: Why a Single PI Loop Drives Both Pumps Unstable

The classic field failure is this: a single PI controller is connected to pump 1 only. When the system demand approaches the maximum of pump 1, the PI output saturates at 100 % and the pressure (PV) still drops below setpoint. The integrator keeps winding up, so when the second pump finally engages, PV overshoots massively, the integrator unwinds quickly, and pump 1 goes to near 0 % while pump 2 keeps ramping. The result is a noisy pressure, hunt cycles, and frequent start/stop of the lead pump.

Three architectural mistakes drive this behavior:

1. Cascade PI on a single PV. Two PI blocks writing to two different AQs but reading the same PV will fight each other. The second PI's AQ perturbs the loop that the first PI is trying to control, so the first PI output oscillates even though the second PI "looks correct".
2. No ramp on the second pump. Switching pump 2 from 0 % to 50 % in one scan creates a step disturbance larger than the proportional band of the first PI, so PV spikes before the first PI can react.
3. Threshold trigger without hysteresis and without time delay. Pressure noise around the staging threshold causes the second pump to start and stop several times per minute ("chatter"), destroying motor and contactor life.

The fix is structural, not parametric. Pick one of the three architectures below before touching KC, TI, or SP.

2. PI Controller Block Reference (LOGO!Soft Comfort V8.x)

The PI controller is a standard library block in LOGO!Soft Comfort. It is documented in the online help under PI controller - LOGO!Soft Comfort Online Help (ID: 100782807). The block exposes the parameters in the table below.

The full Siemens application note PI Controller for Simple Applications – Optimum Motor Speed walks through a single-pump pressure-loop example with VFD control using LOGO! 8. The twin-pump case is the natural extension of that note.

3. Sample Rate and Cycle Time Constraints

The base LOGO! 8 module executes one logic cycle every 500 ms by default. The PI controller block samples PV once per cycle, computes the new AQ, and writes AQ at the end of the cycle. With KC = 1.5 and TI = 0:05 (5 seconds), this is acceptable for a centrifugal pump pressure loop because the dominant time constant of a water column + pipe + pump is usually 2–10 seconds.

To check or change the cycle time in LOGO!Soft Comfort:

1. Open File > Properties > Parameter VM Mapping.
2. Click Cycle Time. The default is 500 ms.
3. Optionally reduce to 250 ms if the program fits in the smaller cycle budget and the LOGO! has a free Ethernet connection to the VFD (the cycle time is the minimum scan time; reducing it does not break existing programs).

Reducing the cycle time alone will not fix the twin-pump stability issue. It will, however, make the PI loop respond to a step in PV about twice as fast, which can make the integrator wind up more aggressively and worsen the overshoot. If you reduce the cycle time, reduce KC proportionally (e.g. KC 1.5 → KC 0.8) and re-tune TI.

4. Architecture A — Single PI + Parallel VFDs (Preferred for Identical Pumps)

When to use. Both pumps are identical (same make, model, impeller, VFD). The piping header is sized so that pump 1 + pump 2 in parallel produce a smooth pressure-vs-flow curve without steps.

Wire the LOGO! PI controller's AQ1 directly to both VFD reference inputs through a passive signal splitter, or use two hardware outputs of the same AO channel via a 0–10 V buffer. Both VFDs run at exactly the same speed, the same ramp, and the same load profile. There is no staging logic, no threshold trigger, no second pump at all — the system is just one big pump whose capacity is 2× a single pump.

Advantages:

• No transient at the staging threshold.
• Equal wear on both pumps (true duty sharing).
• Trivial LOGO! program: 1 PI block, 1 enable flag, 1 fault interlock per pump.

Disadvantages:

• Both VFDs are energized whenever the system runs. If the load is small and energy cost matters, an on/off pump 2 may be preferable.
• Requires the VFDs to be configured for common reference, identical accel/decel ramps, and identical motor nameplate data.

4.1 Required VFD Settings for Parallel Operation

5. Architecture B — Single PI + VFD on Pump 1, Soft-Starter on Pump 2

When to use. The load profile has long periods below 50 % of pump 1 capacity, with occasional peaks. The cheapest hardware build uses a VFD on pump 1 and a soft-starter (or even a direct-on-line contactor with a reduced-voltage autotransformer) on pump 2.

5.1 Control Logic (LOGO!Soft Comfort FBD)

1. PI block reads PV (pressure transmitter) and writes AQ1 → VFD reference for pump 1.
2. Analog threshold trigger compares AQ1 (or PV) against a high setpoint, e.g. AQ1 > 900. This means "pump 1 is at 90 %, time to add pump 2".
3. The threshold trigger has hysteresis: ON > 900, OFF < 700. This means once pump 2 is engaged, it does not drop out until pump 1 falls below 70 %.
4. On-delay of 5–10 s after the threshold trigger, to filter out momentary demand spikes.
5. Off-delay of 30–60 s after the threshold falls, to prevent rapid cycling.
6. The output of the off-delay energizes the soft-starter enable of pump 2.

The PI block on pump 1 reacts naturally. When pump 2 starts, PV rises, the integrator of the PI block begins to unwind, and pump 1's speed drops to a value that maintains the setpoint. When demand falls and pump 2 is no longer needed, the off-delay drops pump 2 out, PV falls slightly, and pump 1 speeds up to compensate.

This is the simplest working architecture and is the one to try first if the budget cannot justify a second VFD.

5.2 Ladder Snippet for Staging Logic

|  Threshold_Trigger(Q)  --[TON 10s]--(  Pump2_Enable  )--[TOF 60s]--(  Soft_Starter_Run  )--|
|   AQ1 > 900                                                                                          |
|  Threshold_Trigger_hyst                                                                              |
|   OFF < 700                                                                                          |

6. Architecture C — Single PI + Two VFDs with Ramp on Pump 2 (Best Dynamic Performance)

When to use. Both pumps are VFD-driven (e.g. for soft ramp-down during stop, energy recovery, or precise flow matching), and the load swing is too large for a single VFD to handle. This is the architecture that solves the original question on the forum: pump 1 carries the steady-state load with the PI loop closed on it, and pump 2 is brought in as a load-sharing device with a slow ramp, not as a second closed loop.

6.1 Reference Speed and Ramp Generation

Pump 2's speed reference is not the output of a second PI block. It is a ramp generated by an Analog Ramp block (LOGO! block B026 in the standard library). The ramp target is computed from a constant, e.g. 60 % of full speed, but the rate of change is the key tuning parameter.

The ramp rise rate must be slower than the PI loop's ability to react (i.e. slower than the closed-loop response time of pump 1). If the PI loop on pump 1 has a settling time of 3–4 s, a 5-second ramp up on pump 2 is appropriate. A faster ramp reintroduces the step disturbance the architecture is designed to remove.

6.2 Why the Second PI Controller Makes Pump 1 Unstable

The original failure mode — "AQ of the first PI becomes unstable when I add a second PI" — is expected and structural, not a tuning problem. Two PI blocks closed on the same PV form a multi-input single-output (MISO) loop that is non-linear and has no unique equilibrium. Each controller's output becomes a disturbance to the other, the integrators fight, and the system either saturates or oscillates. This cannot be fixed by changing KC and TI on either block; the topology must be changed.

Architecture C replaces the second closed loop with an open-loop ramp. Pump 2 is a feed-forward assist, not a feedback controller. Its speed is set by the ramp, not by an integrator reacting to PV. The PI loop on pump 1 sees the slow ramp as a smooth, bounded disturbance that it can integrate away over a few seconds.

7. Pressure Sensor Scaling and Wiring

For a 0–5 bar pressure transmitter with 4–20 mA output on AI1 of the LOGO! base module:

1. Wire the transmitter loop-powered to AI1 (0) and AI1 (+).
2. In LOGO!Soft Comfort, open the AI block properties and set Sensor = "4–20 mA".
3. Set the linear scaling: 4 mA → 0 (engineering unit = bar × 100, so 0 = 0.00 bar), 20 mA → 500 (= 5.00 bar).
4. Connect the scaled AI to the PI block's PV input.

If you are using an AM2 RTD module (6ED1055-1MA00-0BA2) for an additional temperature interlock, do not run the pressure loop on the same module; the analog conversion latency on the AM2 RTD is higher than on the base module's fast AI.

8. Step-by-Step Commissioning Procedure (Architecture C)

8.1 Prerequisites

• LOGO! 8 base module (6ED1052-1xB08-0BA1 or later) with LOGO!Soft Comfort V8.4 or later installed on the engineering PC.
• Two identical VFDs configured for 0–10 V reference, identical accel/decel ramps (3–5 s), min frequency 20 Hz, max frequency 50/60 Hz, internal PID disabled.
• 4–20 mA pressure transmitter calibrated to the working range (e.g. 0–5 bar, 0–10 bar, 0–16 bar).
• Ethernet cable from the LOGO! to the engineering PC for online monitoring.
• Manual override of both pump contactors (service switch) for safe commissioning.

8.2 Procedure

1. Wire the program without enabling the VFDs. Build the FBD with the PI block, the analog threshold trigger, the on/off delays, the analog ramp, and the two pump enable flags. Use simulated AI values (force a known PV) to verify the logic in the LOGO!Soft Comfort online monitor before energizing the field.
2. Power the LOGO! and the pressure transmitter only. Verify that the AI reads 0 at atmospheric pressure and the full-scale value at maximum test pressure (use a hand pump or a dead-weight tester if available).
3. Set SP to the working setpoint (e.g. 330 for 3.30 bar with the 0–5 bar / 4–20 mA scaling above).
4. Set KC = 1.0 and TI = 0:30 (30 s) for the first trial. These are conservative starting values for a centrifugal pump pressure loop. If the original SP 330 / KC 1.5 / TI 0:05 is unstable, the most likely cause is TI too short — the integrator reacts faster than the process, and AQ swings wildly. Increase TI first; only increase KC if the loop is sluggish after a long tuning session.
5. Enable pump 1 only. With pump 2 disabled, run a step test: open a demand valve to draw 50 % of single-pump capacity. Observe AQ1 settling. Tune KC and TI until AQ1 settles in 3–5 cycles with < 5 % overshoot.
6. Enable the staging logic for pump 2. Open the demand valve further to exceed 90 % of AQ1. Verify that the analog threshold trigger fires, the 8 s on-delay expires, and the analog ramp starts to rise. Watch the pressure on the transmitter: it should rise by less than 0.1 bar during the staging event, and pump 1's AQ1 should fall smoothly as pump 2 ramps up.
7. Test drop-out. Close the demand valve so AQ1 falls below 50 %. Verify that the 60 s off-delay expires and pump 2 ramps down at 10/s.
8. Verify fault interlocks. Force PV to be above the over-pressure setpoint (e.g. 95 % of transmitter range) for more than 2 s. Both pumps should trip to zero speed and a system fault flag should be set. Confirm the VFDs report no fault and can be restarted after the PV returns to the safe band.

8.3 Verification Checklist

9. Tuning Guide: SP, KC, TI Practical Values

Field experience with a 0–10 bar centrifugal pump pressure loop and a 1–5 second hydraulic time constant gives the following starting points.

The PI controller block in LOGO!Soft Comfort expresses TI in minutes:seconds (m:s). A value of 0:05 means 5 seconds, not 5 minutes. If the integrator is too fast (visible as AQ1 oscillating every 1–2 cycles at a 500 ms cycle time), increase TI by a factor of 3 (e.g. 0:05 → 0:15) and retest. If the response is sluggish, decrease TI by a factor of 2 (e.g. 0:30 → 0:15).

10. Troubleshooting Matrix

11. Sample-Logic Skeleton for Architecture C

The skeleton below is a text representation of the FBD. It is not a loadable LOGO!Soft Comfort program; it is intended as a wiring guide for the engineer building the program.

Pressure_Transmitter_AI1
   |
   v
[Analog Filter N=6] ---> PV
   |
   v
[PI Controller: SP=330, KC=1.0, TI=0:30, DIR=−, Mode=PI] ---> AQ1
   |                                                            |
   v                                                            v
[Analog Mux clamp AQ1 < 950] ---> VFD1_Reference                [Analog Threshold Trigger:
                                                                 ON  AQ1 > 900
                                                                 OFF AQ1 < 500
                                                                 SP_hyst=300]
                                                                  |
                                                                  v
                                                          [On-Delay 8 s]
                                                                  |
                                                                  v
                                                          [Off-Delay 60 s]
                                                                  |
                                                                  v
                                                          [Analog Ramp: rise 20/s,
                                                                 fall 10/s,
                                                                 target = 600] ---> AQ2
                                                                                       |
                                                                                       v
                                                                              VFD2_Reference

12. Frequently Asked Questions