Overview: DMX512 and the S7-1200 RS-485 Stack
DMX512 (formally USITT DMX512-A and now maintained as ANSI E1.11 – Asynchronous Serial Digital Data Transmission Standard for Controlling Lighting Equipment and Accessories) is the dominant asynchronous protocol for dimmers, moving lights, color-mixing fixtures, and addressable LED drivers in entertainment, architectural, and signage applications. It rides on a single twisted-pair EIA-485 (RS-485) physical layer at a fixed 250 kbit/s, with 8 data bits, no parity, and 2 stop bits (8N2) plus a unique break and mark-after-break (MAB) delimiter at the start of every packet.
Engineers who already have a SIMATIC S7-1200 in a machine and want to add an LED accent strip, indicator tower, or architectural lighting fixture frequently ask whether the on-board or plug-on RS-485 port of the CPU can carry DMX512 directly. The short answer is no when the port in question is a CB 1241 (6ES7241-1CH30-1XB0) or a CM 1241 RS485 (6ES7241-1CH32-0XB0). This article explains exactly which timing parameter blocks the integration, what workarounds exist, and which Siemens-native or third-party solutions are recommended for new designs.
DMX512 Electrical, Timing, and Frame Requirements
A compliant DMX512 transmitter must meet every parameter below; receivers are required to accept a generous range of values, but a transmitter is held to tight limits. The values are taken from ANSI E1.11 and reproduced from the Beckhoff "Fast communication with the DMX protocol" application note, which provides an authoritative timing summary for industrial engineers.
| Parameter | Value / Range | Engineering meaning |
|---|---|---|
| Bit rate | 250 kbit/s (fixed, ±0.2 %) | 1 bit = 4 µs nominal |
| Character format | 11 bits per slot: 1 start, 8 data, 2 stop (8N2) | No parity, 2 stop bits |
| Slot length | 44 µs (11 bits × 4 µs) | One channel of dimmer/level data |
| Slots per packet | 1 to 512 (slot 0 is the start code) | Maximum 512 fixture addresses |
| Refresh rate | Up to ~44 Hz, typical 30–40 Hz | Driven by inter-packet idle time |
| Break (RESET) | 88 µs minimum, 1 s maximum | Continuous SPACE on the line |
| Mark-After-Break (MAB) | 8 µs minimum, < 1 s | Idle MARK between break and first slot |
| Inter-Slot Time (IST) | 0 µs minimum, < 1 s | Idle between consecutive slots |
| Inter-Packet Time (IPT) | 0 µs minimum, < 1 s | Idle between successive packets |
| Topology | Daisy-chain, max 32 unit loads | 120 Ω termination at both ends |
| Cable | Shielded twisted pair, characteristic impedance ≈ 120 Ω | Belden 9841 / 8761 typical |
| Connector | 5-pin XLR (DMX512-A) or 3-pin XLR (legacy) | Pin 1 = GND, Pin 2 = DATA-, Pin 3 = DATA+ |
The break is the diagnostic feature. It is a continuous SPACE (logic 0) on the differential pair lasting at least 88 µs — roughly 22 bit times — followed by a MAB of at least 8 µs (2 bit times). No UART peripheral that uses standard 8N1 or 8N2 framing can emit this sequence by itself, because the line driver must hold SPACE for 22 bit periods after the start bit of any normal character would normally end. The break and MAB must be generated either by special UART hardware (a "break transmitter") or by bit-banging the line driver.
CB 1241 RS485 Hardware Capabilities and Limits
The CB 1241 RS485 is the small plug-in board that sits on the left side of an S7-121x CPU and adds a single RS-485 (half-duplex) channel. Its published specifications (Siemens TIA Portal cloud manual collection) include the following serial-port parameters:
| Parameter | CB 1241 value |
|---|---|
| Article number | 6ES7241-1CH30-1XB0 (current); predecessor 6ES7241-1CH30-0XB0 |
| Interface | RS-485, half-duplex, 9-pin sub-D male |
| Max baud rate (standard) | 115.2 kbit/s |
| Min baud rate | 300 bit/s |
| Supported character frames | 8N1, 8E1, 8O1, 8N2, 7E1, 7O1, 8Z1, 8C1 (no DMX break hardware support) |
| Cable length, shielded | 1 200 m at low baud, derated to ~30 m at 115.2 kbit/s |
| Freeport (ASCII) mode | Yes, SFBs / SFCs SEND_PTP, RCV_PTP, SEND_CFG, RCV_CFG
|
| Modbus RTU master | Yes, via MB_COMM_LOAD + MB_MASTER / MB_SLAVE
|
| USS protocol | Yes |
| DMX512 hardware mode | No |
The same ceiling applies to the related CM 1241 RS485 (6ES7241-1CH32-0XB0) and the CM 1241 RS232 (6ES7241-1AH32-0XB0): 115.2 kbit/s is the fastest baud the silicon will allow. A user setting 250 000 bit/s in SEND_CFG will get a parameter error and the port will not transmit.
Root Cause: Three Independent Constraints
Even if a future firmware release lifted the baud cap, the CB 1241 would still fail DMX512 for two other reasons. Together they form a three-layer problem:
- Baud-rate ceiling. UART divider cannot reach 250 kbit/s from the standard 50 MHz peripheral clock used on the S7-1200 serial modules.
- No break generator. The on-chip UART on the CB 1241 does not expose a "transmit break" control bit, so the S7-1200 firmware cannot produce the 88 µs SPACE + 8 µs MARK delimiter that DMX512 receivers key on.
- No inter-frame MAB control. The standard S7-1200 freeport drivers do not insert an 8 µs idle gap between break and slot 0; the first character is queued by the CPU as soon as the FIFO is loaded, which produces a MAB of 0 µs — outside the 8 µs minimum.
Constraint 1 is the deal-breaker; constraints 2 and 3 ensure that no software-only workaround inside the S7-1200 can produce a compliant frame even on a hypothetical 250 kbit/s module.
Why Bit-Banging Through a Discrete RS-485 Transceiver Fails
Engineers sometimes propose routing a fast S7-1200 digital output through an external RS-485 line driver (SN75176, MAX485, ADM2483, THVD1450) and toggling it in the OB1 cycle to synthesize 250 kbit/s. The approach is theoretically possible for short, single-channel sequences, but it has practical limits on the S7-1200:
- Cycle time vs. bit time. A 250 kbit/s stream has a 4 µs bit period. The S7-1214 default OB1 cycle is typically 1–4 ms; even with a 100 µs cyclic interrupt and optimised STL, jitter on a software-toggled GPIO is on the order of 1 µs — at the edge of a 4 µs cell.
- Break generation. The CPU must hold the line idle in SPACE for at least 22 bit periods (88 µs) by clearing the DE/RE pin of the transceiver. The cyclic interrupt must therefore spend ~88 µs doing nothing, and any other interrupt (PROFINET, SFB communication, PID background) will stretch it and corrupt the break.
- No duplex / no receive. A bit-banged transmitter cannot read a fixture's response — DMX512 itself is unidirectional, but many addressable LED controllers echo diagnostic telemetry (RDM, ANSI E1.20) that the application code will want later.
- No collision / fault detection. A real UART detects framing errors, break, and overrun; a bit-banged port has none of these and the diagnostic buffer is empty when something goes wrong on the bus.
Conclusion: bit-banging is acceptable for a one-channel "always on, always full" dimmer that never changes its 0–255 level, and never for a 512-channel architectural install.
Siemens-Native Solution: ET200SP CM PtP with DMX512 Driver
Siemens publishes a DMX512 sample application for the ET200SP CM PtP communication module, article number 6ES7137-6AA00-0BA0. The CM PtP supports DMX512 as one of its selectable protocol drivers from firmware V2.0.x onward, with the break, MAB, and slot framing generated entirely in the module's hardware. The application note is delivered as PDF entry "109778975_ET200SP_CM_PtP_DMX512_DOC_V1_0_en.pdf" on the Siemens support pages.
| CM PtP feature | Value |
|---|---|
| Article number | 6ES7137-6AA00-0BA0 |
| Interface | RS-232 / RS-422 / RS-485, software-selectable |
| Baud rates | 110 bit/s up to 1 Mbit/s (includes 250 000 bit/s) |
| DMX512 driver | Yes (firmware V2.0.x and later) |
| Break handling | Hardware, configurable 88 µs – 1 s |
| MAB handling | Hardware, configurable 8 µs – 1 s |
| Backplane | ET200SP PROFINET interface module (IM 155-6) |
| Programming blocks | FB 286 "DMX512_TX", FB 287 "DMX512_RX" (S7-1500), or S7-1200-compatible user library |
The reference architecture is:
The S7-1200 CPU runs a regular PROFINET cycle to the IM 155-6; the CM PtP handles all DMX timing locally. The application program on the S7-1214 only needs to write the desired slot values to a process image (e.g., DMX_Buffer[1..512] : ARRAY[1..512] OF BYTE) and the CM PtP transmits the frame autonomously at the configured refresh rate.
Third-Party Gateways (ADFWeb, Anybus, Phoenix Contact)
When the LED fixture count is small and the S7-1200 already exposes a PROFINET port, a PROFINET-to-DMX512 gateway is the lowest-effort path. Tested families include:
| Vendor | Family | Order number example | PN cycle | Notes |
|---|---|---|---|---|
| ADFweb | HD67171 / HD67932 | HD67932-A1 | Real-time, IRT capable | Up to 512 channels, web configurator |
| HMS (Anybus) | Communicator | ABC4013 | RT | DMX512 in/out, GSDML on PN |
| Phoenix Contact | FL MGUARD / GW PN/DMX | 1105702 | RT | Inline configurator in TIA Portal |
| Wenglor / SpectraLight | Lighting controllers | varies | RT / IRT | Some include Art-Net fallback |
The gateway approach keeps the S7-1214 firmware unchanged. The PROFINET device appears in the device view with a fixed input/output layout (e.g., 512 bytes out = 512 DMX channels), and the gateway handles the 250 kbit/s stream, the break, and the MAB. This is the recommended path for retrofit installations where the S7-1200 cannot be expanded with an ET200SP station.
Wago 750 Series as an Alternative Controller
The Wago 750-652 RS-232/485 serial interface module can be configured to a custom baud rate that supports DMX512 transmission. The 750-652 sits on the Wago 750 I/O-System backplane and is fieldbus-coupled to the S7-1200 over PROFINET (via the 750-375 head). Some firmware revisions expose a "DMX packet" function block in the Wago e!COCKPIT / Codesys 3.5 libraries. The combination is useful when the cabinet already has a Wago slice and the S7-1200 is the supervisory controller.
Limitations: the 750-652 is full-duplex RS-232/485 and the DMX profile is not officially documented in the standard manual; field engineers should request the Wago application note AN-750-652-DMX from Wago support before commissioning.
Choosing Addressable LED Strips With Native S7-1200 Support
Sometimes the cheapest fix is to pick a different fixture technology that the S7-1200 can drive directly through a digital output or a slower serial protocol. Common alternatives that avoid DMX512 entirely:
| Protocol / IC | Physical layer | Speed | S7-1200 interface | Typical use |
|---|---|---|---|---|
| WS2812B / SK6812 (NeoPixel) | Single-wire, 800 kbit/s | 800 kbit/s | Bit-banged DO (use ET200S DO or CM PtP 1 Mbit/s) | Pixel strips, signage |
| APA102 / SK9822 | SPI, 2-wire | up to 20 Mbit/s | CM PtP (SPI mode) or S7-1500 | High refresh pixel arrays |
| DALI | 2-wire, 1.2 kbit/s Manchester | 1.2 kbit/s | Not native — needs gateway | Architectural lighting |
| KNX | Twisted pair, 9.6 kbit/s | 9.6 kbit/s | Not native — needs IP/KNX router | Building automation |
| 0–10 V analog dimming | Single-ended analog | n/a | S7-1200 AQ module (SM 1232) | Simple dimmers |
| Modbus RTU LED controllers | RS-485, 19.2 kbit/s typical | ≤115.2 kbit/s | CB 1241 / CM 1241 with MB_MASTER
|
Strip / panel controllers |
The Modbus RTU LED controller route is the most engineering-friendly drop-in for S7-1200 owners. Many Chinese and European LED-controller vendors (Mean Well HLG, Inventronics, Sunricher, LTECH) ship RS-485-controlled dimmers at 19.2 / 38.4 / 57.6 / 115.2 kbit/s, well within the CB 1241 capability. Each fixture is addressed with a Modbus register, and MB_MASTER on the S7-1214 can poll hundreds of them on a single 120 Ω terminated bus.
Step-by-Step: TIA Portal Configuration for ET200SP CM PtP DMX512
- Add the IM 155-6 PN ST head module in the device view of the S7-1200 project, on the same PROFINET subnet as the CPU.
- Insert the CM PtP (6ES7137-6AA00-0BA0) into slot 1 of the ET200SP station. The GSDML file is shipped with TIA Portal V16+ under "Siemens AG > ET200SP > CM PtP".
- Open the CM PtP properties and select Protocol > DMX512 master. The firmware must be ≥ V2.0.x; if the option is greyed out, update the module via TIA Portal's online & diagnostics function.
- Configure the slot count (1 – 512) and the refresh rate (1 – 44 Hz; default 30 Hz). The module will automatically insert break (≥ 88 µs) and MAB (≥ 8 µs) between packets.
- Map the process image. The CM PtP exposes the slot data as 512 input/output bytes on PROFINET. The first byte is the start code (must be 0x00 for normal DMX512); bytes 1 – 512 carry slot levels 0 – 255.
-
Program the S7-1200 side:
// S7-1200 / S7-1500 SCL example VAR DMX_StartCode : BYTE := 16#00; // Slot 0, must be 0x00 for ANSI E1.11 DMX_Slots : ARRAY[1..512] OF BYTE;// 512 channels, 0..255 each fbDmxTx : FB_DMX512_TX; // From Siemens DMX library END_VAR // Set channel 1 = 128 (50 %), channel 2 = 0, channel 3 = 255 DMX_Slots[1] := 128; DMX_Slots[2] := 0; DMX_Slots[3] := 255; // Trigger transmission (cyclically, every 30 ms) fbDmxTx( Start := TRUE, StartCode := DMX_StartCode, Data := DMX_Slots, Length := 512, Busy => , Done => , Error => , Status => ); -
Wire the RS-485 output to the XLR pinout:
D+→ XLR pin 3,D-→ XLR pin 2, shield → XLR pin 1. Place a 120 Ω resistor between D+ and D- at the CM PtP end and at the last fixture end. Do not put 120 Ω at intermediate drops. - Compile, download, and go online. In the CM PtP online diagnostics, confirm "DMX512 active, break OK, MAB OK, refresh 30 Hz" before powering the fixtures.
Wiring, Termination, and Field Installation Notes
DMX512 wiring is more sensitive than ordinary RS-485 Modbus because of the high edge rate (250 kbit/s) and the 22-bit-time break. The following rules are field-proven:
- Cable. Use a real DMX cable or Belden 9841 / 9842 / 8761. Cat 5/6 works for short runs but its 100 Ω impedance creates reflections on long daisy-chains.
- Topology. Daisy-chain only. No stars, no stubs longer than 30 cm. Splitters (e.g., Doug Fleenor, ELC) are required for branch runs.
- Termination. Exactly two 120 Ω resistors, one at each physical end of the bus. A third termination (the classic mistake) halves the impedance and causes reflections that manifest as random fixture flickers.
- Shielding. Bond the shield to ground at one point only (typically the controller end). Do not let the shield carry return current.
- Bias. Many commercial fixtures provide fail-safe bias on the bus; if yours do not, add 510 Ω pull-up to 5 V on D+ and 510 Ω pull-down on D- at the controller end.
- Voltage rating. DMX512 is a 5 V differential signal. Long outdoor runs should add RS-485 isolators (e.g., ADuM1411 + MAX3485) to break ground loops.
Verification Checklist
After commissioning, run the following to confirm a compliant DMX512 link:
- Scope the break. Probe D+/D- with a 100 MHz oscilloscope. Confirm a SPACE longer than 88 µs followed by a MARK longer than 8 µs, then 512 slot pulses at 4 µs each.
- Refresh rate. The time between two consecutive break edges should be 22 – 33 ms (30 – 44 Hz). Anything below 22 ms means the bus is saturating; anything above 33 ms will be visibly slow.
- Slot integrity. Read the slot bytes back through a DMX analyzer (e.g., Goddard DMXter, Swisson XMT-120) and verify the level for slot 1 = 128 produces a fixture output of 50 %.
- Error counters. On the CM PtP online diagnostics, "Break errors", "Framing errors", and "Parity errors" must remain at zero over a 1-hour run.
- Heat & EMI. Touch the CM PtP heatsink after 1 hour; it should be barely warm. Hot enclosures indicate a reflection or short.
Troubleshooting Matrix
| Symptom | Likely cause | Diagnostic | Fix |
|---|---|---|---|
| Fixtures never light, no error on CPU | Baud-rate mismatch (CB 1241 cannot reach 250 k) | Online > CB 1241 > Diagnostics: baud shown | Replace CB 1241 with ET200SP CM PtP, or insert a PROFINET/DMX512 gateway |
| First fixture works, rest flicker or are dead | Missing 120 Ω termination at the last fixture | Scope the bus at the last drop; ringing present | Install 120 Ω between D+ and D- at the end, remove any extra terminations |
| Random 1-second blackouts | Break > 1 s caused by S7-1200 PROFINET retry | Check CPU diagnostic buffer for PN timeouts | Increase PROFINET update time to 4 ms, or split the bus with a gateway |
| All fixtures at full intensity | Start code 0x00 is correct but all slots = 255 (line idle in DMX = full on in many fixtures) | Read the slot data block in TIA Portal | Initialise the slot array to zero before starting transmission |
| Channels scrambled between fixtures | Fixture addressing in the menu not sequential (e.g., set to 1, 3, 5, 7) | Read each fixture's DMX address display | Re-address fixtures sequentially starting at 1 |
| Bit-banged DO works on bench but fails on machine | PROFINET interrupt pre-empts the cyclic OB | Measure jitter on the DO with a scope | Move to a hardware UART (CM PtP) or a slower protocol |
Frequently Asked Questions
Can the CB 1241 transmit DMX512 at 250 kbit/s if I patch the firmware?
No. The 115.2 kbit/s ceiling is set by the UART divider in the communication module's silicon, not by the firmware. No TIA Portal option, library, or firmware update changes this bound.
Is there any S7-1200 communication module that natively supports DMX512?
No. DMX512 is supported on the ET200SP CM PtP (6ES7137-6AA00-0BA0) and on the S7-1500 CM PtP family, but not on any S7-1200 plug-in board or CM 1241 module.
Can I bit-bang DMX512 with a 100 kHz digital output on the S7-1214?
Yes, for a single static channel and a tolerant fixture, but the OB cycle jitter, the 88 µs break, and the MAB make a 512-channel installation unreliable. Use a hardware UART instead.
What is the cheapest way to add a single LED strip to my existing S7-1214?
Replace the DMX strip with a Modbus RTU LED controller and drive it with MB_MASTER on the existing CB 1241. Baud rates from 19.2 to 115.2 kbit/s are within the module's capability.
Do I need a 120 Ω termination on a 2 m DMX cable?
Yes. Even on a short run, the 250 kbit/s edge rate produces ringing. Place 120 Ω at both physical ends and remove any intermediate termination on splitters.
Will a PROFINET-to-DMX512 gateway add noticeable latency?
Typical PROFINET update time of 1 ms plus one DMX frame of 22 ms gives 23 ms end-to-end, which is invisible to the eye. Use the gateway's IRT mode for stage applications that need jitter below 1 ms.