EtherNet/IP on S7-1500 Function Blocks, RPI Limits, and FANUC EDA

Overview

EtherNet/IP on the SIMATIC S7-1200 and S7-1500 controllers is implemented as a software-based communication stack layered above the PROFINET firmware. Unlike Allen-Bradley ControlLogix/CompactLogix controllers, where CIP is embedded in the operating system and EDS/AOI files are first-class objects, the Siemens implementation ships as a TIA Portal library containing function blocks (FBs), PLC data types (UDTs), and example projects. The consequence is two-fold: (1) cycle-time and RPI behaviour is governed by the OB1/OB3x execution model of the user program rather than dedicated hardware tasks, and (2) the supported feature set is intentionally narrower than a native CIP stack.

This reference consolidates the field-proven constraints, library entry points, and configuration parameters required to bring up an EtherNet/IP Scanner or Adapter on a Siemens PLC, and integrates a working configuration for FANUC robots using the EDA (Ethernet Device Access) interface. All official documentation is sourced from Siemens Support entry 109782314 and the SiePortal S7-1500 EtherNet/IP discussion.

Native Stack vs. Gateway Architecture

Engineers integrating EtherNet/IP into a Siemens cell must choose between two physical architectures before any code is written.

The Siemens Industrial Edge Ethernet IP Connector is positioned for analytics/visibility use cases, not for closed-loop I/O control. For deterministic control, use the in-CPU library or an external gateway such as the ProSoft PLX31 EtherNet/IP to Siemens Industrial Ethernet gateway.

Library and Function Block Topology

The official example project published under Siemens Support entry 109782314 provides the canonical FB layout. The library exposes three primary blocks plus supporting PLC data types.

These FBs are called from a cyclic OB (typically OB1 or a configured OB3x) and share an instance DB. The library creates the CIP connection list internally and does not require an EDS import step; instead, you declare the device using PLC data types and a connection list populated in the user program or in a global DB.

Scanner Configuration: Step-by-Step

1. Install the EthernetIP library from the Siemens support example into TIA Portal V17 or later.
2. Add the S7-1500 CPU and confirm a PROFINET interface is provisioned for the EtherNet/IP subnet. A second IP subnet is recommended to avoid protocol contention.
3. Declare a global DB of the connection-list UDT. Populate at minimum:
   • RemoteIP (e.g., 192.168.10.50)
   • OutputAssembly (instance 0x64 typical for drives)
   • InputAssembly (instance 0x65)
   • ConfigAssembly (instance 0x66, optional)
   • Rpi_ms (must be ≥ 32 ms)
   • Ot_Timeout (set to 4× RPI)
4. Call FB_Eip_Scanner from OB1. Wire the connection-list reference, an enable tag, and a heartbeat word (e.g., a 100 ms counter from a system clock).
5. Map the I/O data to your process image using the UDT typeEip_IoData. The FB provides a Run output that latches when the Class 1 connection is open and a Error bit for fault propagation.
6. Download the project to the CPU and observe Diag.DiagWord; bit 0.0 = connection open, bit 0.1 = explicit msg error, bit 0.2 = RPI violation.

Adapter Configuration: Hosting EtherNet/IP on the S7-1500

When the Siemens CPU is the target (Adapter role) — for example, when a Rockwell ControlLogix is the master — the steps mirror the Scanner case with two differences:

1. Configure the assembly instances in the global DB to match what the Scanner expects. Standard FANUC I/O assemblies are 0x64 (consumed from PLC) and 0x65 (produced from robot), but a third-party scanner may be set up to use 0x70/0x71.
2. Set the CPU's IP address and the assembly sizes. A single 32-byte assembly in each direction is a common footprint; the FB will reject a size mismatch.

The Adapter role is functionally symmetric to the Scanner role on the same PROFINET interface, but because the stack is software-based, both roles simultaneously can be supported on the same CPU provided each role has its own connection list and assembly definitions.

RPI Timing Constraints

The RPI (Requested Packet Interval) parameter is the single most critical value in any Siemens EtherNet/IP deployment. Because CIP is implemented in the user-task scheduler, the RPI directly competes with PROFINET IO, the user's OB1 logic, and any other cyclic OBs for CPU time.

Port, Subnet, and PROFINET Coexistence

Whether PROFINET and EtherNet/IP can share a single physical port of the S7-1500 is a frequent point of confusion. Field experience and the official Siemens example indicate the following:

• Both protocols share the same TCP/UDP stack and the same PROFINET port. The CPU can route between subnets.
• However, if PROFINET IO real-time (IRT) and EtherNet/IP cyclic I/O are scheduled on the same interface under heavy load, the OB1 service time for the EtherNet/IP stack increases.
• Recommendation: dedicate one PROFINET port of the CPU to PROFINET (machine IO) and the second port to EtherNet/IP (FANUC, drives, third-party IO). On S7-1200 (single-port) CPUs, do not run IRT PROFINET and EtherNet/IP at the same time on the same port.

Integrating a FANUC Robot via EDA

The FANUC EDA (Ethernet Device Access) interface exposes a subset of CIP assemblies for digital I/O and a tag database. A typical 32-byte I/O mapping looks like the following.

Commissioning steps:

1. On the FANUC controller, enable the EDA option in Menu → Setup → Host Comm → Ethernet/IP. Confirm the IP address matches the Scanner's connection list (e.g., 192.168.10.50).
2. In TIA Portal, set RPI = 50 ms and Ownership Timeout = 200 ms for the robot connection. This is a tested field value for FANUC R-30iB and R-30iB Plus controllers.
3. Map the UOP bits (User Operator Panel: e.g., IMSTP, Hold, SFSPD, Enable, Reset, etc.) into the first 8 bytes of the produced assembly. Use the FB_Eip_Msg block for any non-cyclic tag reads (e.g., fault code fetch) using CIP Get service code 0x0E.
4. Verify that the robot's CIP status word shows Run/Idle = 0x0001 within 5 seconds of PLC run mode.

Limitations and Non-Supported Features

• No EDS import: third-party devices must be configured by manual assembly declaration. This is the single largest deviation from a native Rockwell implementation.
• CIP Safety: not supported. Safety-rated EtherNet/IP traffic (CIP Safety on EtherNet/IP) requires a Safety Logic Solver, a Safety I/O device, and is not part of the S7-1200/1500 software stack. Use PROFINET PROFIsafe for safety.
• CIP Motion: not supported. Drives that depend on CIP Motion (e.g., Allen-Bradley Kinetix) will only operate in regulator-less I/O mode.
• Device-Level Ring (DLR): not supported in the CPU port; redundant ring topologies require an external managed switch or the ProSoft PLX3x gateway with DLR support.
• Web server diagnostics: limited. Use the diag word in the FB instance DB rather than the CPU's web page.

Diagnostics and Fault Mapping

The instance DB of FB_Eip_Scanner exposes a structured diagnostic word. The following table maps the most commonly observed bit patterns.

Verification Procedure

1. Power the cell. Confirm the FANUC EDA LED (or the third-party device's MS/NS LEDs) reports MS = solid green and NS = flashing green within 10 seconds.
2. From the PLC, force the Run tag of FB_Eip_Scanner = TRUE. Watch Diag.ConnOpen rise within 5 seconds.
3. Toggle a bit in the produced assembly (e.g., DO[1] on the robot) and verify the matching bit in the consumed assembly in the PLC's process image is set within 1 × RPI.
4. Read the diag word over the Web server or HMI. All fault bits should be FALSE.
5. Disconnect the Ethernet cable. The ConnTimeout bit must rise within 4 × RPI. Reconnect; ConnOpen must recover within 2 × RPI.

Field-Proven Best Practices

• Always run EtherNet/IP on a dedicated CPU port or VLAN. The CPU's two-port model is the cleanest separation.
• Use a managed switch (e.g., SCALANCE XC-200) with IGMP snooping disabled on the EDA port to avoid CIP multicast storming.
• Set RPI = 50 ms as a starting point for FANUC EDA. 32 ms is achievable but consumes more CPU; 50 ms is the working field default.
• Version-pin the library. The EthernetIP library in TIA Portal V16 differs from V17; mixing FBs from multiple versions in the same project causes silent type-mismatch errors at compile time.
• Document the assembly map in the PLC's HMI faceplate library so the maintenance team can read the diag word without a laptop.

Frequently Asked Questions