Fix S7-1200 PID_Compact V1.2 Not Restarting After Power Failure

Problem Summary

An S7-1200 CPU running three PID_Compact V1.2 loops (configured in TIA Portal V13) for temperature regulation fails to return to closed-loop control after a power loss or a controlled power-down for maintenance. After the CPU completes restart, the loop sits in Inactive and the commissioning dialog shows a status such as Setpoint outside limits, even though the configured setpoint (e.g. 3 °C) is well inside the configured ProcessValueHighLimit (15) and ProcessValueLowLimit (0). Pressing Start in the commissioning panel returns the block to automatic operation, but the next power cycle reproduces the same fault.

The behavior is consistent with PID_Compact losing its internal operating mode and falling back to i_mode = 0 at cold restart, which triggers the early input-validation bit on the very first call. Because PID_Compact V1.2 stores its working point and last mode differently than V2, the V1.2 block requires explicit configuration of the Restart behavior properties to remain in automatic after STOP→RUN and power-up transitions.

Root Cause Analysis

PID_Compact V1.2 in TIA Portal V13 exposes its operating state through the static tag <PID_DB>.sRet.i_mode on the instance DB of each loop. The accepted values, inherited from the PID_Compact application design, are:

After a power loss the CPU reinitializes: the OB100 (warm restart) or OB101 (hot restart) executes, instance DB tags marked Retain are restored from the buffered area, and PID_Compact evaluates its restart properties. On PID_Compact V1.2 the relevant block property is:

• Basic settings > Restart behavior > Enable last mode after CPU restart (default: disabled)

When this property is left at its default, PID_Compact resets to i_mode = 0 on every CPU restart regardless of the previous state. The block then evaluates its inputs on the first cycle: because Setpoint, Input (ProcessValue) and the limit configuration have not yet been committed through a successful iMode = 3 transition, the early-cycle check can latch Setpoint outside limits based on stale configuration. Pressing Start in the commissioning panel writes i_mode = 3, the block re-evaluates limits against the live setpoint/configuration, the alarm clears, and automatic control resumes. That is why the issue appears to be a configuration paradox — the values look valid in the inspector, but the block reports them as invalid until it is initialized through the operator panel.

The reference for this property is the SIMATIC S7-1200/1500 PID control function manual, section 4.2.1.1 Basic settings V1 (page 100 in the released edition), which documents the V1.x block families (PID_Compact V1.x, PID_3Step V1.x). The same property also exists on PID_Compact V2, where it appears as CPU restart behavior with options Run last mode / Go to inactive mode.

Affected Versions and Compatibility

Solution 1 — Enable "Last Mode After CPU Restart"

This is the documented, intended fix and is the first thing to change on every PID_Compact instance in the project.

Prerequisites

• TIA Portal V13 SP1 or higher (V13 SP2 recommended for V1.2 firmware compatibility).
• Project offline; user has Edit rights on the controller and the PID instance DBs.
• The PID instance DB must be configured as Retain on the operator-relevant tags (Setpoint, ManualValue, ProcessValue scaling). This is the default for instance DBs generated by PID_Compact.

Step-by-step

1. Open the TIA Portal project and navigate to the CPU folder of the S7-1200 station.
2. Open each PID_Compact instance (three instances in the reference case) by double-clicking the block in the program.
3. Switch to the Configuration editor (gear icon at the lower-left of the block editor).
4. Select Basic settings → page Restart behavior (formerly labeled "Mode after CPU restart").
5. Tick the checkbox Enable last mode after CPU restart.
6. For V2/V3 blocks: change CPU restart behavior from Go to inactive mode to Run last mode.
7. Compile (Hardware + Software) and download to the CPU. If only the software is changed, perform an Online & Diagnostics → Download to device; the instance DB retain values are preserved.
8. Test the cold-restart path: drive the CPU to STOP, remove the 24 V supply for at least 5 seconds, re-apply power. The CPU executes OB100; PID_Compact reverts to i_mode = 3; the loop resumes automatic control without operator intervention.

Verification

• Open an Watch table on the instance DB and confirm that sRet.i_mode reads 3 within two OB1 cycles of CPU restart.
• In the commissioning panel of each PID, confirm Operating mode = Automatic and no active error bits in ErrorBits.
• Confirm that the last setpoint (e.g. 3 °C) is still present in Setpoint after the power cycle — this proves the retain setting of the instance DB is intact.

Solution 2 — Hardened Watchdog on sRet.i_mode

If the instance DB retain setting cannot be guaranteed (for example because a third-party HMI writes to the DB and unsets the retain attribute on some tags), or if you want to add belt-and-braces protection against the operator commissioning panel being used incorrectly, add a watchdog that re-enters automatic mode whenever the block drops to i_mode = 0.

Reference logic (SCL)

// FB_PID_AutoRestart — drops onto each PID_DB instance
// Inputs: i_PID_DB (VARIANT pointing at the PID_DB), i_AllowRestart (BOOL)
// Outputs: q_State (INT), q_Error (BOOL)

#q_State := "PID_DB".sRet.i_mode;

IF #i_AllowRestart AND "PID_DB".sRet.i_mode = 0 THEN
    // First, force a Reset to clear any latched ErrorBits
    "PID_DB".sRet.i_Mode := 4;          // switch to manual briefly
    "PID_DB".ManualEnable := TRUE;
    "PID_DB".ManualValue  := "PID_DB".Output;   // bumpless transfer

    // Wait one OB1 cycle
    // (in practice use a TON or a rising-edge trigger)

    "PID_DB".sRet.i_Mode := 3;          // request automatic
    "PID_DB".ManualEnable := FALSE;
END_IF;

// Latch an operator-visible error if the block refuses to enter auto
#q_Error := ("PID_DB".sRet.i_mode = 0) AND #i_AllowRestart;

A robust field-proven pattern is to gate the watchdog with a 10 s on-delay timer so that normal mode transitions during pretuning are not masked. Wire the timer output to sRet.i_mode := 3 only when the block has been continuously inactive for >10 s.

Watchdog in LAD

1. Create a TON (IEC timer) with PT = 10 s, IN = ("PID_DB".sRet.i_mode = 0).
2. On the rising edge of the timer Q output, set a coil that writes 3 to "PID_DB".sRet.i_mode using a move box and a coil that pulses "PID_DB".Reset = TRUE for one cycle.
3. Reset the timer the moment sRet.i_mode = 3 is observed, so the watchdog only acts when the block has been stuck.

Solution 3 — Force a Clean Pretuning Pass

If the commissioning panel still reports Setpoint outside limits after Solution 1 and Solution 2, the limit configuration is genuinely inconsistent with the live process value. This is rare but happens when the analog input scaling is changed after the block has already executed. The clean fix is to walk the block through pretuning once:

1. In TIA Portal, open each PID_Compact instance and run Commissioning → Pretuning. If Sensor commissioning is enabled (PID_Compact V1.2 + analog input scaling), run that first.
2. Observe the Status field; it should progress through Sensor commissioning (1) → Pretuning (2) → Automatic (3) without errors.
3. If Pretuning reports Setpoint outside limits, check Config.InputScaling.UpperPointIn / LowerPointIn and the analog input wiring at the SM module. On S7-1200 the SB or SM input type must match the sensor type (e.g. Pt100 RTD on a 4-wire input).
4. Once pretuning completes successfully, the working point is committed and the next cold restart will report the correct limits.

Diagnostics: Reading ErrorBits

PID_Compact V1.2 surfaces a 16-bit ErrorBits structure on the instance DB. Knowing the bit pattern removes the guesswork from "Setpoint outside limits" alarms:

In a watch table, observe <PID_DB>.ErrorBits as W#16#0002 for the case described — bit 1 (Setpoint outside limits) confirms the alarm.

Hardening Checklist for the S7-1200 PID Project

1. Tick Enable last mode after CPU restart on every PID_Compact instance.
2. Confirm each instance DB has its Retain attribute set so that Setpoint, ManualValue, Output, and the PID gains survive power loss.
3. In TIA Portal V13, under CPU properties → Retain memory, ensure enough retain bytes are reserved. Each PID_Compact V1.2 instance DB consumes roughly 300–400 bytes of retain depending on configuration.
4. Wire a TON watchdog (10 s) on sRet.i_mode = 0 for every loop, with a Reset pulse to clear stale ErrorBits.
5. In HMI tags (WinCC Comfort/TIA), use Cyclical acquisition of sRet.i_mode and ErrorBits; raise a message in the HMI log if i_mode < 3 for > 30 s.
6. Add a UPS or use the S7-1200 capacitor-backed retain time: an S7-1214C with the Maintain power-down setting on the analog SM can hold retain values for up to 100 h after power loss. Use this to avoid the cold-restart code path entirely when the power-loss duration is short.
7. Document the alarm in the operating manual: "After power-up the controller returns to automatic control within 5 s; if it does not, press Start in the controller faceplate."

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