Fix S7-315-2DP MPI Communication Errors: 13:4542 and 33:16944

1. Problem Summary: S7-315-2DP MPI Communication Failure

The SIMATIC S7-300 CPU 315-2DP with order number 6ES7315-2AF03-0AB0 fails to establish an online connection to STEP 7 over the onboard MPI interface. The same programming device (PG/PC) communicates successfully with an S7-400 CPU but cannot reach the 315-2DP over either the MPI port or the PROFIBUS DP port. STEP 7 reports the following messages:

• Upload station to PG (13:4542): "Connection to the module could not be configured."
• Download (33:16944): "Other active partner can't be found."

The fault survives a CP 5611 reconfiguration, an auto-detect of the PG/PC interface, and a separate programming attempt of the load memory card on the PG side. Because the CPU appears to be electrically intact (an attempt is made to handshake on the bus), the failure is typically a mismatch between the PG's expected bus parameters and the CPU's actual MPI parameters, an issue with the load memory card, or an undetected hardware fault on the MPI/DP transceiver.

2. Affected Hardware Identification

The 6ES7315-2AF03-0AB0 belongs to the early "AF03" revision of the 315-2DP. It uses a FEPROM card rather than the MMC card used by later "AG10"/"AH14" revisions. Substituting an MMC into an AF03 slot does not work; substituting a FEPROM into an AG10 slot does not work either.

3. STEP 7 Error Code Reference

3.1 Error 13:4542 — "Connection to the module could not be configured"

STEP 7 online functions report error class 13 when the requested S7 connection cannot be established through the configured PG/PC interface. The sub-code 4542 indicates that the configuration data (the S7 project downloaded to the PG/PC's "Accessible Nodes" table) does not match the rack/slot of the responding module, or that no module is reachable at the configured MPI/DP address at all. Typical underlying causes:

• Configured target MPI address differs from the CPU's actual address.
• Bus parameters (baudrate, profile) of the PG do not match the CPU.
• The CPU is in STOP with a fault that has cleared the interface (e.g., missing or invalid load memory).
• Hardware fault on the MPI/DP transceiver (rare).

3.2 Error 33:16944 — "Other active partner can't be found"

Error class 33 is the "Active Partner" class generated by the online services when no FDL/MPI token-passing partner responds to the connection request. Sub-code 16944 means the request was issued on a bus segment where no slave acknowledged. This is almost always a physical-layer or parameter-mismatch symptom:

• Wrong cable or bus terminator missing.
• Baudrate mismatch between PG and CPU.
• CPU address reserved as a passive station or set to a value the PG does not scan.
• PG/PC interface not configured as "Only master on bus" on a multi-master segment.

4. Root Cause Analysis

The symptoms — same PG works against S7-400 but not 315-2DP — strongly indicate a fault local to the 315-2DP subsystem rather than a global PG/PC problem. Ranked by likelihood for an idle cabinet that has been re-energized after long storage:

1. Baudrate mismatch. The CPU's MPI baudrate may have been modified previously by a project download. STEP 7 "auto" mode scans 19.2 / 187.5 / 1500 kbit/s but can fail on segments with high capacitance or terminated stubs. Manual baudrate selection is required.
2. Empty or invalid load memory. After a long idle period with power removed, an old FEPROM can lose contact or hold an obsolete project referencing an MPI address the cabinet no longer supports. The CPU powers up in STOP and refuses download if the load memory is unreadable.
3. Bus topology fault. MPI bus connector not seated, terminating resistor (the slide switch on the PROFIBUS connector) left ON at the wrong station, broken shield bonding.
4. PG/PC interface configuration. The CP 5611's "PG/PC is the only master on the bus" option must be enabled; otherwise the PG will not initiate a passive-station connection.
5. CPU hardware fault. Defective MPI/DP transceiver on the 315-2DP. The CPU's BF (bus fault) LED on the DP port will be lit solidly when this is the case.
6. STEP 7 ↔ CPU firmware incompatibility. Some STEP 7 V5.x service packs reject older firmware with a connection-refused response that surfaces as 33:16944.

5. Preliminary Verification Checklist

Before opening a project or swapping hardware, complete these checks in order. Each step is independent and resolves one of the failure causes listed above:

1. Confirm the cabinet has been powered up for at least 30 seconds; the 315-2DP performs a self-test (all LEDs briefly ON, then a self-test blink pattern) lasting up to 10 seconds.
2. Verify the SF, BF, DC5V, and FRCE LEDs. Reference state for a healthy CPU waiting for download: SF off, BF off (or brief blink), DC5V on, FRCE off, STOP LED steady on, RUN LED off.
3. Read the CPU's diagnostic buffer by mode-switching to MRES → STOP → RUN-P and watching the SF blink sequence if no online connection is available. The 315-2AF03 uses the S7-300 diagnostic-buffer blink protocol via the SF LED.
4. Confirm the MPI cable is a SIMATIC MPI cable (6ES7901-0BF00-0AA0, pre-assembled, with PG end labeled) and that the bus connector's terminating switch is OFF on intermediate stations and ON only at the two physical ends of the segment.
5. Inspect the load memory slot. The FEPROM card must be seated fully; the ejector button should click. A partially inserted FEPROM card is a common cause of intermittent MPI errors on aged hardware.
6. Verify the mode switch is in RUN-P or STOP (not MRES), since MRES performs a memory reset that wipes the load memory contents.

6. CP 5611 / PG Interface Configuration

The communication processor referenced in many field reports as "CP 6411" is, in practice, the CP 5611 (PCI) or the related CP 5511 (PCMCIA), CP 5711 (USB), and CP 5613 / CP 5614 (PCI with diagnostics). The "CP 6411" designation is a typographical variant and does not correspond to a Siemens catalog number. Use the correct Siemens naming when reordering.

6.1 STEP 7 Set PG/PC Interface — Manual Selection

From the Windows Start menu, open SIMATIC → STEP 7 → Set PG/PC Interface and choose the following:

Switching from "CP5611(auto)" to the manual "CP5611(MPI)" entry eliminates the auto-detect baudrate scan, which can fail if any segment repeater or optical link module has a longer turnaround than the scan timeout.

6.2 STEP 7 Set PG/PC Interface — Diagnostics

Open Set PG/PC Interface → Diagnostics and click Test. The diagnostics window shows:

• Bus OK: PG sees itself on the bus.
• Node list: all MPI addresses responding on the segment.
• Module identification: order number, firmware, and rack/slot of each responder.

If the CPU does not appear in the node list at the expected address (default 2), the fault is physical-layer or baudrate. If it appears, the fault is in the project's connection configuration.

7. MPI Baudrate and Address Diagnostics

The 315-2AF03 supports MPI at 19.2 kbit/s and 187.5 kbit/s only. It does not support 1.5 Mbit/s or 12 Mbit/s MPI; those rates require later CPU revisions. If the bus has been re-terminated or the project's "PG/PC Interface → Properties → Transmission rate" was set higher than the CPU supports, every connection attempt will fail with 33:16944.

7.1 Forced baudrate scan

Use CP5611(MPI) → Properties → Transmission rate → 187.5 kbit/s and re-run the diagnostics test. If 187.5 kbit/s fails, drop to 19.2 kbit/s and retry. The 315-2AF03 with very long bus segments or noisy environments frequently runs at 19.2 kbit/s.

7.2 MPI address scan via Accessible Nodes

In SIMATIC Manager, choose PLC → Accessible Nodes. This launches a passive scan on all supported MPI baudrates. If the CPU does not appear, the network scan is timing out. Verify:

1. Cable continuity end-to-end.
2. Terminating resistors (typically ON at the two ends of the segment, OFF elsewhere).
3. Shield bonded at one end only to ground.
4. No more than 32 stations total per segment (repeater doubles to 64).

7.3 MPI address conflict check

Two stations on an MPI segment may not share an address. If another device (an OP/TP panel, a drive, or a second PG) is at MPI address 2, the 315-2AF03 will not respond. The diagnostics node list shows duplicates as a single entry; check the project's HW Config → CPU Properties → MPI Interface → Address against every other device on the bus.

8. PROFIBUS DP Port Verification

The 315-2DP's second port (X2) is a PROFIBUS DP master/slave. It uses PROFIBUS bus connectors (6ES7972-0BA12-0XA0 with PG socket, or 6ES7972-0BB12-0XA0 without) — the same family as MPI but terminated to 220 Ω for the DP segment. Attempting to connect to a DP-only configured station when the CPU's DP port is disabled in the project will produce a connection failure identical to 13:4542.

To use the DP port for programming:

1. In HW Config, set the DP port to DP master or non-configured (the latter allows passive PG connection without a configured master).
2. Set DP baudrate to 1.5 Mbit/s (default for a single-segment DP) and address the CPU at its DP address (default 2 if never changed).
3. Set the PG/PC interface in STEP 7 to CP5611(PROFIBUS) — the profile must be PROFIBUS, not MPI, when connecting to X2.

9. SIMATIC Memory Card Handling

9.1 Correct card type for 6ES7315-2AF03-0AB0

Standard MMC cards (6ES7953-1LG00-0AA0 and the 8 GB / 2 GB / 4 GB variants) are not compatible with the AF03 revision.

9.2 Programming the FEPROM card on the PG

To program a FEPROM card on the programming device directly:

1. Insert the FEPROM card into the SIMATIC PC card adapter (6ES7792-0AA00-0XA0).
2. Insert the adapter into the PG's PCMCIA slot.
3. In SIMATIC Manager, choose PLC → Save to Memory Card → FEPROM. The "Save to Memory Card" dialog displays the target card's order number and capacity.
4. Select the block container (S7 Program → Blocks) and confirm.

9.3 Programming the FEPROM card in the CPU

The card can be programmed in-place via the online connection if the CPU is in STOP or RUN-P:

1. Establish online connection with the CPU.
2. Choose PLC → Save to Memory Card; STEP 7 prompts to either overwrite the load memory or update selectively.
3. For a total reload, mark the entire Blocks container.

9.4 Common card-related faults

10. CPU Hardware Health Verification

If the bus scan, baudrate, and card checks all pass but 13:4542 / 33:16944 persist, the CPU hardware is suspect. Field-proven health checks:

1. Power supply check. Measure +24 V DC at terminals L+ and M of the PS 307. Sag below 20.4 V DC will cause the 315-2DP's MPI/DP transceiver to drop packets, producing intermittent 33:16944 errors. Acceptable range per Siemens datasheet: 20.4 to 28.8 V DC.
2. Backplane bus termination. The CPU is the leftmost module on rail 0. If a blank cover is missing from a slot and the bus terminator in the backplane is misconfigured, the MPI interface will report faults.
3. Mode switch contacts. Oxidized mode-switch contacts can hang in an indeterminate state. Cycle RUN → STOP → RUN-P three times; the CPU should respond to each transition with a STOP/RUN LED change.
4. MRES reset. Place the mode switch in MRES for 3 seconds; the CPU performs a memory reset and reverts to factory MPI defaults (address 2, baudrate 187.5 kbit/s). If the fault was a corrupt configuration, MRES restores connectivity.
5. Cold start from FEPROM. Power down, remove the FEPROM card, power up, and re-insert the FEPROM after 10 seconds. This forces a complete load-memory re-read.

11. Restoration Procedure via Power Interruption

When online communication cannot be established at all, the standard field recovery is to write the project to a FEPROM card externally and use a controlled power interruption to force the CPU to reload from card. Procedure:

1. Power down the PS 307.
2. Insert a pre-programmed FEPROM card into the CPU's load memory slot.
3. Restore +24 V DC. The CPU powers up, reads the FEPROM, and transitions to RUN if the project is consistent.
4. If the CPU still reports SF and stays in STOP, the project on the card is inconsistent (for example, a configured module that is not physically present). Re-edit the HW Config offline, save to the card, and repeat.

12. Verification and Acceptance Test

After a successful fix, run the following acceptance test to confirm the link is healthy:

1. Open Set PG/PC Interface → CP5611(MPI) → Diagnostics → Test; verify the 315-2DP appears in the node list at the expected address with order number 6ES7315-2AF03-0AB0.
2. Open PLC → Accessible Nodes; double-click the CPU to open the online view.
3. Open PLC → Diagnostic/Setting → Operating Mode; switch to RUN-P.
4. Read the diagnostic buffer (PLC → Diagnostic/Setting → Diagnostic Buffer); confirm no "MPI connection fault" entries remain after the fix.
5. Download the project (PLC → Download); expect a successful completion message with no error 33:16944.
6. Upload a block (PLC → Upload to PG); expect success with no error 13:4542.
7. From the online view, monitor a known tag and toggle it via the VAT to confirm the data path is fully functional.

13. Escalation Path

If all steps above resolve without online communication:

1. Replace the bus cable and bus connectors with known-good assemblies.
2. Move the PG directly to a short (<1 m) MPI cable to the CPU's MPI port, bypassing the cabinet bus; this isolates bus topology from CPU faults.
3. Try a second CP 5611 (or CP 5511 / CP 5711) — a marginal CP card can produce exactly this symptom set.
4. Replace the CPU with a verified-good spare; if communication succeeds with the spare, the original CPU's MPI/DP transceiver has failed and the unit is end-of-life for repair.

14. Frequently Asked Questions