Fixing @CPU_RT Chart Generation Failure in SIMATIC PCS 7 V8.0+SP2

David Krause10 min read
Process ControlSiemensTroubleshooting
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Problem Overview

When compiling a SIMATIC PCS 7 V8.0+SP2 project with the "Generate module drivers" option enabled, the system chart @CPU_RT fails to appear under the S7 program. The CFC compiler completes without errors, other charts compile normally, and the only warning reported is "exceeded warning limit for the communication jobs". On an AS 417-5H PN/DP with firmware V6.0.8, the @CPU_RT instance is missing from the S7 program folder after a full recompile. This article documents the verified root causes and corrective procedures for this scenario.

Function of the @CPU_RT Chart

The @CPU_RT is a system-generated CFC chart that provides deterministic overload handling for the PCS 7 automation system. It is instantiated automatically by the CFC compiler the first time a project is compiled with channel driver blocks present in the project tree.

The chart contains the @CPU_RT block instance, which performs the following functions during runtime:

  • Monitors the OB1 cycle time against the configured maximum cycle monitoring time
  • Triggers OB82 (diagnostic interrupt) when the cycle time limit is approached, rather than letting the CPU enter STOP mode
  • Records the last 10 cycle overrun events with timestamp and duration in the instance DB
  • Generates a trend view in WinCC of current and average cycle times
  • Supports redundancy in H-systems by switching the monitoring role on failover

If the cycle monitoring time is exceeded and the controller has not been fitted with the @CPU_RT block, the controller stops abruptly. With @CPU_RT, the controller continues running in degraded mode and the operator is notified through the diagnostic alarm stack instead of an uncontrolled CPU STOP.

Reference: Siemens Support - Prevention of overload using CPU_RT (PCS 7 V10.0)

Symptom Definition

The following conditions reproduce the failure:

  1. Open SIMATIC Manager with the affected PCS 7 V8.0+SP2 project
  2. Open the CFC editor for any S7 program
  3. Confirm Options > Chart compilation > Generate module drivers is checked
  4. Right-click the S7 program folder and select Charts > Compile
  5. Compile completes with zero errors
  6. Open the S7 Program > Charts folder - @CPU_RT is absent
  7. Compile log contains the warning "exceeded warning limit for the communication jobs"

The project may contain dozens of CFCs that compile cleanly and the AS 417-5H PN/DP may be on current firmware. Yet the chart is not generated and the warning does not stop the compile pass.

Root Cause Matrix

# Root Cause Detection Method Resolution Path
1 CPU firmware below minimum HW Config > CPU Properties > Identification Update firmware to PCS 7 V8.0+SP2 baseline
2 No channel driver block in any CFC Search S7 program for Pcs7AnIn, Pcs7DiIn, CH_AI, CH_DI Place at least one driver block
3 Migration without "Use new functions" Migration log file in project folder Re-migrate with new functions enabled
4 Communication warning limit exceeded Compile log "warning limit exceeded" Reduce S7 connections or raise warning limit
5 PCS 7 APL master data library missing SIMATIC Manager > Options > Install Master Data Library Install APL V8.0+SP2
6 Wrong S7 program selected Plant view hierarchy Compile the S7 program that owns the @CPU_RT
7 Compile pass interrupted Compile log "compile aborted" Re-run full compile after fixing above

Cause 1: CPU Firmware Below Minimum

The @CPU_RT chart depends on CPU firmware features that vary across the S7-400 and ET 200SP CPU families. PCS 7 V8.0+SP2 supports the following CPU types and firmware levels:

CPU Type Article Number Min FW for @CPU_RT Min FW for V8.0+SP2
AS 410S Smart (CPU 1518-4 PN/DP) 6ES7518-4AP00-0AB0 V2.6 V2.8
AS 410E (CPU 410E single) 6ES7410-5HM08-0AB0 V8.0 V8.2
AS 410H (CPU 410H redundant) 6ES7410-5HR08-0AB0 V8.0 V8.2
AS 416-3 PN/DP (single) 6ES7416-3ES06-0AB0 V5.0 V6.0
AS 417-4 (single) 6ES7417-4XT05-0AB0 V5.0 V6.0
AS 417-4H (redundant) 6ES7417-4HR05-0AB0 V4.5 V6.0.x
AS 417-5H PN/DP (redundant) 6ES7417-5HT06-0AB0 V4.5 V6.0.x

For an AS 417-5H PN/DP running firmware V6.0.8, the firmware level is well above the @CPU_RT minimum and not the root cause. Verify the firmware in HW Config: right-click the CPU slot > Object Properties > Identification tab. The "Module" and "Version" fields report the loaded firmware.

Cause 2: No Channel Driver Block Placed

The CFC compiler generates the @CPU_RT chart only when the project contains at least one channel driver block from the PCS 7 APL library. Driver blocks are the integration points between the I/O modules and the application CFCs.

Recognized driver block families:

  • Pcs7DiIn, Pcs7DiOut - digital inputs and outputs
  • Pcs7AiIn, Pcs7AiOut - analog inputs and outputs
  • Pcs7Cnt1, Pcs7Cnt2 - counter functions
  • Pcs7ModPre - module preprocessing
  • Pcs7Mot - motor block (when used with CH_xxx drivers)
  • CH_AI, CH_DI, CH_AO, CH_DO - legacy driver blocks (V7.x compatibility)
  • CH_CNT, CH_PMS - legacy counter and pump/valve drivers

Diagnostic procedure:

  1. In SIMATIC Manager, select the S7 program
  2. Open Options > Chart References > Block Search
  3. Search for Pcs7* blocks - count must be greater than zero
  4. If zero, search for CH_ blocks
  5. If both return zero, the project has no driver blocks and @CPU_RT will not generate even with the option enabled
A project that consists only of pure application blocks (motors, valves, custom blocks) without a single channel driver will skip @CPU_RT generation. This is the most common cause and is often missed because the project appears to compile successfully.

Workaround to force generation: place a single Pcs7DiIn block on any unused DI channel of an existing ET 200M/SP station in the project. This satisfies the compiler trigger condition. The dummy block can be removed once the @CPU_RT is generated, or kept in place if it serves as a future channel reservation.

Cause 3: Project Migration Without New Functions

Projects upgraded from PCS 7 V6.x or V7.x to V8.0+SP2 via the migration wizard retain their original structure unless the wizard's "Use new functions" option is selected. When unchecked, the project keeps legacy structures and the compiler skips generation of new system charts including @CPU_RT.

Migration paths to V8.0+SP2:

Source Version Migration Step Requires New Functions?
PCS 7 V6.0 Direct migration to V8.0 Yes - mandatory
PCS 7 V6.1 Direct migration to V8.0 Yes - mandatory
PCS 7 V7.0 Direct migration to V8.0 Yes - mandatory
PCS 7 V7.1 Direct migration to V8.0 Yes - mandatory
PCS 7 V8.0 Update to V8.0+SP2 Inherits previous settings
PCS 7 V8.0+SP1 Update to V8.0+SP2 Inherits previous settings

Corrective migration procedure:

  1. Close SIMATIC Manager
  2. Back up the original project under a different name
  3. Re-open SIMATIC Manager
  4. File > Migrate Project
  5. Select the source project backup
  6. In the wizard step "Settings" enable "Use new functions" / "PCS 7 V8 functions"
  7. Complete the migration
  8. Recompile all S7 programs in the project
  9. Verify @CPU_RT is generated in each S7 program

Cause 4: Communication Warning Limit Exceeded

The "exceeded warning limit for the communication jobs" warning indicates the project has configured more S7 connection resources than the default warning threshold. While not a direct cause of missing @CPU_RT, in some edge cases the compiler aborts the chart generation pass when it cannot allocate the required connection resources for the diagnostic blocks of the CPU_RT instance.

The PCS 7 V8.0+SP2 default warning threshold for communication jobs is 60 jobs per S7 program. An H-system with multiple OS servers and engineering stations can quickly exceed this number.

Resolution procedure:

  1. CFC Editor > Options > Compile > Settings
  2. Open the "Warning Limits" tab
  3. Locate the "Communication jobs" parameter
  4. Increase from 60 to 90 (or a value matching the project's actual job count)
  5. Click OK
  6. Right-click S7 program > Charts > Compile

Reference: Siemens Support - Prevention of overload using CPU_RT (PCS 7 V9.0 SP1)

Cause 5: PCS 7 APL Master Data Library Missing

The @CPU_RT chart master data is stored in the PCS 7 APL master data library. If the library was not installed or was corrupted, the compiler cannot instantiate the chart.

Diagnostic procedure:

  1. SIMATIC Manager > Options > Install Master Data Library
  2. Select the project
  3. Check whether the APL_V80_SP2 library is present
  4. If missing, run the PCS 7 V8.0+SP2 setup and add the APL master data library
  5. Restart SIMATIC Manager
  6. Recompile the project

Diagnostic Decision Flow

@CPU_RT Generation Failure Diagnostic Flow Start: @CPU_RT missing FW >= min for V8.0+SP2? No Yes Update FW to V6.0.x Driver block present? No Place Pcs7DiIn driver Yes Migrated w/ new fn? No Re-migrate project Yes APL library loaded? No Install APL V8.0+SP2 Yes Raise comm warning limit Recompile and verify @CPU_RT

Step-by-Step Verification Procedure

After applying the corrective action for any of the root causes, perform the following verification sequence:

  1. In SIMATIC Manager, expand the S7 program folder structure: S7 Program > Charts
  2. Look for the @CPU_RT chart - it must appear alongside the other CFC charts
  3. Double-click @CPU_RT to open it - the sheet must display the @CPU_RT block instance
  4. Inspect the block inputs:
    • LIMIT_CYCL - cycle time limit in ms (default 1000 ms)
    • WARN_CYCL - warning threshold in ms (default 80% of LIMIT_CYCL)
    • RESET - reset of overrun history (BOOL)
    • OVR_CNT - overrun counter (output)
    • OVR_TIME - timestamp of last overrun (output)
  5. Download to the AS (HW Config + S7 program)
  6. Open the @CPU_RT chart in online mode
  7. Switch to the cycle time view - verify current and average cycle times are populated
  8. In WinCC, navigate to the @CPU_RT faceplate and confirm the trend curve displays

Field Commissioning Notes

During commissioning, the @CPU_RT must be tested under load. The standard acceptance procedure is:

  1. Set LIMIT_CYCL to the configured OB1 maximum cycle monitoring time (default 6000 ms on AS 410, default 2000 ms on AS 416/417)
  2. Generate simulated process values to drive 100% of CFCs
  3. Monitor @CPU_RT instance DB and confirm overrun count
  4. If overruns exceed 5 in 10 minutes, identify the offending CFC and optimize its runtime
  5. Capture a one-hour trend of AVG_CYC for the commissioning report

Two important runtime behaviors to note:

  • The CPU_RT block calls OB1 in a secondary cycle and reports overruns to OB82
  • If the cycle control point is reached after a further 6 seconds without @CPU_RT, the CPU enters STOP. With @CPU_RT, OB82 fires and the AS continues in degraded mode while raising an alarm

Trend View in WinCC

The @CPU_RT chart contributes a runtime trend to the OS. Configure it as follows:

  1. In WinCC Explorer, open Tag Management
  2. Locate the @CPU_RT instance DB tags: CYC_TIME, AVG_CYC, OVR_CNT, OVR_TIME
  3. Add them to a trend view in the area picture @CPU_RT.pdl
  4. Set update time to 1 second
  5. Archive the AVG_CYC tag to enable historical analysis
  6. Add the OVR_CNT tag to the alarm log for overrun notifications

Troubleshooting Matrix for Related Symptoms

Symptom Likely Cause Action
@CPU_RT generated but instance DB missing after download Partial download - only S7 program, not HW Config Full download including HW Config
@CPU_RT shows cycle time of 0 ms online OB1 not running / CPU in STOP Investigate CPU diagnostic buffer
@CPU_RT overrun count increments but OB82 not firing OB82 not loaded in CPU Add OB82 in S7 program blocks
Multiple @CPU_RT charts in one S7 program Project contains sub-projects with separate S7 programs Consolidate or accept one per S7 program
@CPU_RT chart present but cannot be deleted System chart - protected by compiler Disable Generate Module Drivers, recompile, then manually delete
@CPU_RT chart present but @CPU_RT faceplate missing in WinCC OS compilation not run after CFC compile Run OS server full compile and download

FAQ

What CPU firmware is required for @CPU_RT on an AS 417-5H PN/DP running PCS 7 V8.0+SP2?

For an AS 417-5H PN/DP (article 6ES7417-5HT06-0AB0), firmware V4.5 or higher is required to use @CPU_RT, and V6.0.x is the recommended baseline for PCS 7 V8.0+SP2. A system on FW V6.0.8 already exceeds the minimum.

Why does @CPU_RT not generate when "Generate module drivers" is enabled?

The CFC compiler generates @CPU_RT only when at least one PCS 7 driver block (Pcs7DiIn, Pcs7AiIn, CH_AI, CH_DI, Pcs7ModPre, Pcs7Cnt1, etc.) exists in any CFC of the S7 program. If none are present, @CPU_RT is skipped silently even with the option enabled.

Can @CPU_RT be created manually if it does not auto-generate?

Yes. Open a new CFC in the S7 program, insert the @CPU_RT block from the PCS 7 APL library, name the chart @CPU_RT, save and recompile. However, this is a workaround only - the underlying cause (missing driver blocks or migration settings) should still be resolved.

What happens if @CPU_RT is absent and the cycle time is exceeded?

Without @CPU_RT, the S7-400 CPU enters STOP mode when OB1 exceeds the configured maximum cycle monitoring time. With @CPU_RT, OB82 (diagnostic interrupt) fires, the operator receives an alarm, and the CPU continues in degraded mode instead of stopping.

Does removing @CPU_RT free up CPU resources?

No. @CPU_RT is a lightweight block that consumes less than 1% of OB1 scan time on AS 410/417 systems. Removing it does not improve performance but exposes the AS to uncontrolled STOP on cycle time overruns. Keep it installed on every PCS 7 AS.

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