S7-1200 Hourly Trigger: RD_SYS_T, DTL_TO_TOD, MOD 3600 Logic

1. Overview

Generating a deterministic boolean trigger on every full hour (HH:00:00) of an S7-1200 CPU real-time clock is a recurring engineering task for shift-change logging, hourly report aggregation, energy-meter freeze registers, and time-of-use (TOU) tariff switching. This reference documents a compact SCL implementation that reads the CPU clock with RD_SYS_T, converts it to milliseconds-since-midnight, and uses the modulo operator to detect the exact hour boundary. The technique is scan-time tolerant, requires no external library, and ports to any S7-1200/1500 project built with TIA Portal V14 or later.

The complete one-line condition that produces the trigger is:

#Trig := ((TOD_TO_DINT(DTL_TO_TOD(RD_SYS_T(#t))) MOD 3600000) = 0);

The remainder of this document breaks down the math, the underlying data types, the edge cases (power-up behavior, scan period, 23:59:59 to 00:00:00 wrap), and the production-grade alternatives including the Siemens Schedule library and time-of-day hardware interrupts.

2. Prerequisites

3. Data Types: DTL and TOD

3.1 DTL (Date and Time, Long)

DTL is a 12-byte structured data type that stores the full calendar date and time with nanosecond resolution. The CPU writes a DTL value when RD_SYS_T is called. Layout (byte offsets in the PLC memory image):

3.2 TOD (Time of Day)

TOD is a 4-byte IEC 61131-3 type that holds milliseconds elapsed since midnight (00:00:00.000). It does not carry the date. Range: 0 to 86,399,999 ms which equals 24 hours minus 1 ms.

3.3 Conversion Path

The trigger logic chains three conversions:

1. DTL to TOD with DTL_TO_TOD which strips YEAR/MONTH/DAY/WEEKDAY/NANOSECOND and returns the time-of-day in milliseconds.
2. TOD to DINT with TOD_TO_DINT which returns the millisecond count as a 32-bit integer.
3. Arithmetic: apply MOD 3600000 directly on the millisecond count. The remainder is 0 only during the second 00 to 999 of every hour, that is HH:00:00.000 to HH:00:00.999.

Alternative equivalent form: divide by 1000 first to obtain integer seconds, then test MOD 3600 = 0. Both forms yield the same boolean for an exact boundary; the MOD 3600000 form avoids a divide and matches the canonical Siemens example.

4. RD_SYS_T Instruction Reference

RD_SYS_T reads the current local time of the CPU's real-time clock and writes it to a DTL tag. Signature:

RD_SYS_T(OUT := <DTL tag>, RET_VAL := <status word>);

The instruction is non-blocking and executes in a few microseconds. It must be called at least once per scan to refresh the working variable; the variable does not auto-update.

5. FB Interface Definition

Create a new function block (for example FB_HourTrigger) with the following interface in TIA Portal:

6. Implementation Method 1 - Explicit CASE Statement

The first method enumerates the 24 possible seconds-since-midnight values that represent an hour boundary. This form is easy to audit line-by-line in code review:

// FB_HourTrigger - Method 1 (verbose)
#Error_Status := RD_SYS_T(#t);
#Time_Of_Day := DTL_TO_TOD(#t);
#Trig := FALSE;
CASE (TOD_TO_DINT(#Time_Of_Day) / 1000) OF
    0,      // 00:00:00
    3600,   // 01:00:00
    7200,   // 02:00:00
    10800,  // 03:00:00
    14400,  // 04:00:00
    18000,  // 05:00:00
    21600,  // 06:00:00
    25200,  // 07:00:00
    28800,  // 08:00:00
    32400,  // 09:00:00
    36000,  // 10:00:00
    39600,  // 11:00:00
    43200,  // 12:00:00
    46800,  // 13:00:00
    50400,  // 14:00:00
    54000,  // 15:00:00
    57600,  // 16:00:00
    61200,  // 17:00:00
    64800,  // 18:00:00
    68400,  // 19:00:00
    72000,  // 20:00:00
    75600,  // 21:00:00
    79200,  // 22:00:00
    82800:  // 23:00:00
        #Trig := TRUE;
END_CASE;

This method has zero math beyond integer division and is straightforward. The drawback is verbosity: 24 constants must be maintained. If the same FB is used for 15-minute or 30-minute triggers the constant list grows proportionally.

7. Implementation Method 2 - MOD 3600 (Recommended)

The modulo operator reduces the 24-element CASE list to a single expression. This is the production-grade form:

// FB_HourTrigger - Method 2 (recommended, full SCL source)
#Error_Status := RD_SYS_T(#t);
#Time_Of_Day := DTL_TO_TOD(#t);
#Trig := ((TOD_TO_DINT(#Time_Of_Day) MOD 3600000) = 0);

// Rising-edge detection for single-scan pulse
#R_Trig_Inst(CLK := #Trig, Q => #Trig_Pulse);

The trigger boolean is TRUE during the entire 1000 ms interval starting at HH:00:00.000. The R_TRIG instance converts this 1-second-wide pulse into a one-scan pulse suitable for counters, SOE records, or edge-triggered logs.

8. Timing Behavior - SVG Diagram

9. Power-Up and Cold-Start Behavior

S7-1200 retains the RTC across power cycles if the optional battery card is installed (6ES7297-0AX30-0XA0 for early CPUs; integrated on later models). Without a battery, the RTC restarts at 01.01.2000 00:00:00 on power-up. The trigger will fire once at that wall-clock value, which is usually not the desired behavior.

Two practical remedies:

1. Enable NTP synchronization. Configure the CPU NTP client in Device Configuration > Time of Day > NTP mode (S7-1200 V4.4 and later). The first trigger after boot may be late, but subsequent triggers are accurate to within the NTP poll interval.
2. Suppress the first N triggers. Use a startup counter that ignores the first N hourly triggers after a STOP to RUN transition. Counter initial value should equal the suppression count; decrement on each Trig_Pulse; only allow downstream action when counter reaches 0.

// Suppress first 2 triggers after startup
IF "FirstScan" THEN
    #SuppressCount := 2;
END_IF;
#Trig_Pulse := FALSE;
IF #R_Trig_Inst.Q AND #SuppressCount = 0 THEN
    #Trig_Pulse := TRUE;
END_IF;
IF #R_Trig_Inst.Q AND #SuppressCount > 0 THEN
    #SuppressCount := #SuppressCount - 1;
END_IF;

10. Alternative - Siemens Schedule Library (LGF_Schedule)

For shift schedules, weekend/holiday suppression, and multi-event cron-style timing, the Siemens LGF_Schedule block from the Library of General Functions (LGF) is the production-grade choice. Reference: Siemens Support entry 109479728 - LGF Schedule function block.

The LGF block accepts a structured schedule (start time, end time, weekdays, dates) and returns a boolean "active" output. It is heavier than the MOD technique (kilobytes of code versus tens of bytes) but eliminates the maintenance burden of listing 24 constants and supports complex weekly and monthly patterns out of the box.

11. Alternative - Time-of-Day Hardware Interrupt (OB10)

For applications that need the absolute minimum jitter (sub-scan accuracy), configure OB10 as a time-of-day interrupt and arm it to fire on the next HH:00:00. The CPU schedules the OB within plus or minus 1 ms of the requested time, irrespective of the OB1 cycle. Configuration is in Device Configuration > Properties > Time of Day Interrupts in TIA Portal.

OB10 is appropriate when:

• The action must happen at a precise instant (for example TOU tariff switch at midnight).
• Multiple time-of-day events are needed (arm OB10 for each, then re-arm inside the OB itself).
• OB1 is long (for example 500 ms) and the consumer cannot tolerate the latency.

For sub-hourly precision (for example firing every 15 minutes on a 60 ms OB1), OB10 is not the right tool - use a cyclic interrupt OB (OB30 to OB38) with the appropriate phase offset.

12. Cross-Platform Portability

The MOD-3600 technique translates directly to other IEC 61131-3 platforms by swapping the system-clock read instruction:

The modulo test is platform-agnostic; only the clock source and conversion differ.

13. Variant Triggers - Minutes, Quarters, Days

The same FB supports any divisor of 86,400,000 ms (24 hours):

For non-divisor intervals (for example "every 7 minutes" or "every 17 minutes") the LGF_Schedule library is required.

14. Verification and Commissioning

1. Watch table test. In TIA Portal, open the FB instance DB and add Trig, Trig_Pulse, Error_Status, and Trig_Prev to a watch table. Force the CPU clock to within seconds of HH:00:00 and observe the boolean transitions.
2. Cross-check with raw clock. Use RD_SYS_T directly in the watch table to confirm the displayed clock matches the expected wall-clock time.
3. Long-duration test. Set the PLC clock to 23:59:55, run for 10 seconds, and confirm exactly one trigger occurs on the 00:00:00 boundary (midnight transition).
4. Scatter-gather trace. In the trace tool, record Trig, Trig_Pulse, and the raw t.HOUR / t.MINUTE / t.SECOND fields across one full hour to confirm pulse width and edge behavior.
5. NTP drift verification. With NTP enabled, run for 72 hours and log the wall-clock time of each trigger; drift should be within plus or minus 1 second of the requested boundary.

15. Troubleshooting Matrix

16. Safety and Operational Notes

17. Frequently Asked Questions