How Do OWEN Logic Shift Registers and Triggers Work?

After the correct memory pattern, data type, and clock path are selected, values load once, remain stored, and leave the block in the intended order. Start by checking the signal sequence; changing memory depth or adding timers will not repair a level signal that generates repeated operations.

Reject the usual quick fixes

Do not start by increasing the shift-register depth. A deeper block stores more values, but it does not correct duplicate writes, skipped reads, or an incorrect load pattern. Likewise, replacing an integer block with a floating-point block changes the data representation, not the sequence.

Get the process running only after identifying which command causes each state change. Then correct the pulse generation and command interlocks.

Check the required data type first

Read the producing signal's type and the consuming block's type. Select an integer memory or int trigger when the complete value is integral. Select floating-point memory or an f trigger when fractional values must survive storage and retrieval.

The proposed sequential memories have depths of 2, 4, or 8 values in both integer and floating-point forms. The parallel-load versions hold four integer or four floating-point values. A type mismatch can cause a rejected connection, an implicit conversion, truncation, or a value that differs at the destination; the actual result depends on the OWEN Logic project configuration.

1. Monitor the value immediately before the memory block.
2. Monitor the stored or output value at Q, where that output is provided.
3. Write one integer test value and, for a floating-point path, one value with a fractional part.
4. If the fractional part disappears, stop changing the clock logic and correct the data path first.

Choose sequential or parallel loading

Count how many source values arrive together. This reading decides the storage architecture.

Sequential memories accept values one after another, retain them, and expose them through shifting. The proposed blocks also distinguish an open output from a clocked output and provide a clock-pulse output for transferring a value into another block. Treat that pulse as a handshake: the downstream block must accept exactly one value for each upstream transfer.

Trace every clock, reset, and load command

Monitor Data, Clock, Reset, and Q for a trigger. For the proposed counter, monitor U, D, R, C, N, and Q. Use a test sequence in which every stored value is different; repeated values hide ordering faults.

1. Hold Data at a recognizable test value.
2. Apply one Clock event and record the resulting Q.
3. Change Data without another clock event. If Q changes, the selected block or wiring is not acting as the required clocked store.
4. Apply a second clock event and verify that Q takes the new value once.
5. Apply Reset only to a trigger variant that includes that input, then record its reset result rather than presuming a particular numeric state.

The description of the floating-point trigger repeats the write wording around Data before naming Clock. Inspect the actual block interface and test the transition above. Do not wire production logic from that wording alone.

Check the counter at zero before replacing it

The proposed CTN 32-2 differs from CTN 32 and the universal CTN by its stated down-count behavior at zero: a pulse on D while Q is 0 does not move the count to the maximum value. It also separates count-up U, count-down D, reset R, and preset-load C; C writes the integer value at N.

1. Use C to load a known value from N.
2. Pulse U and verify that Q increments once.
3. Pulse D until Q reaches 0.
4. Apply one more D pulse. The resolving branch is Q remaining at 0.
5. If Q jumps to a maximum value, confirm that the project contains CTN 32-2, not CTN 32 or the universal CTN.
6. Test simultaneous U, D, R, or C commands before commissioning. The stated description does not define command priority, so prevent overlap or determine priority by controlled testing.

Commission the resolving branch

Build the path in small stages. First prove pulse generation with a counter or visible diagnostic signal. Next connect the selected trigger or memory block. Add downstream transfer only after one input event produces one stored operation.

1. Select integer or floating-point storage from the source and destination types.
2. Select a 2-, 4-, or 8-value sequential memory, a four-value parallel-load memory, or a single-value trigger from the capture requirement.
3. Create distinct test values and write them in a recorded order.
4. Read or shift each value once. Compare the observed order with the required process order.
5. Verify the open or clocked output mode used by the application.
6. If chaining blocks, verify one downstream write for each clock pulse emitted by the upstream block.
7. Interrupt and restore the operating state used by the machine, then verify initialization before releasing automatic operation. Storage across that transition is not defined here and must be measured in the target controller.

Record the selected block, data type, depth, pulse source, reset behavior, and test sequence in the project notes. That prevents a later maintenance change from substituting a similar-looking block with different zero, reset, or output behavior.

FAQ

Stop here if the installed block interface differs from the described inputs, if command priority cannot be established safely, or if stored values change across an operating-state transition without a defined initialization path. Contact official OWEN support with the controller model, OWEN Logic version, project file, selected block name, and a trace showing inputs and outputs around the failed event.