Implementing Pulse-Pause Logic with Siemens APL Blocks

Overview

Periodic pulse-pause (PuPa) logic is a recurring requirement in process automation: dust-extraction blowers, duty-cycled ventilation fans, lubrication pumps, CIP dosing pumps, and batch oven purge sequences all need a deterministic ON for X minutes every Y minutes profile. In Siemens PCS 7 the Advanced Process Library (APL) supplies several ready-made function blocks that implement this pattern without writing custom SCL or ladder: AFP (Asymmetric Pulse Generator) from the CFC S7-400 library, PuPa from the Industry Library (IL) V9.0 SP1 or later, TimeTrig (FB1802) from APL V9.1, and the standard PULSEGEN from the CFC library.

This reference shows how to deliver a ventilation cycle of 10 minutes ON every 60 minutes using each block, how to size the PULSEGEN period so that duty cycle stays exact, and how to verify behaviour at runtime using the CFC online view and the WinCC faceplate trend.

Prerequisites

• SIMATIC PCS 7 V9.0 SP2 or later engineering station with STEP 7 V5.6 + CFC V9.0 SP2.
• APL library V9.1 or later installed (required for TimeTrig FB1802). Earlier APL V9.0.x ships only AFP and Timer_P.
• Industry Library V9.0 SP1 or later installed (required for PuPa). The IL is a separately licensed add-on and is not bundled with PCS 7 base.
• AS 410 / AS 400F / S7-400 CPU with firmware that matches the APL version. APL V9.1 SP1 requires CPU firmware ≥ V6.0 for S7-400 and ≥ V8.2 for S7-410.
• CFC chart in the S7 program (Master / Unit / User chart) with access to the digital output tag driving the fan contactor.
• WinCC faceplate of the selected block available in the OS project (recompile OS with the matching APL option package).

Block Selection Matrix

Method 1 — AFP Block (Recommended for Single Fan)

The Asymmetric Pulse Generator AFP produces a recurring output where pulse time and pause time are entered as separate durations. It is the smallest, simplest solution when only one pulse-pause pair is required.

1. Open the CFC chart, drag AFP from Libraries → CFC → S7-400 Blocks → AFP.
2. Wire the enable input ENA to the operator enable tag (default TRUE for always-on).
3. Set PULSE_TM = T#10m (10 minutes ON).
4. Set PAUSE_TM = T#50m (50 minutes OFF).
5. Wire Q_PULSE to the digital output tag that drives the fan contactor (through a motor block such as MotSpd or directly to a DOut).
6. Compile the S7 program and download.

The block alternates 10-minute ON / 50-minute OFF indefinitely from the moment ENA rises. There is no wall-clock anchor — the cycle starts at first enable.

Method 2 — PuPa Block (Multi-Group, Loop-Counted)

The Pulse-Pause PuPa block from the Industry Library supports up to 10 independent groups, each with its own pulse/pause duration, and a global loop counter that determines how many cycles each group executes before stepping to the next.

1. Insert PuPa from Industry Library → Blocks → PuPa.
2. Configure GroupCnt = 1 (only one fan group).
3. Configure LoopCnt = 0 (0 = continuous, no loop termination).
4. Set group 1: P1_TM = T#10m, PA1_TM = T#50m.
5. Enable the block via ENA = TRUE.
6. Wire Q1 to the fan output.

If you need the fan to run only twice per shift and then stop, set LoopCnt = 2; the block will execute two full PuPa cycles and then hold Q1 = FALSE until the next ENA edge.

Method 3 — TimeTrig FB1802 (Wall-Clock Synchronized)

TimeTrig generates a one-shot pulse at a specified minute of every hour. Combined with a downstream Timer_P it produces a deterministic 10-minute window every hour with no cumulative drift.

1. Insert TimeTrig from APL → Blocks → Time → TimeTrig (FB1802).
2. Set PerMode = 4 (mode 4 = periodic, minute-of-hour).
3. Set MinPerHour = 0 (trigger at minute 0 of every hour).
4. Insert Timer_P and set PT = T#10m for ON-delay.
5. Wire TimeTrig.Q → Timer_P.START; wire Timer_P.Q → fan output.
6. Set Timer_P.RUN = TRUE so the timer self-resets when Q falls.

Unlike AFP / PuPa, TimeTrig is anchored to the CPU clock and the pulse always fires at minute 0 — useful when the ventilation must align with shift change or production phase markers.

Method 4 — PULSEGEN (Use with Care)

PULSEGEN is a PID-style pulse-width modulator. Its intended use is to convert a continuous analog control output (e.g., from PIDConL) into a discrete switching signal for a thyristor or solenoid valve. It can be coerced into a PuPa function, but only by sizing the period correctly.

Required relationship:

Duty % = PULSE_TM / (PULSE_TM + PAUSE_TM) = INV

For 10 minutes ON out of a 60-minute cycle: INV = 10 / 60 = 0.1667 ≈ 17 %.

1. Insert PULSEGEN from CFC → Standard Library → PULSEGEN.
2. Set PER_TM = T#1h (period).
3. Set INV = 0.1667 (10/60 duty).
4. Set the analog input U = 1.0 (full-scale → max duty).
5. Wire Q to fan output.

Pitfall: The block's period is implemented as a software timer tied to OB1 execution. For PER_TM > T#1m you may see jitter of one OB1 cycle, and on heavily loaded CPUs the pulse can be skipped if the OB1 watchdog is missed. APL guidance (see PCS 7 APL V9.0 documentation) is to prefer AFP or TimeTrig for periods beyond a few minutes.

Pitfall — The 70-Minute Cycle Drift

A common error is to set PER_TM = T#1h10m and INV = 14 % so that 14 % × 70 min = 9.8 min of pulse time. This is mathematically a 10-minute pulse, but the cycle period is 70 minutes, not 60. The fan will therefore turn on 10 minutes later every hour, drifting through the entire day:

Always size PER_TM to the actual desired cycle (T#1h), and compute INV as PULSE_TM / PER_TM.

Pure APL Solution — Two Timer_P in Cascade

If you cannot load the Industry Library and the S7-400 variant of AFP is unavailable on your chart, two Timer_P blocks implement PuPa without any external library:

1. Insert Timer_P_1: PT = T#10m (pulse time). Connect its negated output Q_N to the enable of the second timer. Connect its direct output Q to the fan.
2. Insert Timer_P_2: PT = T#50m (pause time). Connect its negated output Q_N to the enable of Timer_P_1.
3. Add an AND gate with the operator ENABLE signal feeding both timers' STRT input.

To start with pause instead of pulse, swap which timer's direct Q drives the fan and use the negated output of the other timer to feed the first timer's start.

Parameter Reference Table

Verification Procedure

1. Offline syntax check: CFC → Charts → Check Consistency. Any unfilled mandatory pin must be wired or defaulted before the S7 download.
2. Compile and download the S7 program. Verify the instance DB of the block is created in the active S7 program.
3. CFC Online: Open the chart in online view. Force ENA = TRUE. Watch Q_PULSE / Q / Q1 transition between TRUE and FALSE at the configured times. For AFP, an internal CYC flag increments on every cycle transition — useful for cycle counting.
4. WinCC faceplate trend: Add the block's Q tag to a trend. Confirm 10 minutes flat-true followed by 50 minutes flat-false over a 2-hour window.
5. Edge test: Toggle ENA FALSE → TRUE. Confirm the block (re)starts its cycle predictably.
6. Drift test (only for PULSEGEN method): Log Q rising-edge timestamps for 24 h and verify the gap is exactly 60 min ± one OB1 cycle (typically 100 ms).

Troubleshooting Matrix

Operator HMI Considerations

For a ventilation fan the operator usually needs three controls: Auto / Manual, Start / Stop in Manual, and a maintenance bypass that holds the fan ON continuously. Compose these with the pulse-pause output through a small logic block:

• WinCC tag Fan.MODE (0 = Auto/PuPa, 1 = Manual, 2 = Maintenance ON).
• WinCC tag Fan.MAN_CMD (0 = Stop, 1 = Start).
• CFC logic: FanStart = (MODE = 0 AND AFP.Q_PULSE) OR (MODE = 1 AND MAN_CMD) OR (MODE = 2).

Implement this with an OR gate or, preferably, an APL MotSpd block whose Auto_Man input selects between AFP.Q_PULSE (auto) and MAN_CMD (manual). MotSpd also provides a maintenance bypass via its Bypass input, eliminating the need for the third mode.

Safety and Process Notes

• Any ventilation interlock (gas detector, fire alarm, room-temperature high) must override the PuPa output. Implement this through the Permit input of the downstream motor block, not by editing the timer parameters.
• Avoid running PuPa logic through a fail-safe (F-) block set unless the entire fan is safety-rated. AFP, PuPa, and TimeTrig are standard blocks; pair them with an FDB / F-DI for SIL-rated emergency stop.
• For SIS ventilation, the requirement is typically "proven safe by periodic test" — pulse-pause cycling is in fact a self-test mechanism. Document the PuPa cycle as part of the safety case.

Related Siemens Documentation

• SIMATIC PCS 7 Advanced Process Library V9.0 — APL block reference (AFP, Timer_P, TimeTrig).
• APL V9.1 TimeTrig (FB1802) description — minute-of-hour periodic mode.
• SIMATIC Industry Library V9.0 SP1 — PuPa block — multi-group pulse-pause block with loop count.
• PCS 7 V9.0 SP2 engineering manual — CFC block catalog and licensing.
• PCS 7 APL Function Manual — guidance on standard versus pulsed output selection.