Resolving Siemens PROFIBUS Diagnostic Repeater Time Stamp Errors
The Siemens PROFIBUS Diagnostic Repeater (6ES7 972-0AB01-0XA0) maintains an internal real-time clock used to timestamp diagnostic events, statistical counters, and topology records. After power-up, the internal clock defaults to DT#1994-01-01-00:00:00:000 and must be synchronized from the CPU. When time synchronization fails, the user program receives a frozen 1994 timestamp from RD_REC / RDREC calls and the WR_REC / WRREC call returns a Siemens SFC error code, most commonly W#16#8090 (specified logical base address invalid). This article documents the root cause, the correct record layout, and the verified TIA Portal configuration that eliminates the fault.
1. Problem Description
When reading diagnostic records from the PROFIBUS Diagnostic Repeater into a SIMATIC S7 PLC, all timestamps in the returned buffers display the value 01/01/1994 00:00:00.000. The same frozen value persists across power cycles, regardless of the current CPU clock time.
Typical symptoms observed in user programs:
-
SFC 59 "RD_REC"orSFB 52 "RDREC"returnsW#16#0000(no error) on theRET_VAL, but the timestamp bytes inside the returned record remain at the 1994 baseline. -
SFC 58 "WR_REC"orSFB 53 "WRREC"returns W#16#8090 when writing record 60 (Time). The error indicates that there is no assignment in SDB1/SDB2x or that no base address has been configured. - Custom time-set function blocks migrated from STEP 7 V5.5 to TIA Portal V13 (or later) compile cleanly, but the
BUSYoutput latchesTRUEand never returns toIDLEstate.
The diagnostic address used to read the device (typical value: 8186) is by default the only configured base. This is the address that the application passes to LADDR on the WRREC block.
2. Affected Hardware and Firmware
| Item | Value |
|---|---|
| Order number (MLFB) | 6ES7 972-0AB01-0XA0 |
| Product family | SIMATIC Diagnostic Repeater for PROFIBUS-DP |
| Bus physical layer | RS-485, copper |
| Integrated functions | Segment monitor, topology diagnostic, statistics, timestamp |
| Diagnostic address range | Assigned by TIA / STEP 7 hardware config; example: 8186 |
| Time format | S7 DATE_AND_TIME (8 bytes, BCD) |
| Power-on default time | DT#1994-01-01-00:00:00:000 |
| Maximum representable time | DT#2089-12-31-23:59:59.999 |
| Engineering tool families | STEP 7 V5.5, STEP 7 Professional (TIA Portal V13 / V14 / V15 / V16 / V17 / V18 / V19 / V20) |
The diagnostics repeater is a PROFIBUS segment device that physically monitors the copper bus lines during online operation and reports line errors back to the DP master. It is a pure RS-485 copper repeater; it does not act on fiber or PA segments. See the PROFIBUS Product Finder entry for Diagnostic Repeater for the canonical description.
3. Root Cause Analysis
There are three independent root causes that produce the symptoms in section 1. All three are configuration issues; no firmware bug is involved.
3.1 Cause A — "Time Synchronisation" option is ON in TIA Portal
The TIA Portal device configuration exposes a Time Synchronisation checkbox on the Diagnostic Repeater object. When this option is enabled, the engineering tool generates a slot-1 time-master assignment to the repeater, but no equivalent synchronization frame is generated for the application-level WRREC path. The result is that the PLC's WRREC call against the diagnostic address never receives a positive acknowledgement, the BUSY flag remains latched, and RET_VAL reports a permanent error. The DT_TO_DR Siemens-supplied block and any user block based on it inherit this same fault.
Verified corrective action: set Time Synchronisation = OFF in the device properties of the Diagnostic Repeater. After the change is compiled and downloaded, both the standard Siemens block and the user's WRREC logic complete without residual BUSY.
3.2 Cause B — Diagnostic address only, no I/O base assigned
The Diagnostic Repeater is a passive diagnostic device. The default hardware configuration assigns only a diagnostic address (used by the CPU to receive diagnostic interrupts). The LADDR input of WR_REC / WRREC must reference the slot/diagnostic address of the device. If TIA or STEP 7 has stripped or never created the address mapping for record access, the SFC returns W#16#8090 "Specified logical base address invalid: there is no assignment in SDB1/SDB2x or there is no base address".
This is the exact error reported in field reports: the application uses LADDR = 8186 (the diagnostic address) and receives 8090.
3.3 Cause C — Time never written after power-up
If the user program only reads records and never writes record 60 (Time), the repeater simply keeps the 1994 default. The 1994 timestamp is a documented, expected behavior at power-on, not a fault. The frozen 1994 value is a symptom of missing time synchronization, not a defect of the repeater.
4. S7 DATE_AND_TIME Layout
The repeater stores time in the standard S7 8-byte BCD DATE_AND_TIME structure. The byte layout, indexed from the first byte of the record payload, is:
| Byte offset | Field | Range / encoding |
|---|---|---|
| 0 | Year (BCD, 2 digits) | 00–89 (1990–2089) |
| 1 | Month (BCD) | 01–12 |
| 2 | Day (BCD) | 01–31 |
| 3 | Hour (BCD) | 00–23 |
| 4 | Minute (BCD) | 00–59 |
| 5 | Second (BCD) | 00–59 |
| 6, bits 7–4 | Milliseconds, high (BCD tens) | 0–9 |
| 6, bits 3–0 / 7 | Milliseconds, low (BCD hundreds, weekday) | 0–9 / 1–7 (Sun=1) |
The repeater will reject any year value outside 1994–2089; the boundary DT#2089-12-31-23:59:59.999 is the maximum representable timestamp.
5. Record and Function Block Reference
| Operation | STEP 7 V5.5 | TIA Portal (S7-300/400/1200/1500) | Record index | Direction |
|---|---|---|---|---|
| Read CPU clock | SFC 1 "READ_CLK" | RD_SYS_T / SFC 1 | — | CPU local |
| Set CPU clock | SFC 0 "SET_CLK" | WR_SYS_T / SFC 0 | — | CPU local |
| Write Time to repeater | SFC 58 "WR_REC" | SFB 53 / FB "WRREC" | 60 | CPU → Repeater |
| Read Time from repeater | SFC 59 "RD_REC" | SFB 52 / FB "RDREC" | 60 | Repeater → CPU |
| Read Topology | SFC 59 / RDREC | SFB 52 / RDREC | 1 | Repeater → CPU |
| Read Statistics | SFC 59 / RDREC | SFB 52 / RDREC | 2 | Repeater → CPU |
| Read Diagnostic | SFC 59 / RDREC | SFB 52 / RDREC | 3 | Repeater → CPU |
For the diagnostic repeater with MLFB 6ES7 972-0AB01-0XA0, the Time record index is 60. The Siemens official reference is the manual entry SIMATIC Diagnostic Repeater for PROFIBUS-DP (entry ID 7915183).
6. Solution — Step-by-Step
6.1 Prerequisites
- Engineering project open in TIA Portal (V13 SP1 or later, recommended V16+).
- Diagnostic Repeater (6ES7 972-0AB01-0XA0) inserted under the DP master system.
- Diagnostic address assigned (the value visible in device properties, e.g. 8186).
- CPU clock correctly set (visible in PLC online diagnostics).
6.2 Procedure
- Open the device view of the PROFIBUS Diagnostic Repeater in TIA Portal.
- Open Properties > Time Synchronisation.
- Set Time Synchronisation = OFF (this is the corrective action that resolves the latched
BUSYstate of the SiemensDT_TO_DRblock and theWRRECerror 8090).Critical: If a time-master role is required at network level, configure it on the DP master itself, not on the diagnostic repeater. The repeater is a passive diagnostic device and should not be configured as a time master. - Compile the hardware configuration and download to the CPU.
- Add or restore the time-set function block. The Siemens reference implementation is described in Diagnostics repeater: Setting the time (entry ID 15013976). The two function blocks of interest are
DT_FROM_CPU(reads the CPU clock with SFC 1 /READ_CLK) andDT_TO_DR(writes the result to the repeater with SFC 58 /WR_RECor SFB 53 /WRREC). - Call the time-set block cyclically (typical interval: every 60 s). A single set at startup is not sufficient because the repeater's internal oscillator drifts; the manual recommends regular resynchronization.
- After the time is successfully written, the
RDRECcall to record 60 returns the current PLC time. The frozen 1994 timestamp disappears from statistics, topology, and diagnostic event records.
6.3 Sample SCL implementation (S7-1500 / TIA Portal)
// Read CPU clock into the S7 DATE_AND_TIME buffer
#rdRetVal := RD_SYS_T(OUT => #cpuTime);
IF #rdRetVal = 0 THEN
// Issue write request to the diagnostic repeater
#wrBusy := TRUE;
#wrError := FALSE;
#wrRetVal := WRREC(
REQ := #setTrigger AND NOT #wrBusy,
ID := #drDiagId, // e.g. 8186 (DWORD cast of diagnostic address)
INDEX := 60, // Time record
LEN := 8, // DATE_AND_TIME length
DATA := #cpuTime, // 8-byte BCD
DONE => #wrDone,
BUSY => #wrBusy,
ERROR => #wrError,
STATUS => #wrStatus);
IF #wrDone OR #wrError THEN
#wrBusy := FALSE;
END_IF;
END_IF;
The above skeleton mirrors the behavior of the Siemens DT_TO_DR block and is suitable for S7-300, S7-400, S7-1200, and S7-1500 targets. For the S7-300/400, substitute SFC 1 for RD_SYS_T and SFB 53 for WRREC.
7. Verification
- Place the CPU online in TIA Portal and watch the
WRREC.STATUSword. A healthy write returnsW#16#0000on the next call cycle (DONE=TRUE, BUSY=FALSE). - Trigger an
RDRECcall against record 60 (Time) and inspect the 8-byte payload. The bytes must reflect the current CPU time, not1994-01-01. - Force a topology change (unplug a segment) and read record 1 (Topology) and record 3 (Diagnostic). The timestamp on the new event must show the current time.
- Power-cycle the repeater segment. The clock should return to
1994-01-01immediately, then jump to the current CPU time within one cycle of the time-set block. If it stays at 1994 after a full minute, the time-set block is not being called or is still returning an error. - Confirm in the device properties that Time Synchronisation is still OFF after every project re-compile, as a re-import from a master project can revert it.
8. WR_REC / WRREC Error Code Matrix
| RET_VAL (hex) | Meaning | Likely cause in this context | Remediation |
|---|---|---|---|
| 0000 | No error | — | — |
| 8090 | Specified logical base address invalid; no assignment in SDB1/SDB2x or no base address | Diagnostic address missing, or Time Synchronisation set ON, or the wrong module index is referenced | Verify the diagnostic address of the repeater, set Time Synchronisation to OFF, recompile, re-download |
| 8091 | Record length setting on WRREC is wrong |
LEN does not match the record's expected size | Set LEN = 8 for the Time record |
| 8092 | Record not available / not configured | Wrong INDEX, or record not supported on this MLFB | Use INDEX = 60 for the Time record of 6ES7 972-0AB01-0XA0 |
| 80A0–80A3 | Negative acknowledgement from I/O / DP slave | Bus fault, repeater not in RUN, no segment termination | Check PROFIBUS LED status, bus termination, segment power |
| 80B0–80B2 | Module-level error / type mismatch | Slot configuration inconsistent | Re-run HW detection in TIA Portal |
| 80C0–80C3 | Write-access conflict, resource busy | Concurrent record access by another OB | Serialize the time-set call with a single instance / gate flag |
If the time-set function block returns a permanent BUSY=TRUE with no DONE transition, this is a behavior caused by the Time Synchronisation setting interacting with TIA Portal's slot-1 configuration. Set Time Synchronisation to OFF.
9. Diagnostic Repeater Network Topology
The diagnostic repeater is wired inline between two PROFIBUS segments and is transparent to DP slaves and masters at the protocol level. Each repeater occupies one DP slave address on the segment, and up to 9 repeaters may be cascaded per PROFIBUS DP master system. The internal segment monitor records topology and statistics for both of its ports independently.
10. Field-Proven Caveats
- Re-import resets Time Synchronisation. When a project is re-imported from a TIA master project, the Time Synchronisation setting can revert to ON. Verify the setting after every import cycle.
-
Migration blocks latch BUSY. The Siemens time-set blocks written for STEP 7 V5.5 work as-is. Migrated copies in TIA Portal V13 compile cleanly but the
BUSYoutput latches if Time Synchronisation is ON. Use the post-migration block with theTime Synchronisationsetting corrected, or replace the migrated code with a fresh TIA Portal implementation ofRD_SYS_T+WRRECas shown in section 6.3. - Do not use the repeater as a time master. The Diagnostic Repeater does not synchronize the bus; it only stores an internal clock. The CPU must remain the time source.
- Time drift. The repeater's internal clock drifts slowly. Siemens recommends a cyclic resync interval. A 60-second interval is conservative; 10 seconds is allowed if the PLC has spare capacity.
- Year wrap. All timestamps are limited to 1994–2089. Do not assume the timestamps survive past 2089-12-31.
-
STEP 7 V5.5 vs. TIA Portal API difference. In STEP 7 V5.5,
SFC 58 / SFC 59are used. In TIA Portal, the standard functions areWRRECandRDREC(technically SFB 53 / SFB 52 on S7-300/400 and integrated instructions on S7-1200/1500). The record index, length, and behavior are identical.
11. Related Siemens Documentation
- SIMATIC Diagnostic Repeater for PROFIBUS-DP — manual (entry 7915183)
- Diagnostic repeater: Setting the time — function block (entry 15013976)
- Basic information on the diagnostic repeater — TIA Portal V20 docs
- Diagnostic Repeater — PROFIBUS Product Finder
12. FAQ
Why does the PROFIBUS Diagnostic Repeater show 01/01/1994 in every timestamp?
The repeater's internal clock defaults to DT#1994-01-01-00:00:00.000 at power-on and is never updated until the user program writes the time. Read the CPU clock with SFC 1 / RD_SYS_T and write it to record 60 with SFC 58 / WRREC (SFB 53 in TIA Portal) on a 60-second cycle. The frozen 1994 value is a documented power-on default, not a defect.
What causes SFC 58 / WRREC to return error 8090 on the diagnostic repeater?
Error W#16#8090 means "specified logical base address invalid: there is no assignment in SDB1/SDB2x or no base address". The two most common causes on the 6ES7 972-0AB01-0XA0 are: (1) the device's Time Synchronisation option in TIA Portal device properties is set to ON, or (2) the LADDR input does not match the configured diagnostic address. Set Time Synchronisation to OFF, recompile, and re-download.
What record index holds the time on the Siemens 6ES7 972-0AB01-0XA0 diagnostic repeater?
Record index 60 carries the S7 DATE_AND_TIME (8 bytes, BCD). Record 1 holds topology, record 2 holds statistics, and record 3 holds diagnostic events. Each of these records embeds a timestamp that becomes meaningful only after record 60 is set.
Can a STEP 7 V5.5 time-set function block be migrated directly to TIA Portal?
Yes, migration of the DT_TO_DR / DT_FROM_CPU blocks from STEP 7 V5.5 to TIA Portal V13+ compiles cleanly, but the WRREC call may latch BUSY=TRUE if the diagnostic repeater's Time Synchronisation property is set to ON. Disable Time Synchronisation in the device view of the repeater, recompile, and download to restore correct behavior.
How often should the diagnostic repeater's clock be resynchronized?
Siemens recommends cyclic resynchronization to keep the repeater's internal clock within tolerance of the CPU. A 60-second interval is typical and conservative; shorter intervals (e.g. 10 s) are acceptable if the PLC has sufficient spare capacity and the bus traffic impact is negligible.