LOGO! 8: Compare Internal Marker to Fixed Value and Drive Outputs

Practical engineering guide to building a 3-state cycle sequencer on a Siemens LOGO! 8 using markers, counters, threshold triggers, and shift registers. Includes ladder logic, parameter tables, LOGO!Soft Comfort commissioning steps, and a troubleshooting matrix for the four most common pitfalls.

1. Overview: Why an "Internal Tag" in LOGO! Is Actually a Marker Word

The Siemens LOGO! 8 logic module is a compact soft PLC with a fixed, finite set of internal memory areas. Unlike TIA Portal's symbolic tag DBs or Studio 5000's controller tags, LOGO! 8 has no symbolic global tag table. Any "internal tag" the programmer wants to read, write, or compare must be mapped to one of the following physical memory objects:

• Digital markers (M1..M64) – 1-bit storage, often used as Boolean intermediates.
• Analog markers (AM1..AM16) – 16-bit signed word storage, range -32768..+32767, the direct equivalent of an HMI internal tag.
• Variable memory (VM0..VM63) – 16-bit word, same range as AM, retained across power cycle on LOGO! 8.3+ and visible over Modbus TCP.
• Network inputs (NI1..NI64) – 1-bit values streamed from a peer LOGO! on the same LAN.
• Shift register bits (S1.1..S4.8) – 32 single-bit cells across four shift registers.
• Counter current values (C01..C32) – 16-bit word 0..999999 read directly from the parameter field of an Up/Down or High-Speed Counter block.

To replicate the HMI-style "internal tag that you compare to a constant," the most robust engineering pattern is to route a counter's current value into an analog marker (AM) and then feed that marker into a comparator block. This avoids the legacy limitation of older analog comparator blocks that only accepted physical analog input terminals AI1..AI8.

2. Prerequisites

• LOGO! 8 Basic Module (BM) with at least 8 digital inputs and 4 digital outputs. Recommended part numbers:
  • LOGO! 8.3 BM 230RCE: 6ED1052-1FB08-0BA1
  • LOGO! 8.3 BM 24CE: 6ED1052-1MD08-0BA1
  • LOGO! 8.4 BM 24CE: 6ED1052-2MD08-0BA2
• LOGO!Soft Comfort V8.3 or later, configured for Ladder Diagram (LD) programming language.
• One free digital input for the cycle trigger, e.g. I1 wired to a momentary pushbutton or sensor NPN output.
• Three free digital outputs, Q1, Q2, Q3, each rated for the connected load (relay 8 A resistive / 2 A inductive on RCE variants; transistor 0.3 A on CE variants).

Optional: Ethernet cable for the LOGO! Web Editor in LOGO! 8.3+ devices and a copy of the official LOGO! 8 application examples library for reference projects.

3. LOGO! 8 Internal Memory Reference

The most robust 3-state cycle sequencer reads the value of an Up/Down Counter block and feeds it into one of three threshold triggers. No analog input terminal is required.

4. Method 1 – Three Up/Down Counters with Cascaded Reset

This is the most direct ladder pattern. Three identical Up/Down Counter blocks share the same input pulses, but each is configured with a different on/off threshold so that exactly one is "on" at any time. The third counter's output resets all three, which forces a fresh cycle from 0.

1. Place three Up/Down Counter (B03) blocks in your FBD/LD program and label them Cnt1, Cnt2, Cnt3.
2. Wire the cycle trigger I1 (or a debounced flag) to the Cnt input of all three blocks in parallel.
3. Configure the threshold and reset values:
   • Cnt1: On = 0, Off = 1, Reset value = 0
   • Cnt2: On = 1, Off = 2, Reset value = 0
   • Cnt3: On = 2, Off = 3, Reset value = 0
4. Wire Cnt1's output to Q1, Cnt2's output to Q2, Cnt3's output to Q3.
5. Wire Cnt3's output back to the R (reset) input of all three blocks so that the moment the count reaches 3 the cycle restarts at 0.

Ladder rung (LD) representation

  I1 ──┬──[ Cnt1 On=0 Off=1 ]──( Q1 )
       ├──[ Cnt2 On=1 Off=2 ]──( Q2 )
       └──[ Cnt3 On=2 Off=3 ]──( Q3 )

  Cnt3.Q ──[ R ]── to R input of Cnt1, Cnt2, Cnt3

5. Method 2 – Single Up/Down Counter and Three Threshold Triggers

The cascade in Method 1 is wasteful of program blocks. A single Up/Down Counter driving three threshold triggers uses fewer resources and gives cleaner timing because there is only one count to debug.

1. Place one Up/Down Counter block. Set:
   • On threshold: 2 (counter output turns on at 2)
   • Off threshold: 3 (counter output turns off at 3, auto-resets to 0)
   • Reset value: 0
   • Enable retentive memory only if power-fail retention is required.
2. Expose the counter's actual value (CV) on an Analog Marker (AM1). To do this, attach the counter's QV (analog value) output to AM1 using the connector pin in FBD mode, or assign AM1 in the counter's "Reference" parameter field in LOGO!Soft Comfort.
3. Place three Threshold Trigger special-function blocks in parallel rungs:
   • Trig1: ON = 0, OFF = 0 (level-sensitive at 0)
   • Trig2: ON = 1, OFF = 1
   • Trig3: ON = 2, OFF = 2
4. Wire AM1 into the analog input (Ax) of each trigger. The triggers accept any analog source, including AM, VM, network analog, and counter QV outputs.
5. Wire each trigger's Boolean output to Q1, Q2, Q3.

Truth table verification

6. Method 3 – Shift Register Bit Sequence

If the application already uses shift register blocks, a 2-bit shift register can encode the four states of a 3-state cycle (00, 01, 10, 11→reset). This is the smallest block-count solution and the easiest to visualise on a state diagram.

1. Place a Shift Register block (S1) with 2 bit positions. Direction = forward, trigger = I1.
2. Seed bit 1 = 1, bit 2 = 0 so the first cycle starts in state "10" (binary 2).
3. Decode the bit pair:
   • S1.1 = 1, S1.2 = 0 → Q1 (state 2)
   • S1.1 = 0, S1.2 = 1 → Q2 (state 1, after first shift)
   • S1.1 = 0, S1.2 = 0 → Q3 (state 0, after second shift)
4. Add an AND gate that detects "11" (S1.1 AND S1.2) and feeds the shift register's R (reset) input. This is the third state, which resets to the seeded pattern.

7. Method 4 – Analog Comparator with AM/VM Word Source

The original question reported that the Analog Comparator block only accepted physical AI inputs. This is true in LOGO!Soft Comfort V6 and earlier; LOGO! 8 (V8.0+) added the ability to source Ax and Ay from any analog connector in the program, including AM, VM, network analog, and counter QV outputs.

To configure the Analog Comparator with an internal source:

1. Insert the block from the Special Functions list under Analog > Analog Comparator.
2. Click the Ax pin. The drop-down shows AI1..AI8 plus the connector list. Choose AM1 (or any AM/VM word already in the program).
3. Click the Ay pin and select a constant via the parameter field: 0, 1, or 2.
4. Set the block's Gain = 1.00, Offset = 0. The default ±0.05 hysteresis is normally adequate; widen to ±0.5 if the source is noisy.

This is the cleanest way to replicate the HMI-style "compare internal tag with constant" pattern on LOGO! 8 without burning a physical AI terminal. The block output goes high whenever AM1 ≥ constant; combine three comparators at thresholds 0, 1, 2 with mutual-exclusion logic to drive Q1/Q2/Q3 directly.

8. Building the Ladder Diagram in LOGO!Soft Comfort

The following step-by-step procedure implements Method 2 inside LOGO!Soft Comfort V8.3 using the Ladder Diagram editor.

1. Launch LOGO!Soft Comfort, click File > New, and select the target BM, e.g. LOGO! 8.3 24CE.
2. Switch the editor language to LAD (Ladder) via View > LAD/FBD.
3. Drop a NO contact on rung 1, set its I/O address to I1.
4. Drop an Up/Down Counter coil on the same rung. Open its properties dialog and enter:
   • On = 2, Off = 3, Reset value = 0
   • Check "Use retentive memory" only if power-fail retention is required.
5. From the toolbox, drag a Connector Line from the counter's QV (analog value) output to a free Analog Marker pin AM1. AM1 now mirrors the counter value.
6. Insert three Threshold Trigger blocks in parallel rungs 2, 3, 4. For each block, set the trigger level via the parameter field: 0, 1, 2 respectively, and connect the Ax input to AM1.
7. Add three output coils on rungs 2, 3, 4 addressed to Q1, Q2, Q3.
8. Compile with F5 or Tools > Compile Program. The Information window should report "0 errors, 0 warnings" and indicate the number of blocks used.
9. Save the project as 3_state_cycle.lsc and connect to the BM via Ethernet or PC cable.

9. Mapping the Internal Value to Q1/Q2/Q3 Outputs

The mapping from internal marker value to physical output is implemented entirely in the block parameters. There is no need for a separate decode block. The following table shows the relationship when using the three-threshold-trigger pattern of Method 2:

If the application needs the outputs to be mutually exclusive in software (fail-safe against a stuck counter), insert a NOR gate on each output rung that is conditioned by the other two triggers being low. The Boolean expression for Q1 becomes Trig1.Q AND (NOT Trig2.Q) AND (NOT Trig3.Q), which prevents overlapping outputs even if AM1 is corrupted to a non-sequencer value.

10. Verification and Commissioning

Before powering the connected loads, validate the program in LOGO!Soft Comfort's online simulator:

1. Press F3 (Start Simulation). The simulator opens a virtual LOGO! faceplate.
2. Click the I1 input in the simulator repeatedly. Watch the AM1 value increment 0 → 1 → 2 → 0.
3. Verify Q1 lights at 0, Q2 at 1, Q3 at 2. Confirm only one output is on at a time.
4. Open the Tools > Online Test window to monitor AM1, Cnt CV, and the three trigger outputs as a time-stamped trace. Export the trace as a CSV if you need to attach it to a FAT/SAT document.
5. Stop the simulator, transfer the program to the BM with Tools > Transfer > PC → LOGO!, and re-run the same I1 toggles on the live hardware.

11. Troubleshooting Matrix

12. Frequently Asked Questions