Problem Identification
An Omron CJ1-series CPU (CJ1M, CJ1G, CJ1H, or related CP1L/CP1H family) can display the message B1 on its 7-segment LED indicator while simultaneously refusing Host Link (SYSWAY) sessions from the programming software. The fault is non-fatal to the logic in most cases but locks the scan until acknowledged, and it is frequently mistaken for a battery fault because the operator remembers that a low backup battery produces similar symptoms. In field reports, the unit has typically been running without trouble for several years on the same ladder logic, the backup battery has just been replaced, the SYSWIN (or CX-Programmer) project shows the correct PLC model and Host Link parameters, and yet the serial port will not link. The PC sees a timeout on every TXD attempt at 9600,7,E,2 while the CPU LED continues to display B1 or cycles between B1 and END depending on whether the user has toggled the mode key.
The root problem is rarely the battery itself. The most common root causes in this exact symptom pattern are:
- Startup mode selection forced to Programming Console instead of Monitor or Run.
- CPU DIP switch Pin 5 (or the equivalent SW1/SW2 rotary) left in a state that overrides the project-defined serial parameters.
- RS-232C cable wired for peripheral (programming-console emulation) instead of full Host Link.
- An NT-series PT or operator terminal daisy-chained onto the same DB9, terminating the Host Link bus in a way that holds the line in a state incompatible with a peer-to-peer PC link.
- Stale SYSWIN project locked to the wrong COM port or wrong unit number.
Understanding the B1 Fault Code on CJ1/CP1 CPUs
The B1 indicator is one of the legacy Omron status messages that pre-dates the expanded hexadecimal error coding used in modern CX-Programmer diagnostics. The meaning is CPU-specific:
| CPU Model | B1 Meaning | Trigger |
|---|---|---|
| CJ1M-CPU11/21/31 | Battery/cycle-time warning, or initial scan pending | Battery voltage < 2.5 V, or cycle-monitor-flag issue |
| CJ1G-CPU42/43/44/45 | Battery low or memory-backup error | Battery disconnected, polarity reversed, or memory-card mismatch |
| CJ1H-CPU65/66/67 | Backup battery not detected | Open circuit between battery holder and CPU |
| CP1L/CP1H | Battery low indication | Optional CJ1W-BAT01 battery absent or depleted |
| CP1E (E-type) | Not applicable (uses ER-series error codes) | Check AR1300 instead |
Root Cause Decision Tree
Use the following decision path to isolate the B1 message before touching the wiring:
- Power off the rack. Open the battery holder and measure the cell voltage with the battery still connected: a fresh CR2350/CR2032 should read > 3.0 V. A reading between 2.5 V and 3.0 V is treated as low by the CPU and will trigger B1 within one scan.
- With power off, inspect the battery holder polarity. CJ1 batteries insert with the (+) face up. A reversed cell reads correct DC voltage at the holder but the CPU detection circuit sees an open circuit and latches B1.
- Close the holder, restore power, and watch the 7-segment LED during the four-second self-test. If B1 clears after self-test and reappears only when the mode key is turned to PROGRAM, the fault is not the battery but the mode.
- If B1 remains on the LED throughout self-test, go to AR1300 and AR1310 in PROGRAM mode using a hand-held Programming Console (PR013/PR015) and compare against the operation manual flags.
Hardware Pre-Connection Checklist
Before chasing serial parameters, confirm the physical layer is correct. The CJ1 DB9 host-port pinout is:
| Pin | Signal | Direction (PLC ↔ PC) |
|---|---|---|
| 2 | SD (Send Data) | → PC RD |
| 3 | RD (Receive Data) | ← PC SD |
| 4 | RS (Request to Send) | → PC CTS |
| 5 | CS (Clear to Send) | ← PC RTS |
| 9 | SG (Signal Ground) | ←→ PC SG |
| 1, 6 | Frame Ground / +5V (model dependent) | n/c |
If a Programming Console or an NT-series PT is daisy-chained on the same physical DB9, disconnect it before attempting the PC link. Two Host-Link masters on one bus will collide every TXD frame.
CJ1 CPU DIP Switch Configuration
The CPU module has an 8-position DIP switch under the small cover on the front face. The default switch layout (CJ1M-CPU11/21 example) is:
The switch functions on CJ1M-CPU11/21/31 are:
| Pin | Function | OFF (default) | ON |
|---|---|---|---|
| 1 | Startup mode (combined with Pin 2) | See matrix below | |
| 2 | Startup mode | See matrix below | |
| 3 | RS-232C port enable | Enabled | Disabled (peripheral only) |
| 4 | Peripheral (Toolbus) port enable | Enabled | Disabled |
| 5 | Standard Host Link parameters | Project-defined | Force 9600,7,E,2 |
| 6 | User-defined pin (UM protect) | Write-protect off | Write-protect on |
| 7 | Simple backup | Disabled | Auto backup on power loss |
| 8 | Expansion instruction set | Standard | Expansion enabled |
Startup mode selection matrix (Pins 1 + 2):
| Pin 1 | Pin 2 | Power-On Mode |
|---|---|---|
| OFF | OFF | RUN (use PLC Setup if changed) |
| OFF | ON | PROGRAM (Programming Console emulation) |
| ON | OFF | MONITOR |
| ON | ON | Use PLC Setup setting (default PROGRAM) |
Pin 5 = ON forces the RS-232C port into the legacy Host Link defaults regardless of what the project or PLC Setup holds. This is the correct starting position whenever a SYSWIN project cannot find the CPU. Once a link is established, change Pin 5 back to OFF and load the project-defined parameters from the PLC Setup table.
Host Link Protocol Parameters
Host Link (also called SYSWAY) is a half-duplex master-slave ASCII protocol where the PC is always the master. The CJ1 default frame is:
| Field | Bytes | Value (default) |
|---|---|---|
| @ (Header) | 1 | 0x40 |
| Unit Number | 2 | 00 (BCD) to 31 |
| Header code | 2 | FA, RD, WR, etc. |
| Text | varies | Register / command body |
| FCS (Frame Check) | 2 | 2 ASCII hex of 8-bit XOR |
| Terminator | 2 | * + CR (0x2A 0x0D) |
Serial line parameters:
- Baud: 9600 (also legal: 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 on CJ1 with v3.0+)
- Data bits: 7
- Parity: Even
- Stop bits: 2
- Flow control: None (RS-232C standard; do not enable XON/XOFF)
The CJ1 unit number is set in the PLC Setup (Address 321 in the Setup Area) or via the DIP switch rotary on certain CP1E-N models. Unit 00 is the standard single-drop default; units 01-31 are used on multi-drop RS-422/RS-485 networks terminated at the peripheral port.
SYSWIN 3.4 Configuration Procedure
SYSWIN is the legacy programming environment for Omron C-series and early CJ1 CPUs. Newer CX-Programmer (part of CX-One) is recommended for any CJ1M-CPU1☘ firmware v3 or later, but SYSWIN 3.4 is still functional and is often the only environment available on a long-running line.
- Launch SYSWIN 3.4 and open the existing project (.sw3 file). If the project file is lost, select File → New and choose CJ1M from the PLC family list.
- Open PLC → Communications Settings.
- Set Network to Host Link.
- Set COM Port to the physical port on the PC (COM1 is safest; USB-to-serial adapters report as COM3-COM12).
- Set Baud Rate to 9600.
- Set Data Bits to 7.
- Set Parity to Even.
- Set Stop Bits to 2.
- Set Unit Number to 00 unless the PLC Setup was changed.
- Click Test. A green status bar confirms the link; a red bar lists the offending parameter.
0x02 (FCS error). Migrate the project to CX-Programmer v9.7+ for full compatibility.
Step-by-Step Recovery Procedure
- Confirm the B1 condition. With power on, record whether the LED reads B1 alone, alternates B1 / END, or shows a hexadecimal code (e.g., 80B1). Photograph the LED; the cycling pattern is diagnostic.
- Set the mode key to the centre (MONITOR) or right (RUN) position. If the CPU was left in PROGRAM by a previous maintenance event, the B1 will appear identical because both PROGRAM and a battery fault light the same legacy status bit.
- Open the CPU cover and set DIP switch Pin 5 to ON. Leave the other pins at factory default. Power-cycle the rack.
- Launch SYSWIN 3.4 with the COM port closed elsewhere (HyperTerminal, Tera Term, Windows serial-monitor). Open the project and click Online → Connect.
- If the link establishes, go to PLC → Operating Mode and select Monitor. If the mode key disagrees, the CPU will refuse the change.
- Once online, navigate to PLC → Clear Error. If the B1 was a battery status latch, this clears it.
- Read the diagnostic area: in CX-Programmer, PLC → PLC Error Log. Look for the most recent event and the timestamp.
- Open PLC → Edit PLC Setup and confirm the Startup Mode field (address 323) is set to Monitor rather than Programming Console. Transfer the setup to the CPU.
- Set DIP switch Pin 5 back to OFF to release the parameter override. Power-cycle once more.
- Reconnect from SYSWIN and verify that the project-defined parameters are now used (Host Link standard set in PLC Setup).
Cable Verification Procedure
Use a multimeter in continuity mode to confirm the RS-232C cable is wired correctly:
The crossover is on pins 2-3 (data) and pins 4-5 (handshake). Pins 6 (DSR) and 1 (CD) on the PC end should be tied together so the PC-side driver sees DSR active.
Alternative: Migrating to CX-Programmer
If SYSWIN 3.4 refuses to link on multiple PCs, migrate to CX-Programmer (current shipping version under the CX-One umbrella). CX-Programmer:
- Auto-detects COM ports and baud, then falls back through the legal Host Link baud list.
- Reads the diagnostic log (PLC Error Log) without forcing a stop/start of the CPU.
- Imports SYSWIN 3.4
.sw3projects directly with symbol and rung comments preserved. - Supports USB-equipped CP1L/CP1H CPUs natively without a serial converter.
Migration steps:
- Install CX-One or the standalone CX-Programmer v9.7 or later.
- From CX-Programmer, choose File → Import → SYSWIN Project and load the existing
.sw3. - Select Auto Online. CX-Programmer scans every COM port and baud until it finds the CPU.
- Once online, back up the program to disk (File → Save As) and to the optional memory card.
- Use PLC → Clear Error to clear the B1 latch and write the cleared error log.
Verification Checklist
After completing the recovery procedure, verify the link and fault state:
| Check | Method | Pass Condition |
|---|---|---|
| Serial link up | SYSWIN Online → Status | CPU model and firmware reported |
| B1 cleared | 7-segment LED | LED shows RUN or MON with no B1 cycling |
| Battery flag | CX-Programmer AR1300 | Bit 0 = 0 |
| Error log empty | PLC → Error Log Clear | Most recent entry > 24 hours old |
| Mode key matches startup | DIP switch 1-2 | PLC Setup mode = Monitor matches switch |
| Project parameters loaded | DIP switch Pin 5 = OFF | PLC uses configured baud / unit number |
Field-Proven Caveats
- B1 after battery replacement: A new lithium cell can still report as low if the holder contacts are oxidized. Clean both pads with isopropyl alcohol and a non-metallic swab before inserting the new cell.
- B1 after firmware update: Some CJ1M firmware v3 → v4 migrations reset the PLC Setup to factory defaults, which sets startup mode to Programming Console. Re-set the startup mode in the PLC Setup and transfer.
- B1 with USB-to-serial adapter: Cheap adapters using the CH340 chipset do not drive the PC-side DTR/CD pins correctly, which can confuse the PLC handshake. Use an FTDI-based adapter or the Omron CS1W-CN226 cable.
- B1 that reappears within one scan: This is a real battery fault, not a configuration issue. Replace the battery even if the new one measured > 3.0 V; some lots have high internal resistance and sag under the CPU's load current.
- B1 combined with ERH/ERL: Indicates a fatal CPU error rather than a battery warning. Read the error code with CX-Programmer and consult the troubleshooting section of the Operation Manual.
Related Documentation
Reference material for the procedures above:
- CJ1M CPU Unit Operation Manual (W393)
- CP1H CPU Unit Operation Manual (W462)
- CP1L CPU Unit Operation Manual (W461)
- CX-One / CX-Programmer Product Page
- Omron IA Knowledge Base
FAQ
Does the Omron CJ1 B1 alarm always mean a dead battery?
No. On CJ1M-CPU1☘ and CJ1G-CPU4☘ models the B1 LED can be triggered by a battery flag, a startup-mode mismatch, or a self-test anomaly. Read AR1300 in PROGRAM mode with a Programming Console to confirm whether the battery detection circuit is the source. A new battery can still latch B1 if the holder polarity is reversed or the contacts are oxidized.
What Host Link parameters should SYSWIN use to reach a CJ1 over RS-232C?
Set COM port to the PC's serial port, baud to 9600, data bits to 7, parity to Even, stop bits to 2, unit number to 00, and flow control to None. With CPU DIP switch Pin 5 ON, the PLC forces these defaults regardless of PLC Setup content, which is the recommended starting point when the link fails.
Can I clear a persistent B1 alarm without replacing the battery?
If AR1300 reports the battery as good, the alarm is a stale latched bit. Clear it with PLC → Clear Error from CX-Programmer once the Host Link session is established, or by cycling power with DIP switch Pin 5 OFF and the PLC Setup startup mode set to Monitor.
Why does SYSWIN 3.4 link to the CJ1 but every write fails with an FCS error?
SYSWIN 3.4 uses an older Host Link command subset and cannot drive CPUs running firmware v4.0 or later at full speed. Either reduce the baud to 9600 with Pin 5 ON, or migrate the project to CX-Programmer v9.7 or later for full compatibility.
Which DIP switch on the CJ1 forces the serial port back to Host Link defaults?
DIP switch Pin 5 (third switch from the left on CJ1M-CPU11/21/31). Setting it to ON forces 9600,7,E,2 and unit number 00 regardless of PLC Setup, which lets a fresh PC reach the CPU when the project-defined parameters are unknown or corrupt.