PCS 7 MotSpdCL Single Direction Motor Configuration Guide

1. Overview: The MotSpdCL Bidirectional Default in PCS 7

The MotSpdCL block from the PCS 7 Advanced Process Library (APL) is engineered for variable-speed drives (VSD/VFD) that must be operated in both forward and reverse. When the same Process Tag Type (PTT) is reused for a one-way load such as a single-rotation pump, fan, or extruder, the operator faceplate and the runtime control logic both expose a reverse command that has no physical meaning. This produces two visible defects in the OS:

• The faceplate renders a Reverse button that the drive hardware cannot honor, so an operator click on it results in no movement and a spurious alarm cascade.
• The block icon shows both Forward and Reverse status indicators even though only one direction is wired in the field.

Two paths are available to adapt the standard PTT to a unidirectional service without writing a new block from scratch:

1. Disable the reverse command at the OS layer by clearing OS_Perm bit 6, and wire the Rbk input correctly so the speed readback is stable.
2. Replace MotSpdCL with the lighter MS_DIR block from the PCS 7 block library for SIRIUS motor starters, which is single-direction by design.

This reference covers the CFC wiring, the OS permission bits, the readback logic, the WinCC faceplate edits, and the commissioning checks required for either approach.

2. Prerequisites

• PCS 7 V8.2 SP1 or later (V9.0/V9.1 recommended for current APL revision). The APL blocks described here are valid for the standard PTT library supplied with these versions.
• SIMATIC Manager with CFC/SFC editor licensed, or PCS 7 Engineering in the TIA Portal (the block library ships identically across both).
• WinCC Explorer / Graphics Designer with faceplate editing rights on the project server.
• For the SIRIUS path: PCS 7 block library for SIRIUS 3RA6/3RB22/3RW44 motor starters, see the Programming and Operating Manual for the PCS 7 block library for SIRIUS.
• The drive must be configured (SINAMICS G120/G130, MICROMASTER, or third-party VFD) with one fixed rotation sense and a single enable wiring path.

3. Solution Comparison: MotSpdCL Modification vs. MS_DIR Block

Use Option A for VFD-driven unidirectional motors where you still want speed control and a standard PTT. Use Option B when the load is direct-on-line and the SIRIUS starter library is already loaded. Use Option C only when a corporate faceplate standard mandates removal of the reverse glyph.

4. Option A: Disable Reverse in MotSpdCL via OS_Perm Bit 6

The MotSpdCL block exposes a 16-bit word OS_Perm at input I/OS_Perm. Each bit is an operator authorization gate. According to the APL online help, bit assignments relevant to motor direction are:

On the MotSpdCL instance in the CFC chart, connect OS_Perm to a word constant or a CFC constant block whose value is the integer 0x003F (decimal 63). This sets bits 0–5 to 1 (Stop, Fwd start, Manual, Auto, Ack, Spd) and clears bit 6 (Reverse). The reverse button is greyed out in runtime; no graphic edit is required.

// Suggested constant block configuration
OS_Perm := W#16#003F;  // bits 0..5 enabled, bit 6 = 0 disables Reverse

Bit 6 may also be driven dynamically by an authority level or area selection block; for a hard one-way application a static constant is cleaner.

5. Option B: MS_DIR from the SIRIUS PCS 7 Block Library

For DOL (direct-on-line) single-direction motors driven by SIRIUS 3RA6/3RB22/3RW44 starters, the dedicated block is MS_DIR (Motor Starter Direction – one way). From the linked manual:

"The MS_DIR block can be used to start the motor in one direction of rotation, either in Manual operation LOCAL, Auto, or Manual mode." — PCS 7 block library for SIRIUS, Programming and Operating Manual

The companion block MS_REV is the two-direction variant and is not needed for this application. To use MS_DIR:

1. Install the SIRIUS PCS 7 block library add-on into the master data library.
2. Drag the MS_DIR block from the library to the unit chart in the CFC editor.
3. Wire the digital feedback (FbkRun) from the SIRIUS starter to the block input.
4. Wire the starter command output to the starter's control input on the ET 200SP / SIMOCODE / SIRIUS module.
5. Generate the corresponding faceplate via the PTT wizard; the new faceplate has no reverse element by default.

MS_DIR is intentionally simpler than MotSpdCL: it has no setpoint, no speed input, and no readback of process speed. If your drive is a true VFD and you need speed control and ramped setpoint, stay with MotSpdCL and use Option A.

6. Readback (Rbk) Wiring When No Speed Feedback Exists

MotSpdCL expects an engineering-unit speed readback on input Rbk. If the drive is configured without an analog speed signal (for example a starter with only digital run feedback) the loop can become unstable or the block will generate SP_Rbk deviation alarms. Three approaches are valid:

The recommended Sel_R-style pattern from field practice is:

// Rbk tracking logic - keeps readback equal to setpoint
// when the motor is running, zero when stopped
IF (FbkRun = 1) THEN
    Rbk := SP_Out;
ELSE
    Rbk := 0.0;
END_IF;

This pattern prevents the deviation alarm and removes the floating-zero behavior of the loop integrator when the motor is OFF. Place the logic in a small CFC chart or an FB instance attached to the PTT.

7. CFC Implementation Checklist for MotSpdCL Unidirectional

1. Open the chart containing the MotSpdCL instance and confirm Mode is at the expected value (typically 1 = Auto, 2 = Manual, 3 = Out of Service).
2. On SP_Ext, wire the external setpoint (interlocking, cascade, or fixed value).
3. On SpdSet, wire the operator setpoint from the faceplate (if OS_Perm bit 5 is enabled).
4. Set OS_Perm to W#16#003F as described in section 4.
5. On Intlock, wire the start-permit chain; this is independent of direction and is mandatory in PCS 7.
6. On Rbk, apply the pattern from section 6 (track SP_Out when FbkRun=1, else 0).
7. On FbkRun, wire the digital run feedback from the drive I/O module.
8. On FbkFwd, hard-wire a constant 1 if the drive is electrically fixed to the forward sense (this is what makes the block treat the start as a forward start regardless of operator input).
9. Compile the chart, then run the OS server compile and download.

8. WinCC Faceplate Edits (Option C)

If corporate standards require that the reverse glyph be removed entirely (not just greyed out), edit the @PG_MotSpdCL faceplate copy in the Graphics Designer.

1. Open WinCC Explorer and navigate to the project library.
2. Locate @PG_MotSpdCL.pdl, copy it to a new name such as @PG_MotSpdCL_1D.pdl to avoid being overwritten by the next PCS 7 upgrade.
3. Open the copy in Graphics Designer; identify the Reverse command button (typically the second dynamic button in the command row).
4. Delete the button or set its Visible property to 0 in the property dialog.
5. Update the block icon in @PG_MotSpdCl.pdl to remove the reverse direction indicator (small green triangle pointing left).
6. Save the file; recompile the OS. The original PTT that references the default faceplate must be re-pointed to the new @PG_ file, or a new PTT (e.g. MotSpdCL_1D) must be generated and used for new instances.

9. Commissioning and Verification

10. Troubleshooting Matrix

11. Notes on Block Library Versions

MotSpdCL has been part of the APL since PCS 7 V6.0 and is maintained in every subsequent release. The exact instance DB size, the I/O signature, and the faceplate version are release-dependent. Always verify the Revision field in the block's properties dialog against the PCS 7 release notes. The SIRIUS MS_DIR/MS_REV blocks are part of a separate add-on library and are released in cycles independent of the main APL; the manual referenced in section 5 is the current authoritative source for pin assignments and runtime behavior.

12. Related Standards and References

The wiring patterns and interlocking rules in this article are consistent with the safety and process-control principles described in IEC 61131-3 (PLC programming languages) and IEC 62443 (industrial network security, relevant when the drive is on PROFINET). PCS 7 installations in safety-relevant plants must also satisfy the requirements of IEC 61508 / IEC 61511 for the protection layer that MotSpdCL's Intlock chain implements; this is a verification step to be performed by the plant's safety engineer, not a property of the block itself.