Resolving PCS7 Compilation Warnings for Interrupt OB Placement

Problem Description

When newly added charts are compiled in a SIMATIC PCS 7 project (CFC / SFC), the compiler reports warnings of the form:

• "Block <instance name> is not installed in an interrupt OB"
• "Block <instance name> is being processed in OB1"
• "Sample time of block <instance name> cannot be derived"

The warnings appear in the CFC compiler log under Options → Compile Logs after running Charts → Compile → Charts as Program. The build completes with status Warnings (yellow) instead of No errors and no warnings (green). The program can still be downloaded to the AS, but deterministic execution of closed-loop controllers, pulse generators, and monitoring blocks is no longer guaranteed.

This article documents the root cause (block installation in OB1 rather than in a cyclic interrupt OB3x), the downstream effect on PID loops and timer blocks, and a step-by-step procedure to relocate the affected blocks and clear the warnings.

Affected PCS7 Versions

The diagnostic output and recommended corrective action are identical from V8.0 onward. Earlier releases (V7.x) follow the same rule but use the older PCS7 Standard Library block family.

Root Cause: Why OB1 Is Not Acceptable in PCS7

The PCS7 runtime model relies on time-deterministic cyclic interrupt organization blocks (OB30 through OB38). OB1 is a free-running, priority-class 1 main scan that the S7-400 CPU re-enters whenever all higher-priority OBs have finished. As CPU load increases, the wall-clock duration of OB1 grows proportionally. By contrast, the cyclic interrupt OBs have a fixed configured phase offset and period, and the CPU is guaranteed to start a new OB35 cycle within its period even if OB1 has not completed.

For process control this difference is decisive:

• Deterministic cycle: A CTRL_PID running in OB35 with a 1000 ms period executes every 1000 ms ± startup latency, regardless of total CPU load.
• Indeterministic cycle: The same CTRL_PID placed in OB1 drifts with the load on the CPU, causing integral wind-up, oscillation, and unstable control behavior.

The PCS7 compiler therefore inspects the S7_task attribute of every block instance and warns when an APL block whose S7_tasklist excludes OB1 has nonetheless been installed in OB1.

Interrupt OB Cycle Time Reference

The period of each OB3x is configured in HW Config → CPU Properties → Cyclic Interrupts. The phase offset is also set here to stagger the execution of multiple OBs and balance the CPU load.

How the Compiler Detects the Wrong OB

Every block in the PCS7 Advanced Process Library (APL) carries two system attributes that the CFC compiler evaluates at compile time:

1. S7_tasklist — a comma-separated list of OBs in which the block is permitted to run.
2. S7_task — the actual OB in which the current instance is installed.

If S7_task is not a member of S7_tasklist, the compiler emits a warning and inserts the block into the download package but flags it for review. A sample entry from the CFC compile log reads:

W: Block CTRL_PID_001 is installed in OB1 but allowed tasks are OB32, OB35.

The same warning is generated for any block with a SAMPLE_T input (timer blocks, integrators, differentiators, pulse generators) because those blocks cannot derive their sample time when they are not in a known interrupt OB.

Downstream Impact on Process Behavior

Specific symptoms that surface in the field:

• Integral wind-up: CTRL_PID computed in OB1 drifts because the integrator is updated at an irregular rate.
• Wrong TIMER_P / TP pulse width: A pulse timer block expects a known sample time (typically 100 ms). When placed in OB1, the runtime API returns a fallback sample time of 1 s, doubling or halving the pulse width.
• PULSEGEN phase shift: Three-step pulse generators (used for motor-driven valve positioning) lose their beat when the source block is not in the same OB as CTRL_PID.
• CHK_A false alarms: Analog monitoring blocks (limit, gradient) trigger nuisance trips because the gradient calculation uses the actual OB period rather than the configured one.

The fix is therefore not just cosmetic; the warnings directly map to measurable control-quality degradation.

Step-by-Step Resolution Procedure

Prerequisites

• PCS7 engineering station with STEP 7 / CFC / SFC installed.
• Project is open and the user is logged in with edit rights on the target AS.
• CPU is in STOP on the engineering station (download only — the relocation itself can be performed online-offline in CFC).

Procedure

1. Identify the offending instances. In SIMATIC Manager, open the CFC view of the AS, then choose Options → Chart Check. Tick Block installation in OB and run the check. The result list shows every instance and its current S7_task.
2. Sort by S7_task and filter on OB1. The remaining rows are the blocks producing the compile warnings.
3. Open each offending chart and click the block instance. In the block’s Object Properties dialog, switch to the Block Installation tab.
4. Select a permitted OB (typically OB35 for control blocks, OB32 for slow loops, OB34 for fast loops, OB38 only for sub-10 ms tasks). The dialog only lists OBs that are part of S7_tasklist.
5. Confirm the change. Repeat for every block flagged in step 1.
6. Verify SAMPLE_T: open the I/O tab of each relocated timer block and confirm the input shows the period of the new OB (e.g., T#1s when placed in OB32/OB35 with a 1 s period).
7. Recompile: Charts → Compile → Charts as Program. The compile log must end with 0 errors, 0 warnings.
8. Download: PLC → Download → Complete program. Perform a CPU restart (STOP → RUN) and observe the OB1 / OB35 / OB38 scan statistics in PLC → Module Information → Scan Cycle Time.

Verification Checklist

• Compile log shows 0 warnings.
• PLC → Monitor/Modify on the relocated blocks shows the expected sample time at input SAMPLE_T.
• OB35 cycle-time histogram in Module Information is stable (max − min < 25 % of average).
• Process trend of the controlled variable is steady; no oscillation after a set-point step.

Mass-Relocation Using the CFC Bulk Editor

For projects with hundreds of charts the manual procedure above is impractical. Use the CFC bulk editor instead:

1. Options → Chart Check — export the result to a CSV file.
2. Open the CSV in Excel and filter S7_task == OB1.
3. For each row, decide the new OB based on block type (see table below).
4. Use Options → Block Installation → Bulk Change in CFC. Select the AS, the chart folder, and the target OB. The bulk change updates S7_task for every instance that has S7_tasklist including the target OB.
5. Recompile and verify as in the previous section.

Sample-Time Behavior on Timer Blocks

APL timer blocks expose a SAMPLE_T input that the runtime derives from the OB period automatically, but only if the block is installed in a recognized cyclic interrupt OB. The system attribute S7_sample_time on the block reports the actual sample time the runtime is using. If the block is in OB1, S7_sample_time falls back to 1 s and the input SAMPLE_T shows T#0ms. This is the symptom most often observed during commissioning.

// Example: TIMER_P block placed in OB1
// SAMPLE_T shows: T#0ms
// Internal sample time = T#1s   (fallback)
// Pulse width PV = 5000 ms requested
// Actual pulse width = 5000 * (1000 / 0) = undefined behavior

The clean fix is to install the timer in OB35 (or whatever OB matches the desired time-base) and verify that SAMPLE_T shows T#1s or T#500ms as configured.

Related PCS7 Configuration: CP443-1 Time Synchronization

A follow-on symptom that is sometimes logged at the same time as the OB warnings concerns CP443-1 time-of-day synchronization. The CP443-1 attached to the AS must be set to one of three modes:

• From station — the AS is the time master and pushes the time onto the bus.
• From LAN — the AS is a time slave that receives the time via NTP from the plant network.
• Automatic — the CP443-1 selects the source automatically based on availability; recommended for redundant CP443-1 pairs.

When the mode is left at the default From station on a slave AS that has lost the master, the time stamp of trend archives drifts and CFC alarms show the wrong date. The configuration is found in HW Config → CP443-1 → Properties → Time-of-Day Synchronization. The SIMATIC Mode dropdown must be changed to Automatic on every CP443-1 in the project for hot-standby scenarios.

Troubleshooting Matrix

Field-Proven Caveats

• Bulk change is per AS: A bulk change in the master data library does NOT propagate to instances already in charts. The bulk change must be executed on each chart folder of the target AS.
• OB80 (time error) is fired if a cyclic interrupt OB cannot finish in its period. Relocating blocks from OB35 to OB32 because of overloading can cause OB80 to fire if OB32 is itself overloaded. Always check the cycle-time histogram before rebalancing.
• Download mode: After relocating blocks, use Complete program download rather than Changes only. The runtime instance DB schema changes when S7_task changes, and an incremental download can leave the CPU in inconsistent state.
• SFC vs CFC: SFC charts (sequential function charts) manage their own step enable/disable timing and are NOT subject to the same S7_tasklist rule. A warning on an SFC block means a nested CFC sub-chart inside the SFC step.

Standards and Reference Documents

• SIMATIC PCS 7 Process Control System manual, CFC for SIMATIC S7 — see Siemens Industry Online Support entry ID 109751706.
• S7-400 Automation System, CPU 41x manual — see Siemens Industry Online Support entry ID 11170807.
• SIMATIC PCS 7 V9.0 Service Pack 3 release notes — see Siemens Industry Online Support entry ID 109746706.
• IEC 61131-3 — Programmable controllers, Part 3 (programming languages).

FAQ