Troubleshooting Siemens Arrow Alarm 40-33 APC Rack 0 Fuse Failure

1. Problem Summary

The Siemens Arrow CNC platform — a Cincinnati Milacron Arrow vertical machining center built around an early Siemens Sinumerik-class control — surfaces the alarm 40-33 "output/fuse failure on APC rack 0" when the real-time CPU board cannot correctly poll, or has lost configuration of, the Automatic Pallet Changer (APC) I/O rack. In the field case documented here, the fault surfaced immediately after a dead BIOS battery on the G7VP2 RT board was replaced, leaving the board's BIOS in a defaulted state.

The standard rack configuration in this chassis pairs the G7VP2 RT board (Cincinnati Milacron PN 2-424-2172A, chassis lip PN 3-424-xxxxAyy) with a DV5 servo board and a Profibus DP card. Because the BIOS battery backs IRQ routing and a small number of ISA-bus parameters, replacing it without re-loading the saved BIOS profile commonly returns the RT board to factory default IRQ assignments. The default mapping does not match the Arrow's I/O map, so the RT CPU completes POST but cannot establish reliable handshake with the APC I/O in rack 0. The PLC user-alarm scan (alarm group 40 = I/O rack status) then flags the rack as "fuse failure" even though the physical fuse is intact.

2. Affected Hardware and Firmware

3. Decoding Alarm 40-33

The alarm string breaks down into three independent pieces of information:

• Alarm group "40" — PLC user-alarm group reserved for I/O rack health. On Siemens 810/820-family controls (the platform the Arrow RT board targets), group 40 is the rack supervisor channel. Any alarm starting with 40 indicates the PLC detected a mismatch between the expected and reported state of a discrete I/O rack.
• Slot/index "33" — Within the rack's output byte map, bit pattern that returned a "fuse blown" feedback line. In the Arrow's standard Profibus DP slave map, slot 33 of rack 0 corresponds to the first byte of pallet-clamp and indexer outputs. A blown-fuse feedback at that index typically traces to either an overloaded 24 V solenoid, a short on the field wiring, or — and this is the field-proven case — a rack the RT CPU cannot poll because the ISA IRQ handshake was lost.
• "output/fuse failure" — The PLC's interpretation. The actual fault may be electrical (true blown fuse), mechanical (shorted solenoid), or communication (RT board cannot read the fuse-feedback input).

The diagnostic value of this three-piece decomposition is that it forces the troubleshooter to separate which of the three faults is actually present. Jumping straight to fuse replacement without checking the RT-PLC handshake is the most common wasted-effort pattern on this platform.

4. Root-Cause Analysis

4.1 Primary Cause: CMOS / BIOS Loss

Replacing the G7VP2 lithium cell without preserving the CMOS contents is the trigger event in the documented field case. The CMOS region stores:

• ISA IRQ assignments (default: IRQ7 and IRQ15 left as "PnP/PCI Auto");
• ISA-bus resource map for the on-board serial ports and the Profibus slave interface;
• Boot device order (must remain A: first for the factory reflash floppy);
• The Arrow-specific "machine serial" tag that the PLC compares against its expected rack topology.

When CMOS defaults are loaded, the RT board POSTs cleanly — every diagnostic in the boot menu passes — because the default profile is a valid PC-AT compatible configuration. The fault only surfaces when the PLC tries to exchange cyclic I/O with rack 0 and the handshake times out.

4.2 Why the Alarm Reads as "Fuse Failure"

The PLC polls each output byte and reads the associated fuse-failure feedback input. If the read times out, the PLC cannot distinguish "fuse is open" from "I cannot reach the rack at all." The safest default — and the one Siemens coded into the alarm text — is to declare a fuse failure. This conservative behavior protects the machine: the operator sees a stop condition instead of an undefined output state. The price is that the alarm is misleading when the actual cause is a loss of RT-PLC communication.

4.3 Secondary Causes to Rule Out

Before assuming a CMOS/BIOS issue, the following must be checked because they produce identical alarm text:

1. Blown 24 V fuse on the APC I/O rack terminal strip. Measure the field-side voltage at the suspect output terminal with the rack powered; if absent, trace upstream to the rack fuse.
2. Short-circuited solenoid or limit-switch wiring. Disconnect the field wiring at the rack terminal block and re-poll. If the alarm clears, the fault is downstream of the rack.
3. Loose Profibus DP connector at the rack slave. The DP slave loses power-valid handshake if the connector is not fully seated; the RT board then logs the rack as unreachable.
4. Defective DP slave card on rack 0. Swap with rack 1 (if equipped) to localize.
5. Failed Profibus termination. Termination must be ON at the two physical ends of the segment only. A terminator left ON at an intermediate rack prevents all downstream racks from responding.

5. Diagnostic Procedure

Use the following ordered checklist. Do not skip steps; the procedure is designed to localize the fault to one of three domains: electrical, network, or RT-board configuration.

5.1 Electrical Domain

1. Power down the control. Lock and tag the main disconnect.
2. Open the APC I/O rack 0 enclosure. Visually inspect the rack fuse holders — both the 24 V logic fuse and any 120/230 V output fuses depending on the cabinet build.
3. With a multimeter set to continuity, check each fuse. Replace any open fuse with the exact amperage specified on the cabinet schematic; do not up-rate.
4. Re-energize the control. At the rack terminal block, measure each output terminal referenced to 24 V common. Any terminal sitting at 0 V with its PLC bit commanded ON indicates either a tripped fuse or a shorted load.

5.2 Network Domain

1. Inspect the Profibus DP cable from the G7VP2 area to rack 0. Look for kinks, crushed jacket, missing strain relief.
2. Verify the two DP connectors at each end of the segment are locked (the Siemens 6ES7972 style connector has a 90° lock lever).
3. Confirm termination switches: ON only at the physical ends of the segment (RT board end and the most distant rack). All intermediate racks must be OFF.
4. Count the address switches on rack 0. The Arrow's standard build assigns rack 0 to DP address 3; verify against the machine's PLC I/O assignment print.

5.3 RT-Board Configuration Domain

1. Enter the RT BIOS setup menu by pressing the appropriate key during POST (typically DEL or F2; the Arrow variant uses the key shown on the splash banner).
2. Navigate to the ISA IRQ configuration page.
3. Set IRQ7 to ISA (used by the on-board serial port COM2 / PLC debug channel).
4. Set IRQ15 to ISA (used by the Profibus DP card slot).
5. Save and exit. The control will reboot and re-attempt the PLC handshake.

6. Reflash Procedure (When CMOS Is Corrupted)

If the BIOS menu is inaccessible or the saved profile is unrecoverable, the G7VP2 must be reflashed. The factory-supported procedure uses a binary image written to a 1.44 MB floppy disk and a small bootstrap loader. The card chassis part number on the inside lip of the RTU board is the reference the factory uses to identify the correct image: 3-424-xxxxAyy.

6.1 Prerequisites

• Verified 1.44 MB DOS-formatted floppy (do not use a USB stick — the G7VP2 BIOS bootstrap only enumerates a real floppy controller).
• Binary flash image matching the chassis part number, supplied by the OEM service organization.
• A bench tester with a special I/O board is recommended for post-reflash verification if available; otherwise, the in-machine POST menu is used.
• Anti-static precautions; the G7VP2 has exposed CMOS that is ESD-sensitive.

6.2 Reflash Steps

1. With control power OFF, insert the floppy into the G7VP2 floppy drive.
2. Power on the control. The BIOS bootstrap scans A: first; the reflash utility auto-launches from the floppy.
3. Follow the on-screen prompts to select the target board (G7VP2 / 2-424-2172A) and confirm the flash operation. Do not interrupt power during the write cycle.
4. When the utility reports "flash successful," remove the floppy and reboot.
5. Enter BIOS setup. Re-apply the Arrow-specific IRQ settings: IRQ7 = ISA, IRQ15 = ISA.
6. Save and reboot. Run the full POST diagnostic menu.

6.3 Bench Verification (Preferred)

Service organizations with a CNC simulator rack can insert the reflashed board into the simulator and run the I/O board tester. The tester exercises every output bit of rack 0 and verifies the fuse-feedback input returns the correct state. This step eliminates the possibility of a marginal flash bit that would pass POST but fail under cyclic load.

7. Verification Procedure

After the BIOS is restored, the IRQ lines are correctly assigned, and the electrical / network domains are clean, perform the following in order:

1. Power up the control. Confirm the POST menu completes with no errors.
2. From the operator panel, navigate to the I/O status screen for rack 0. Every input and output bit should reflect its physical state within one PLC cycle (~40 ms typical for this platform).
3. Clear the alarm 40-33 from the alarm history. If the alarm reappears within one I/O cycle, the handshake is still failing — return to the network domain checklist.
4. Run a pallet-change dry cycle: M-function for "APC pallet swap, no spindle start." Confirm the pallet clamp, indexer, and ready-to-unclamp outputs all energize and de-energize in the correct sequence.
5. Run the machine under full spindle load and verify the alarm does not return under cyclic vibration or thermal stress.

8. Field-Service Reference: Part Number Cross-Reference

9. Troubleshooting Matrix

10. Common Pitfalls

• Replacing the BIOS battery with the control OFF. This is the trigger in the majority of documented 40-33 cases. Always hot-swap the battery when feasible, or be prepared to reflash and re-apply the IRQ profile.
• Trusting the alarm text literally. "Output/fuse failure" can mean a perfectly good fuse that the PLC cannot read because the rack is unreachable.
• Skipping the bench tester. A marginal flash bit will pass POST and fail at the first cyclic poll. The bench tester catches this before the board is returned to production.
• Using a USB floppy emulator. The G7VP2 BIOS bootstrap does not enumerate USB mass storage. Use a real 1.44 MB floppy drive.
• Leaving DP termination ON at intermediate racks. This causes all downstream racks to fail simultaneously and reads as multiple alarms.

11. Preventive Recommendations

1. Log every BIOS battery replacement in the machine's maintenance record. Include the date, the technician, and whether the IRQ profile was re-applied.
2. Keep a known-good reflash floppy in the machine's documentation drawer. The factory image is tied to the chassis PN 3-424-xxxxAyy; verify the part number on the inside lip of the RTU board before flashing.
3. During scheduled PM, run the pallet-change dry cycle and verify no alarm 40-33 entries exist in the alarm history.
4. Document the Arrow-specific BIOS profile (IRQ7 = ISA, IRQ15 = ISA) and laminate a copy inside the RTU enclosure door.

FAQ